From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C9B17A034F for ; Fri, 8 Oct 2021 14:09:55 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C33834068E; Fri, 8 Oct 2021 14:09:55 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 6BE7A4068E for ; Fri, 8 Oct 2021 14:09:54 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10130"; a="287375445" X-IronPort-AV: E=Sophos;i="5.85,357,1624345200"; d="scan'208";a="287375445" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2021 05:09:54 -0700 X-IronPort-AV: E=Sophos;i="5.85,357,1624345200"; d="scan'208";a="489438715" Received: from unknown (HELO intel-npg-odc-srv03.cd.intel.com) ([10.240.178.145]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2021 05:09:52 -0700 From: Robin Zhang To: robinx.zhang@intel.com Cc: stable@dpdk.org, Sylwester Dziedziuch Date: Fri, 8 Oct 2021 11:55:25 +0000 Message-Id: <20211008115536.61352-7-robinx.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211008115536.61352-1-robinx.zhang@intel.com> References: <20211008115536.61352-1-robinx.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] [PATCH v5 06/17] net/i40e/base: fix PF reset X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" PF has to delete all the filters during reset. If it is fully loaded with filters then it is possible that it will take more than 200 ms to finish the reset resulting in timeout during pf_reset and PF reset failed, -15 error indication. Increasing the timeout value for PF reset from 200 to 1000 to give PF more time to finish reset if it is loaded with filters. Fixes: 1e32378f0774 ("i40e/base: increase PF reset max loop limit") Cc: stable@dpdk.org Signed-off-by: Sylwester Dziedziuch Signed-off-by: Robin Zhang --- drivers/net/i40e/base/i40e_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c index ceedec68bf..aa424e6010 100644 --- a/drivers/net/i40e/base/i40e_common.c +++ b/drivers/net/i40e/base/i40e_common.c @@ -1341,7 +1341,7 @@ STATIC enum i40e_status_code i40e_poll_globr(struct i40e_hw *hw, return I40E_ERR_RESET_FAILED; } -#define I40E_PF_RESET_WAIT_COUNT 200 +#define I40E_PF_RESET_WAIT_COUNT 1000 /** * i40e_pf_reset - Reset the PF * @hw: pointer to the hardware structure -- 2.25.1