From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9A9ECA0C45 for ; Mon, 18 Oct 2021 15:41:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 895ED410E8; Mon, 18 Oct 2021 15:41:03 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 4A8AA40141; Mon, 18 Oct 2021 15:41:00 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10140"; a="291720068" X-IronPort-AV: E=Sophos;i="5.85,382,1624345200"; d="scan'208";a="291720068" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2021 06:40:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,382,1624345200"; d="scan'208";a="482737259" Received: from sivswdev08.ir.intel.com ([10.237.217.47]) by orsmga007.jf.intel.com with ESMTP; 18 Oct 2021 06:40:58 -0700 From: Konstantin Ananyev To: dev@dpdk.org Cc: stephen@networkplumber.org, Konstantin Ananyev , stable@dpdk.org Date: Mon, 18 Oct 2021 14:40:52 +0100 Message-Id: <20211018134052.10514-1-konstantin.ananyev@intel.com> X-Mailer: git-send-email 2.18.0 Subject: [dpdk-stable] [PATCH] test/bpf: fix auto-test with clang fails X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" test_shift1_check() function fails with clang build. The reason for that is that clang uses 64-bit shift instruction for what expected to be 32-bit operation. To be more specific, this C code: r2 = (uint32_t)r2 >> r4; With clang produces: 41a4eb: 48 d3 ef shr %cl,%rdi In that particular case it is an allowed choice, as from one side left-operand value is known to fit into 32 bits, from other side according to 'C' standard: "...if the value of the right operand is negative or is greater than or equal to the width of the promoted left operand, the behavior is undefined." The problem is that on x86 behavior for 64-bit and 32-bit shift operation might differ. The fix avoids undefined behavior by making sure that right operand will not exceed width of the promoted left operand. Bugzilla ID: 811 Fixes: 9f8f9d91a701 ("test/bpf: introduce functional test") Cc: stable@dpdk.org Reported-by: Stephen Hemminger Signed-off-by: Konstantin Ananyev --- app/test/test_bpf.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/app/test/test_bpf.c b/app/test/test_bpf.c index 8118a1849b..7fcf92e716 100644 --- a/app/test/test_bpf.c +++ b/app/test/test_bpf.c @@ -59,6 +59,9 @@ struct dummy_mbuf { #define TEST_SHIFT_1 15 #define TEST_SHIFT_2 33 +#define TEST_SHIFT32_MASK (CHAR_BIT * sizeof(uint32_t) - 1) +#define TEST_SHIFT64_MASK (CHAR_BIT * sizeof(uint64_t) - 1) + #define TEST_JCC_1 0 #define TEST_JCC_2 -123 #define TEST_JCC_3 5678 @@ -548,15 +551,25 @@ static const struct ebpf_insn test_shift1_prog[] = { .off = offsetof(struct dummy_vect8, out[1].u64), }, { - .code = (BPF_ALU | BPF_RSH | BPF_X), - .dst_reg = EBPF_REG_2, - .src_reg = EBPF_REG_4, + .code = (BPF_ALU | BPF_AND | BPF_K), + .dst_reg = EBPF_REG_4, + .imm = TEST_SHIFT64_MASK, }, { .code = (EBPF_ALU64 | BPF_LSH | BPF_X), .dst_reg = EBPF_REG_3, .src_reg = EBPF_REG_4, }, + { + .code = (BPF_ALU | BPF_AND | BPF_K), + .dst_reg = EBPF_REG_4, + .imm = TEST_SHIFT32_MASK, + }, + { + .code = (BPF_ALU | BPF_RSH | BPF_X), + .dst_reg = EBPF_REG_2, + .src_reg = EBPF_REG_4, + }, { .code = (BPF_STX | BPF_MEM | EBPF_DW), .dst_reg = EBPF_REG_1, @@ -590,7 +603,7 @@ static const struct ebpf_insn test_shift1_prog[] = { { .code = (BPF_ALU | BPF_AND | BPF_K), .dst_reg = EBPF_REG_2, - .imm = sizeof(uint64_t) * CHAR_BIT - 1, + .imm = TEST_SHIFT64_MASK, }, { .code = (EBPF_ALU64 | EBPF_ARSH | BPF_X), @@ -600,7 +613,7 @@ static const struct ebpf_insn test_shift1_prog[] = { { .code = (BPF_ALU | BPF_AND | BPF_K), .dst_reg = EBPF_REG_2, - .imm = sizeof(uint32_t) * CHAR_BIT - 1, + .imm = TEST_SHIFT32_MASK, }, { .code = (BPF_ALU | BPF_LSH | BPF_X), @@ -666,8 +679,10 @@ test_shift1_check(uint64_t rc, const void *arg) dve.out[0].u64 = r2; dve.out[1].u64 = r3; - r2 = (uint32_t)r2 >> r4; + r4 &= TEST_SHIFT64_MASK; r3 <<= r4; + r4 &= TEST_SHIFT32_MASK; + r2 = (uint32_t)r2 >> r4; dve.out[2].u64 = r2; dve.out[3].u64 = r3; @@ -676,9 +691,9 @@ test_shift1_check(uint64_t rc, const void *arg) r3 = dvt->in[1].u64; r4 = dvt->in[2].u32; - r2 &= sizeof(uint64_t) * CHAR_BIT - 1; + r2 &= TEST_SHIFT64_MASK; r3 = (int64_t)r3 >> r2; - r2 &= sizeof(uint32_t) * CHAR_BIT - 1; + r2 &= TEST_SHIFT32_MASK; r4 = (uint32_t)r4 << r2; dve.out[4].u64 = r4; -- 2.26.3