From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F247FA0C47 for ; Thu, 28 Oct 2021 09:23:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DAE91410F4; Thu, 28 Oct 2021 09:23:28 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id E40694003F; Thu, 28 Oct 2021 09:23:25 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19RNPikx011438; Thu, 28 Oct 2021 00:23:18 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=PZBtwV9+VEmZTsPTKDQ5hm2E91zuMUDSH5wgiWh1X0k=; b=LDjP0qweMfSHnodq5Hi/y0J/tQtbBlCr7aAVMFuwU2P4AdTltVLoxabZhavPBq75SL/X FHzIYwp3phxly1+Rca/JCyVchB6q2Ga1tpBpgQ/7rs5Ru+PQ/R7gISA5D3aSrDMC2/8G MqLPdjUiEME8e1ESclhnnoQQbElfTRKdFYLyWNlkl/UoSgi5N10WvDaehUhzgH+Ebnv4 hPj8Y1DUyofRI0flVmlcJYdhAub8B0ZQXa32A+H3XUYRlWi985LsGlqWv6HA5QBPNFGX NrTgOj1LVKW+ZvQ2kpZ71z2BvCHBhOWmPenKPblDoK8RdTIcNIMiESJu2h0SsWetjU/U Iw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3by9rtu77w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 28 Oct 2021 00:23:18 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 28 Oct 2021 00:23:17 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 28 Oct 2021 00:23:17 -0700 Received: from hyd1409.caveonetworks.com.com (unknown [10.29.45.15]) by maili.marvell.com (Postfix) with ESMTP id 42E943F7043; Thu, 28 Oct 2021 00:23:10 -0700 (PDT) From: Archana Muniganti To: , , CC: Archana Muniganti , , , , , Date: Thu, 28 Oct 2021 12:52:46 +0530 Message-ID: <20211028072246.27500-1-marchana@marvell.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 6KGQuFHKxryfnxI2SBkSEAytINs1nyq2 X-Proofpoint-GUID: 6KGQuFHKxryfnxI2SBkSEAytINs1nyq2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-28_01,2021-10-26_01,2020-04-07_01 Subject: [dpdk-stable] [PATCH] crypto/octeontx2: fix ESN seqhi X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" For current pkt, previous seqhi is used instead of its guessed seqhi. Fixed it. Fixes: 5be562bc5b78 ("crypto/octeontx2: support IPsec ESN and anti-replay") Cc: stable@dpdk.org Signed-off-by: Archana Muniganti --- drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c index f0b72e05c2..4330cbd1c1 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c @@ -736,6 +736,14 @@ otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op, otx2_err("Anti replay check failed"); return IPSEC_ANTI_REPLAY_FAILED; } + + if (esn) { + seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low; + if (seq > seq_in_sa) { + sa->esn_low = rte_cpu_to_be_32(seql); + sa->esn_hi = rte_cpu_to_be_32(seqh); + } + } } ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req); @@ -749,14 +757,6 @@ otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op, ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7, burst_index); - if (winsz && esn) { - seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low; - if (seq > seq_in_sa) { - sa->esn_low = rte_cpu_to_be_32(seql); - sa->esn_hi = rte_cpu_to_be_32(seqh); - } - } - return ret; } -- 2.22.0