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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT068.mail.protection.outlook.com (10.13.177.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4690.15 via Frontend Transport; Wed, 10 Nov 2021 06:52:25 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 10 Nov 2021 06:52:12 +0000 From: Xueming Li To: Xueming Li CC: Luca Boccassi , Matan Azrad , "Maxime Coquelin" , dpdk stable Date: Wed, 10 Nov 2021 14:31:02 +0800 Message-ID: <20211110063216.2744012-179-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211110063216.2744012-1-xuemingl@nvidia.com> References: <20211110063216.2744012-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 46afb3e7-888e-4e32-adcc-08d9a416a7a2 X-MS-TrafficTypeDiagnostic: BN8PR12MB3572: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(336012)(7636003)(53546011)(6200100001)(82310400003)(36860700001)(86362001)(5660300002)(54906003)(70206006)(2906002)(7049001)(26005)(37006003)(186003)(47076005)(70586007)(83380400001)(7696005)(966005)(8936002)(508600001)(1076003)(6286002)(2616005)(16526019)(356005)(6862004)(4001150100001)(8676002)(6666004)(36756003)(4326008)(426003)(55016002)(316002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2021 06:52:25.6628 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 46afb3e7-888e-4e32-adcc-08d9a416a7a2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT068.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3572 Subject: [dpdk-stable] patch 'vdpa/mlx5: workaround FW first completion in start' has been queued to stable release 20.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/12/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/e1fe4bd76ff38a3b95dc5357b8675b4cdcb0f865 Thanks. Xueming Li --- >From e1fe4bd76ff38a3b95dc5357b8675b4cdcb0f865 Mon Sep 17 00:00:00 2001 From: Xueming Li Date: Fri, 15 Oct 2021 23:05:44 +0800 Subject: [PATCH] vdpa/mlx5: workaround FW first completion in start Cc: Xueming Li [ upstream commit d38a53b175935066b7a7a9c1d632c5f92cea7f5d ] After a vDPA application restart, Qemu restores VQ with used and available index, new incoming packet triggers virtio driver to handle buffers. Under heavy traffic, no available buffer for firmware to receive new packets, no Rx interrupts generated, driver is stuck on endless interrupt waiting. As a firmware workaround, this patch sends a notification after VQ setup to ask driver handling buffers and filling new buffers. Fixes: bff735011078 ("vdpa/mlx5: prepare virtio queues") Signed-off-by: Xueming Li Reviewed-by: Matan Azrad Reviewed-by: Maxime Coquelin --- drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c index 472bda6c23..24a8705e24 100644 --- a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c +++ b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include @@ -364,6 +365,9 @@ mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index) goto error; } virtq->stopped = false; + /* Initial notification to ask Qemu handling completed buffers. */ + if (virtq->eqp.cq.callfd != -1) + eventfd_write(virtq->eqp.cq.callfd, (eventfd_t)1); DRV_LOG(DEBUG, "vid %u virtq %u was created successfully.", priv->vid, index); return 0; -- 2.33.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-11-10 14:17:09.838684968 +0800 +++ 0178-vdpa-mlx5-workaround-FW-first-completion-in-start.patch 2021-11-10 14:17:01.990745109 +0800 @@ -1 +1 @@ -From d38a53b175935066b7a7a9c1d632c5f92cea7f5d Mon Sep 17 00:00:00 2001 +From e1fe4bd76ff38a3b95dc5357b8675b4cdcb0f865 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit d38a53b175935066b7a7a9c1d632c5f92cea7f5d ] @@ -16 +18,0 @@ -Cc: stable@dpdk.org @@ -26 +28 @@ -index cfd50d92f5..c5b357a83b 100644 +index 472bda6c23..24a8705e24 100644 @@ -37 +39 @@ -@@ -367,6 +368,9 @@ mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index) +@@ -364,6 +365,9 @@ mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)