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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT058.mail.protection.outlook.com (10.13.177.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4690.15 via Frontend Transport; Wed, 10 Nov 2021 06:54:24 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 10 Nov 2021 06:54:22 +0000 From: Xueming Li To: Qiming Chen CC: Luca Boccassi , dpdk stable Date: Wed, 10 Nov 2021 14:31:22 +0800 Message-ID: <20211110063216.2744012-199-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211110063216.2744012-1-xuemingl@nvidia.com> References: <20211110063216.2744012-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bbd53819-c97e-42a8-b8fc-08d9a416ee8c X-MS-TrafficTypeDiagnostic: CH0PR12MB5299: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(46966006)(36840700001)(47076005)(86362001)(6916009)(36756003)(8936002)(70206006)(70586007)(1076003)(8676002)(5660300002)(316002)(426003)(55016002)(54906003)(336012)(83380400001)(2906002)(36860700001)(7636003)(82310400003)(508600001)(7696005)(966005)(6286002)(186003)(53546011)(26005)(16526019)(2616005)(4326008)(356005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2021 06:54:24.6232 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbd53819-c97e-42a8-b8fc-08d9a416ee8c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5299 Subject: [dpdk-stable] patch 'net/i40e: fix buffer size alignment' has been queued to stable release 20.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/12/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/4fc3c6504068afa28824113b0872f50e8ac4209a Thanks. Xueming Li --- >From 4fc3c6504068afa28824113b0872f50e8ac4209a Mon Sep 17 00:00:00 2001 From: Qiming Chen Date: Mon, 6 Sep 2021 15:00:14 +0800 Subject: [PATCH] net/i40e: fix buffer size alignment Cc: Xueming Li The RTE_ALIGN macro is aligned upwards. If the buf_size variable is not aligned with 1 << I40E_RXQ_CTX_DBUFF_SHIFT, the rx_buf_len is larger than the actual mbuf memory after the operation. When receiving the packet, if the packet is larger than the configured buf_size, it will cause a memory stepping event. The patch uses the RTE_ALIGN_FLOOR down alignment macro to correct the problem. Fixes: c1715402df8f ("i40evf: fix jumbo frame support") Cc: stable@dpdk.org Signed-off-by: Qiming Chen --- drivers/net/i40e/i40e_ethdev_vf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index 625981048a..a753a402c3 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -1879,7 +1879,7 @@ i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq) RTE_PKTMBUF_HEADROOM); rxq->hs_mode = i40e_header_split_none; rxq->rx_hdr_len = 0; - rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); + rxq->rx_buf_len = RTE_ALIGN_FLOOR(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS; rxq->max_pkt_len = RTE_MIN(len, dev_data->dev_conf.rxmode.max_rx_pkt_len); -- 2.33.0