From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 55425A034C for ; Tue, 4 Jan 2022 09:59:31 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 43620410D5; Tue, 4 Jan 2022 09:59:31 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 167DF4003C; Tue, 4 Jan 2022 09:59:27 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1641286768; x=1672822768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FGJMmrFT2sAtzhmkDU2H5cndVK4RbMr9irWJrM9g8C4=; b=kjBUJgN0er6av3o1z9KrEDLAJTngLrp7/+Rg3s0xV+UlMInzlKKm/sBr AOHUSvJMUMx9wpDsD5rIub+WHnwpBcSuYZzUscdHQ8W/X+i7HtHwvYJkv flg1P58xvRDi6YQ1O4+pOJcCifQ74Ex3tU9XSiGKokATuaB7yrtbu3JtM GKJEuC+p6c7qwOlAB8ha9Oy7C3yzguOnaAwtQL+vf1YK5dUlismo9zu18 nztXDxdVhUEHM289Jkg0DN031bH1h2dX6dHczPZw/EVMI/lmV6zPHWxFM PYQnOPkE4eFIsjjwDcbPKaak2lgRO//MzFM7W4IucjI37zGydUX1xyKGh w==; X-IronPort-AV: E=McAfee;i="6200,9189,10216"; a="328528647" X-IronPort-AV: E=Sophos;i="5.88,260,1635231600"; d="scan'208";a="328528647" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2022 00:59:26 -0800 X-IronPort-AV: E=Sophos;i="5.88,260,1635231600"; d="scan'208";a="525948788" Received: from unknown (HELO intel-cd-odc-kevin.cd.intel.com) ([10.240.178.136]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2022 00:59:22 -0800 From: Kevin Liu To: dev@dpdk.org Cc: qiming.yang@intel.com, qi.z.zhang@intel.com, stevex.yang@intel.com, Kevin Liu , stable@dpdk.org Subject: [PATCH v2] net/ice: fix Tx Checksum offload Date: Sun, 12 Dec 2021 14:35:20 +0000 Message-Id: <20211212143520.2356157-1-kevinx.liu@intel.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211208095626.85026-1-kevinx.liu@intel.com> References: <20211208095626.85026-1-kevinx.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org The tunnel packets is missing some information after Tx forwarding. In ice_txd_enable_offload, when set tunnel packet Tx checksum offload enable, td_offset should be set with outer l2/l3 len instead of inner l2/l3 len. In ice_txd_enable_checksum, td_offset should also be set with outer l3 len. This patch fix the bug that the checksum engine can forward Ipv4/Ipv6 tunnel packets. Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path") Fixes: 17c7d0f9d6a4 ("net/ice: support basic Rx/Tx") Cc: stable@dpdk.org Signed-off-by: Kevin Liu --- v2: - Refine the title and fix code in ice_txd_enable_checksum. --- drivers/net/ice/ice_rxtx.c | 41 ++++++++++++++------- drivers/net/ice/ice_rxtx_vec_common.h | 52 +++++++++++++++++++-------- 2 files changed, 66 insertions(+), 27 deletions(-) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index f6d8564ab8..d50acf5391 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -2490,18 +2490,35 @@ ice_txd_enable_checksum(uint64_t ol_flags, << ICE_TX_DESC_LEN_MACLEN_S; /* Enable L3 checksum offloads */ - if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { - *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM; - *td_offset |= (tx_offload.l3_len >> 2) << - ICE_TX_DESC_LEN_IPLEN_S; - } else if (ol_flags & RTE_MBUF_F_TX_IPV4) { - *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4; - *td_offset |= (tx_offload.l3_len >> 2) << - ICE_TX_DESC_LEN_IPLEN_S; - } else if (ol_flags & RTE_MBUF_F_TX_IPV6) { - *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6; - *td_offset |= (tx_offload.l3_len >> 2) << - ICE_TX_DESC_LEN_IPLEN_S; + /*Tunnel package usage outer len enable L3 checksum offload*/ + if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) { + if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { + *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM; + *td_offset |= (tx_offload.outer_l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV4) { + *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4; + *td_offset |= (tx_offload.outer_l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV6) { + *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6; + *td_offset |= (tx_offload.outer_l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } + } else { + if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { + *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM; + *td_offset |= (tx_offload.l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV4) { + *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4; + *td_offset |= (tx_offload.l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV6) { + *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6; + *td_offset |= (tx_offload.l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } } if (ol_flags & RTE_MBUF_F_TX_TCP_SEG) { diff --git a/drivers/net/ice/ice_rxtx_vec_common.h b/drivers/net/ice/ice_rxtx_vec_common.h index dfe60c81d9..8ff01046e1 100644 --- a/drivers/net/ice/ice_rxtx_vec_common.h +++ b/drivers/net/ice/ice_rxtx_vec_common.h @@ -364,23 +364,45 @@ ice_txd_enable_offload(struct rte_mbuf *tx_pkt, uint32_t td_offset = 0; /* Tx Checksum Offload */ - /* SET MACLEN */ - td_offset |= (tx_pkt->l2_len >> 1) << + /*Tunnel package usage outer len enable L2/L3 checksum offload*/ + if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) { + /* SET MACLEN */ + td_offset |= (tx_pkt->outer_l2_len >> 1) << ICE_TX_DESC_LEN_MACLEN_S; - /* Enable L3 checksum offload */ - if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { - td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM; - td_offset |= (tx_pkt->l3_len >> 2) << - ICE_TX_DESC_LEN_IPLEN_S; - } else if (ol_flags & RTE_MBUF_F_TX_IPV4) { - td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4; - td_offset |= (tx_pkt->l3_len >> 2) << - ICE_TX_DESC_LEN_IPLEN_S; - } else if (ol_flags & RTE_MBUF_F_TX_IPV6) { - td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6; - td_offset |= (tx_pkt->l3_len >> 2) << - ICE_TX_DESC_LEN_IPLEN_S; + /* Enable L3 checksum offload */ + if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { + td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM; + td_offset |= (tx_pkt->outer_l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV4) { + td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4; + td_offset |= (tx_pkt->outer_l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV6) { + td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6; + td_offset |= (tx_pkt->outer_l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } + } else { + /* SET MACLEN */ + td_offset |= (tx_pkt->l2_len >> 1) << + ICE_TX_DESC_LEN_MACLEN_S; + + /* Enable L3 checksum offload */ + if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) { + td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM; + td_offset |= (tx_pkt->l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV4) { + td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4; + td_offset |= (tx_pkt->l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } else if (ol_flags & RTE_MBUF_F_TX_IPV6) { + td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6; + td_offset |= (tx_pkt->l3_len >> 2) << + ICE_TX_DESC_LEN_IPLEN_S; + } } /* Enable L4 checksum offloads */ -- 2.33.1