From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7B2B0A0351 for ; Thu, 23 Dec 2021 14:17:01 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 667C941140; Thu, 23 Dec 2021 14:17:01 +0100 (CET) Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2071.outbound.protection.outlook.com [40.107.93.71]) by mails.dpdk.org (Postfix) with ESMTP id 50F8440DDA; Thu, 23 Dec 2021 14:16:58 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=S9w3euGy5A92gKBWZbU6bcb7pNMIf6iPhdMzE69jlN5j9Uk6PoD10M5Is0tN8sfvPTcvIzBJyG5q1rDPFY9HBoTh4WmqSVmFFdOZ4F8ZxepGuFDwPO5S8l5F8PFotWPV0fDecz+3aS3Dh6ZI+kzzSiBRdXCLM2gYwb9kspn2BcjXAAMeEv1VyAnmNRX7wl1zKYWK2FxHLJUsEw8wpIybQBq4Q4CoR1mwuEBs2JcKmNQZEacG/Hrt63VlPpsGkPlNIQsj1QtgE284xyBSjJiNuGq0KtLppviV0R4XRgfGpJKG/uJX49GAMDq4YdpZt/0RVyG5N9ds6U0H2S/psxDhCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gajqHknnQQ+mg7DjEKyu4Yn/PG2v0B4qD10rzscKtf0=; b=kfoQqsnrLykZVnTe4aCVxwGjb1bVA9ItrjM52MKMNZT/0TXjAg1OXaqDieWlkp4msy4MIGB09COuyXKrmGP2uSsoZAlWGjGRkkGQJCh0nNQ3Du0cWmTT2H6zAym4jYp94FZU7J2W90wF85ToApa6DGpgTdGT7ZEOI5hKQw9F687BvFinzByz51vM6+Zch3VKQef2Vutbh1XQLk1MRpjzPvivb/RJv6a+gAEUSI2MW1/SbrtnXRRBvgOBq3XSsxBsST8YY+5GaCBq/S9o1Oj0+XrF3IyjHPLvCCtAsfhTE/t2ja2jwUqTRO3h5p8vzrnRCQ3az/6v3vJlZ4oWQvdkIQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.238) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=gajqHknnQQ+mg7DjEKyu4Yn/PG2v0B4qD10rzscKtf0=; b=n2BkU883gyTw8nBH+4wB5xMHoXSdeh329/OTVZJDYV2XvzBz4JuhY+BAU57rgTy8MspU7ipu7E+rcwECWtWLN/unNxocyr7KSY+zrz29iV9HxmG6SBTD94ROe91DzJpU911RhIPwHlQlvnFzVAKsrRahxcpqOg/HK94OHFRKDpQH3mqagySmnf2yImxC6DzaCg5LoKjVCeOcGVQGRfObFOdoXZjGsap8ywh1aCWrWxTKRnI6uTdi1A6dUxrKonGfqlxOE+Alz/PPML+StUaKsaO69vcNhlIoSAGvsmg5kYrtMLTJM0JKP2wwTSomuP9rDHgkjdelYqIQMUtwiZy1iw== Received: from MWHPR04CA0033.namprd04.prod.outlook.com (2603:10b6:300:ee::19) by DM6PR12MB4601.namprd12.prod.outlook.com (2603:10b6:5:163::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4801.20; Thu, 23 Dec 2021 13:16:56 +0000 Received: from CO1NAM11FT034.eop-nam11.prod.protection.outlook.com (2603:10b6:300:ee:cafe::b1) by MWHPR04CA0033.outlook.office365.com (2603:10b6:300:ee::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4823.16 via Frontend Transport; Thu, 23 Dec 2021 13:16:55 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.238) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.238) by CO1NAM11FT034.mail.protection.outlook.com (10.13.174.248) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4823.18 via Frontend Transport; Thu, 23 Dec 2021 13:16:55 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 23 Dec 2021 13:16:55 +0000 Received: from nvidia.com (172.20.187.5) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.986.9; Thu, 23 Dec 2021 05:16:52 -0800 From: Gregory Etelson To: CC: , , , "Matan Azrad" , Viacheslav Ovsiienko , Yongseok Koh , Ori Kam Subject: [PATCH] net/mlx5: fix GRE protocol type translation for VERB API Date: Thu, 23 Dec 2021 15:16:38 +0200 Message-ID: <20211223131638.15190-1-getelson@nvidia.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8101bb54-6ea5-4a86-66e9-08d9c6167e18 X-MS-TrafficTypeDiagnostic: DM6PR12MB4601:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5236; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PTMRmRq56tvcNy85cVuVOAiZQe9wmw3ijnZJisRUOmq4tgOUB4bBEoRbVIkb1u2bQOlx3GJahn9pCSNkH5XxT25PQf7oBYe8L+aX3qViUgssausVYjRRVcrB5IGrUJo1bKE9ExzL2tVonXhWJwlwUUVSiOlNVKbAd7OpgZ5Ad8s35VdC/YLnnJlttbcyZBjXVwqg83JL+E7nbESBpuhFzuMDGzmd476BfNYJPEjltxaHqyV6laOVB1Lhyd53q3bktB91pJmhXA3jfrK8MmACTpuijiBiGMSdDF1NCAw/nCs0VIZwAOnhOsDLX6LmgLGonc0M8B8DWS//6VeQSIzhlYWMHQ1vh9F+qAm4FoUsmmTUnHFvUTnV9jkdDMIi/c8YHO9sc2X0LRMfWaeZZEYbzT1unA6jSklqJn4U9fC3pZC/c2oVle5TGUQc77TPwOjEcpUBxXpeLNWBdeKA0ZJl1TAMSpqrSpzy98HK1egq1Vb0h9jfSUXBqkOiNbjNudnPdh7Zxebs9H8ThaB/sqU+QNn3MglFSju/k9jIqPD/R8/408iDkjOd2db9ZGvYvwhhgEKxKm2cxCGzhkZz0OkePgvnpd2wPj9m0gSAQezW/B447Czi+SWEU4W/B7xhF8H7a6ndG775XQD7zImxrnmhPkRLgZs1rkiUNSoOAc+BNgZ93tVZdLKhyHyskH2PS3USXOAZAuBpWa084kWxwxIeGfMU1QYP6z8Lq2GDt442WYPgvFCn5X4uLRiyq0CL9iecOKUiftf+0ClZo3PUwOxb2swVyvuNTGRXw0z2+zn+sSY= X-Forefront-Antispam-Report: CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(40470700002)(2906002)(2616005)(54906003)(7696005)(36860700001)(356005)(81166007)(508600001)(83380400001)(86362001)(16526019)(336012)(186003)(36756003)(26005)(70586007)(6286002)(1076003)(450100002)(316002)(6666004)(107886003)(8936002)(6916009)(8676002)(40460700001)(5660300002)(4326008)(47076005)(55016003)(82310400004)(70206006)(426003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Dec 2021 13:16:55.5806 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8101bb54-6ea5-4a86-66e9-08d9c6167e18 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4601 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org When application creates several flows to match on GRE tunnel without explicitly specifying GRE protocol type value in flow rules, PMD will translate that to zero mask. RDMA-CORE cannot distinguish between different inner flow types and produces identical matchers for each zero mask. The patch extracts inner header type from flow rule and forces it in GRE protocol type, if application did not specify any. Cc: stable@dpdk.org Fixes: 84c406e74524 ("net/mlx5: add flow translate function") Signed-off-by: Gregory Etelson Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.h | 14 +++++++++++ drivers/net/mlx5/mlx5_flow_dv.c | 14 ----------- drivers/net/mlx5/mlx5_flow_verbs.c | 37 ++++++++++++++++++++---------- 3 files changed, 39 insertions(+), 26 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 1f54649c69..f80d9454d5 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1450,6 +1450,20 @@ flow_aso_ct_get_by_idx(struct rte_eth_dev *dev, uint32_t own_idx) return ct; } +static inline uint16_t +mlx5_translate_tunnel_etypes(uint64_t pattern_flags) +{ + if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2) + return RTE_ETHER_TYPE_TEB; + else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) + return RTE_ETHER_TYPE_IPV4; + else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6) + return RTE_ETHER_TYPE_IPV6; + else if (pattern_flags & MLX5_FLOW_LAYER_MPLS) + return RTE_ETHER_TYPE_MPLS; + return 0; +} + int mlx5_flow_group_to_table(struct rte_eth_dev *dev, const struct mlx5_flow_tunnel *tunnel, uint32_t group, uint32_t *table, diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 1c6cae8779..5bb60dd73c 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -93,20 +93,6 @@ static int flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev, uint32_t rix_jump); -static inline uint16_t -mlx5_translate_tunnel_etypes(uint64_t pattern_flags) -{ - if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2) - return RTE_ETHER_TYPE_TEB; - else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) - return RTE_ETHER_TYPE_IPV4; - else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6) - return RTE_ETHER_TYPE_IPV6; - else if (pattern_flags & MLX5_FLOW_LAYER_MPLS) - return RTE_ETHER_TYPE_MPLS; - return 0; -} - static int16_t flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev) { diff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c index 29cd694752..192a00d4fd 100644 --- a/drivers/net/mlx5/mlx5_flow_verbs.c +++ b/drivers/net/mlx5/mlx5_flow_verbs.c @@ -907,6 +907,7 @@ flow_verbs_translate_item_gre(struct mlx5_flow *dev_flow, .size = size, }; #else + static const struct rte_flow_item_gre empty_gre = {0,}; const struct rte_flow_item_gre *spec = item->spec; const struct rte_flow_item_gre *mask = item->mask; unsigned int size = sizeof(struct ibv_flow_spec_gre); @@ -915,17 +916,29 @@ flow_verbs_translate_item_gre(struct mlx5_flow *dev_flow, .size = size, }; - if (!mask) - mask = &rte_flow_item_gre_mask; - if (spec) { - tunnel.val.c_ks_res0_ver = spec->c_rsvd0_ver; - tunnel.val.protocol = spec->protocol; - tunnel.mask.c_ks_res0_ver = mask->c_rsvd0_ver; - tunnel.mask.protocol = mask->protocol; - /* Remove unwanted bits from values. */ - tunnel.val.c_ks_res0_ver &= tunnel.mask.c_ks_res0_ver; + if (!spec) { + spec = &empty_gre; + mask = &empty_gre; + } else { + if (!mask) + mask = &rte_flow_item_gre_mask; + } + tunnel.val.c_ks_res0_ver = spec->c_rsvd0_ver; + tunnel.val.protocol = spec->protocol; + tunnel.mask.c_ks_res0_ver = mask->c_rsvd0_ver; + tunnel.mask.protocol = mask->protocol; + /* Remove unwanted bits from values. */ + tunnel.val.c_ks_res0_ver &= tunnel.mask.c_ks_res0_ver; + tunnel.val.key &= tunnel.mask.key; + if (tunnel.mask.protocol) { tunnel.val.protocol &= tunnel.mask.protocol; - tunnel.val.key &= tunnel.mask.key; + } else { + tunnel.val.protocol = mlx5_translate_tunnel_etypes(item_flags); + if (tunnel.val.protocol) { + tunnel.mask.protocol = 0xFFFF; + tunnel.val.protocol = + rte_cpu_to_be_16(tunnel.val.protocol); + } } #endif if (item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) @@ -1803,8 +1816,6 @@ flow_verbs_translate(struct rte_eth_dev *dev, item_flags |= MLX5_FLOW_LAYER_VXLAN_GPE; break; case RTE_FLOW_ITEM_TYPE_GRE: - flow_verbs_translate_item_gre(dev_flow, items, - item_flags); subpriority = MLX5_TUNNEL_PRIO_GET(rss_desc); item_flags |= MLX5_FLOW_LAYER_GRE; break; @@ -1820,6 +1831,8 @@ flow_verbs_translate(struct rte_eth_dev *dev, NULL, "item not supported"); } } + if (item_flags & MLX5_FLOW_LAYER_GRE) + flow_verbs_translate_item_gre(dev_flow, items, item_flags); dev_flow->handle->layers = item_flags; /* Other members of attr will be ignored. */ dev_flow->verbs.attr.priority = -- 2.34.1