From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79EA7A034D for ; Thu, 10 Feb 2022 08:07:03 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 68F874115E; Thu, 10 Feb 2022 08:07:03 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 636B640041; Thu, 10 Feb 2022 08:07:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644476820; x=1676012820; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Lj4+o27EYcfTpKVhBY+Ip8V4CPCIDMumiS1fB8cWSHc=; b=IGCu8gWSb+TAAD6hmoone7Ga4sDKQSSXebnx7JDtsEt2gFQlWu+ev+Gm k8vyRjrzpND+afgyT+GEWHDoQ88SEswyeDbIwJAbz3LJhOULB2OsKkozG 55fFiyUF/rZLIywH4rD3ZsCOVcHPK9/Ab+I26LQZzJeaAh5OSCdRVuKXx nlNn8UoUnf6ezr9PErDXQpzkDK0mGmX71y5z+A+SzM2ImxiixhqOOkA56 icpt0gpmuKnXRLz9X003d0k5p8oydlJCU70L0UGZS5qY7Lg5cRdbUMDcs qz3PFpmNNY6WEqe79qKqJvPWEV28gp+oZPHfdY+OixB08w1uel2DoHAOX Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="249180514" X-IronPort-AV: E=Sophos;i="5.88,358,1635231600"; d="scan'208";a="249180514" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 23:06:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,358,1635231600"; d="scan'208";a="568542162" Received: from dpdk-jf-ntb-v1.sh.intel.com ([10.67.119.116]) by orsmga001.jf.intel.com with ESMTP; 09 Feb 2022 23:06:58 -0800 From: Junfeng Guo To: jingjing.wu@intel.com Cc: dev@dpdk.org, stable@dpdk.org, junfeng.guo@intel.com Subject: [PATCH v4] raw/ntb: clear all valid DB bits when DB init Date: Thu, 10 Feb 2022 15:06:34 +0800 Message-Id: <20220210070634.689869-1-junfeng.guo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220209044716.3709178-1-junfeng.guo@intel.com> References: <20220209044716.3709178-1-junfeng.guo@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Before registering the doorbell interrupt handler callback function, all the valid doorbell bits within the NTB private data struct should be cleared to avoid the confusion of the handshake timing sequence diagram when setting up the NTB connection in back-to-back mode. Fixes: 62012a76811e ("raw/ntb: add handshake process") Cc: stable@dpdk.org v2: fix typo v3: fix coding style issue v4: add ops check before calling it Signed-off-by: Junfeng Guo --- drivers/raw/ntb/ntb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/raw/ntb/ntb.c b/drivers/raw/ntb/ntb.c index 46ac02e5ab..f5e773c53b 100644 --- a/drivers/raw/ntb/ntb.c +++ b/drivers/raw/ntb/ntb.c @@ -1398,6 +1398,10 @@ ntb_init_hw(struct rte_rawdev *dev, struct rte_pci_device *pci_dev) /* Init doorbell. */ hw->db_valid_mask = RTE_LEN2MASK(hw->db_cnt, uint64_t); + /* Clear all valid doorbell bits before registering intr handler */ + if (hw->ntb_ops->db_clear == NULL) + return -ENOTSUP; + (*hw->ntb_ops->db_clear)(dev, hw->db_valid_mask); intr_handle = pci_dev->intr_handle; /* Register callback func to eal lib */ -- 2.25.1