* [PATCH 20.11 1/5] common/mlx5: add minimum WQE size for striding RQ
2022-02-21 19:46 [PATCH 20.11 0/5] mlx5: some fixes Michael Baum
@ 2022-02-21 19:46 ` Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 2/5] net/mlx5: improve stride parameter names Michael Baum
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Michael Baum @ 2022-02-21 19:46 UTC (permalink / raw)
To: stable; +Cc: Matan Azrad, Viacheslav Ovsiienko
[ upstream commit 10599cf83ebe768fe5ebe3e430c2a3c4250aafca ]
Some devices have a WQE size limit for striding RQ. On some newer
devices, this limitation is smaller and information on its size is
provided by the firmware.
This patch adds the attribute query from firmware: the minimum required
size of WQE buffer for striding RQ in granularity of Bytes.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/common/mlx5/mlx5_devx_cmds.c | 28 ++++++++++++++++++++
drivers/common/mlx5/mlx5_devx_cmds.h | 1 +
drivers/common/mlx5/mlx5_prm.h | 38 +++++++++++++++++++++++++++-
3 files changed, 66 insertions(+), 1 deletion(-)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index 450595ee70..97e9b38703 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -653,6 +653,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
uint32_t out[MLX5_ST_SZ_DW(query_hca_cap_out)] = {0};
void *hcattr;
int status, syndrome, rc, i;
+ bool hca_cap_2_sup;
MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
MLX5_SET(query_hca_cap_in, in, op_mod,
@@ -672,6 +673,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
return -1;
}
hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability);
+ hca_cap_2_sup = MLX5_GET(cmd_hca_cap, hcattr, hca_cap_2);
attr->flow_counter_bulk_alloc_bitmap =
MLX5_GET(cmd_hca_cap, hcattr, flow_counter_bulk_alloc);
attr->flow_counters_dump = MLX5_GET(cmd_hca_cap, hcattr,
@@ -733,6 +735,32 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
mini_cqe_resp_flow_tag);
attr->mini_cqe_resp_l3_l4_tag = MLX5_GET(cmd_hca_cap, hcattr,
mini_cqe_resp_l3_l4_tag);
+ if (hca_cap_2_sup) {
+ memset(in, 0, sizeof(in));
+ memset(out, 0, sizeof(out));
+ MLX5_SET(query_hca_cap_in, in, opcode,
+ MLX5_CMD_OP_QUERY_HCA_CAP);
+ MLX5_SET(query_hca_cap_in, in, op_mod,
+ MLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE_2 |
+ MLX5_HCA_CAP_OPMOD_GET_CUR);
+ rc = mlx5_glue->devx_general_cmd(ctx, in, sizeof(in),
+ out, sizeof(out));
+ if (rc)
+ goto error;
+ status = MLX5_GET(query_hca_cap_out, out, status);
+ syndrome = MLX5_GET(query_hca_cap_out, out, syndrome);
+ if (status) {
+ DRV_LOG(DEBUG,
+ "Failed to query DevX HCA capabilities 2,"
+ " status %x, syndrome = %x", status, syndrome);
+ return -1;
+ }
+ hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability);
+ attr->log_min_stride_wqe_sz = MLX5_GET(cmd_hca_cap_2, hcattr,
+ log_min_stride_wqe_sz);
+ }
+ if (attr->log_min_stride_wqe_sz == 0)
+ attr->log_min_stride_wqe_sz = MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
if (attr->qos.sup) {
MLX5_SET(query_hca_cap_in, in, op_mod,
MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index 541f526194..c4ead8a724 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -79,6 +79,7 @@ struct mlx5_hca_attr {
uint32_t eswitch_manager:1;
uint32_t flow_counters_dump:1;
uint32_t log_max_rqt_size:5;
+ uint32_t log_min_stride_wqe_sz:5;
uint32_t parse_graph_flex_node:1;
uint8_t flow_counter_bulk_alloc_bitmap;
uint32_t eth_net_offloads:1;
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 201224cf24..45b47851d9 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -264,6 +264,9 @@
/* The maximum log value of segments per RQ WQE. */
#define MLX5_MAX_LOG_RQ_SEGS 5u
+/* Log 2 of the default size of a WQE for Multi-Packet RQ. */
+#define MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE 14U
+
/* The alignment needed for WQ buffer. */
#define MLX5_WQE_BUF_ALIGNMENT rte_mem_page_size()
@@ -1059,6 +1062,7 @@ enum {
MLX5_GET_HCA_CAP_OP_MOD_ROCE = 0x4 << 1,
MLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE = 0x7 << 1,
MLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION = 0x13 << 1,
+ MLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE_2 = 0x20 << 1,
};
#define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTQ_NET_Q \
@@ -1119,7 +1123,9 @@ enum {
#define MLX5_HCA_FLEX_ICMPV6_ENABLED (1UL << 9)
struct mlx5_ifc_cmd_hca_cap_bits {
- u8 reserved_at_0[0x30];
+ u8 reserved_at_0[0x20];
+ u8 hca_cap_2[0x1];
+ u8 reserved_at_21[0xf];
u8 vhca_id[0x10];
u8 reserved_at_40[0x40];
u8 log_max_srq_sz[0x8];
@@ -1572,8 +1578,38 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties;
};
+/*
+ * HCA Capabilities 2
+ */
+struct mlx5_ifc_cmd_hca_cap_2_bits {
+ u8 reserved_at_0[0x80]; /* End of DW4. */
+ u8 reserved_at_80[0x3];
+ u8 max_num_prog_sample_field[0x5];
+ u8 reserved_at_88[0x3];
+ u8 log_max_num_reserved_qpn[0x5];
+ u8 reserved_at_90[0x3];
+ u8 log_reserved_qpn_granularity[0x5];
+ u8 reserved_at_98[0x3];
+ u8 log_reserved_qpn_max_alloc[0x5]; /* End of DW5. */
+ u8 max_reformat_insert_size[0x8];
+ u8 max_reformat_insert_offset[0x8];
+ u8 max_reformat_remove_size[0x8];
+ u8 max_reformat_remove_offset[0x8]; /* End of DW6. */
+ u8 reserved_at_c0[0x3];
+ u8 log_min_stride_wqe_sz[0x5];
+ u8 reserved_at_c8[0x3];
+ u8 log_conn_track_granularity[0x5];
+ u8 reserved_at_d0[0x3];
+ u8 log_conn_track_max_alloc[0x5];
+ u8 reserved_at_d8[0x3];
+ u8 log_max_conn_track_offload[0x5];
+ u8 reserved_at_e0[0x20]; /* End of DW7. */
+ u8 reserved_at_100[0x700];
+};
+
union mlx5_ifc_hca_cap_union_bits {
struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
+ struct mlx5_ifc_cmd_hca_cap_2_bits cmd_hca_cap_2;
struct mlx5_ifc_per_protocol_networking_offload_caps_bits
per_protocol_networking_offload_caps;
struct mlx5_ifc_qos_cap_bits qos_cap;
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 20.11 2/5] net/mlx5: improve stride parameter names
2022-02-21 19:46 [PATCH 20.11 0/5] mlx5: some fixes Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 1/5] common/mlx5: add minimum WQE size for striding RQ Michael Baum
@ 2022-02-21 19:46 ` Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 3/5] net/mlx5: fix MPRQ stride devargs adjustment Michael Baum
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Michael Baum @ 2022-02-21 19:46 UTC (permalink / raw)
To: stable; +Cc: Matan Azrad, Viacheslav Ovsiienko
[ upstream commit 0947ed380febad9d6f794b6f4e9aa9137860a06e ]
In the striding RQ management there are two important parameters, the
size of the single stride in bytes and the number of strides.
Both the data-path structure and config structure keep the log of the
above parameters. However, in their names there is no mention that the
value is a log which may be misleading as if the fields represent the
values themselves.
This patch updates their names describing the values more accurately.
Fixes: ecb160456aed ("net/mlx5: add device parameter for MPRQ stride size")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 36 +++++-----
drivers/net/mlx5/linux/mlx5_verbs.c | 4 +-
drivers/net/mlx5/mlx5.c | 4 +-
drivers/net/mlx5/mlx5.h | 8 +--
drivers/net/mlx5/mlx5_defs.h | 4 +-
drivers/net/mlx5/mlx5_devx.c | 4 +-
drivers/net/mlx5/mlx5_rxq.c | 104 +++++++++++++++-------------
drivers/net/mlx5/mlx5_rxtx.c | 22 +++---
drivers/net/mlx5/mlx5_rxtx.h | 10 +--
drivers/net/mlx5/mlx5_rxtx_vec.c | 8 +--
10 files changed, 105 insertions(+), 99 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index a0ddc90311..8cd120d467 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1383,34 +1383,34 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
(config->hw_fcs_strip ? "" : "not "));
if (config->mprq.enabled && mprq) {
- if (config->mprq.stride_num_n &&
- (config->mprq.stride_num_n > mprq_max_stride_num_n ||
- config->mprq.stride_num_n < mprq_min_stride_num_n)) {
- config->mprq.stride_num_n =
- RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
- mprq_min_stride_num_n),
- mprq_max_stride_num_n);
+ if (config->mprq.log_stride_num &&
+ (config->mprq.log_stride_num > mprq_max_stride_num_n ||
+ config->mprq.log_stride_num < mprq_min_stride_num_n)) {
+ config->mprq.log_stride_num =
+ RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM,
+ mprq_min_stride_num_n),
+ mprq_max_stride_num_n);
DRV_LOG(WARNING,
"the number of strides"
" for Multi-Packet RQ is out of range,"
" setting default value (%u)",
- 1 << config->mprq.stride_num_n);
+ 1 << config->mprq.log_stride_num);
}
- if (config->mprq.stride_size_n &&
- (config->mprq.stride_size_n > mprq_max_stride_size_n ||
- config->mprq.stride_size_n < mprq_min_stride_size_n)) {
- config->mprq.stride_size_n =
- RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
- mprq_min_stride_size_n),
- mprq_max_stride_size_n);
+ if (config->mprq.log_stride_size &&
+ (config->mprq.log_stride_size > mprq_max_stride_size_n ||
+ config->mprq.log_stride_size < mprq_min_stride_size_n)) {
+ config->mprq.log_stride_size =
+ RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE,
+ mprq_min_stride_size_n),
+ mprq_max_stride_size_n);
DRV_LOG(WARNING,
"the size of a stride"
" for Multi-Packet RQ is out of range,"
" setting default value (%u)",
- 1 << config->mprq.stride_size_n);
+ 1 << config->mprq.log_stride_size);
}
- config->mprq.min_stride_size_n = mprq_min_stride_size_n;
- config->mprq.max_stride_size_n = mprq_max_stride_size_n;
+ config->mprq.log_min_stride_size = mprq_min_stride_size_n;
+ config->mprq.log_max_stride_size = mprq_max_stride_size_n;
} else if (config->mprq.enabled && !mprq) {
DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
config->mprq.enabled = 0;
diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c
index 95e8eb06d1..29e569c321 100644
--- a/drivers/net/mlx5/linux/mlx5_verbs.c
+++ b/drivers/net/mlx5/linux/mlx5_verbs.c
@@ -317,8 +317,8 @@ mlx5_rxq_ibv_wq_create(struct rte_eth_dev *dev, uint16_t idx)
wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
*mprq_attr = (struct mlx5dv_striding_rq_init_attr){
- .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
- .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
+ .single_stride_log_num_of_bytes = rxq_data->log_strd_sz,
+ .single_wqe_log_num_of_strides = rxq_data->log_strd_num,
.two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
};
}
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 0953561802..92fd604a2d 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1645,9 +1645,9 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
} else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
config->mprq.enabled = !!tmp;
} else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
- config->mprq.stride_num_n = tmp;
+ config->mprq.log_stride_num = tmp;
} else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_SIZE, key) == 0) {
- config->mprq.stride_size_n = tmp;
+ config->mprq.log_stride_size = tmp;
} else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
config->mprq.max_memcpy_len = tmp;
} else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 2a040453a6..642fa804ef 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -228,10 +228,10 @@ struct mlx5_dev_config {
unsigned int dv_miss_info:1; /* restore packet after partial hw miss */
struct {
unsigned int enabled:1; /* Whether MPRQ is enabled. */
- unsigned int stride_num_n; /* Number of strides. */
- unsigned int stride_size_n; /* Size of a stride. */
- unsigned int min_stride_size_n; /* Min size of a stride. */
- unsigned int max_stride_size_n; /* Max size of a stride. */
+ unsigned int log_stride_num; /* Log number of strides. */
+ unsigned int log_stride_size; /* Log size of a stride. */
+ unsigned int log_min_stride_size; /* Log min size of a stride.*/
+ unsigned int log_max_stride_size; /* Log max size of a stride.*/
unsigned int max_memcpy_len;
/* Maximum packet size to memcpy Rx packets. */
unsigned int min_rxqs_num;
diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index aa55db3750..660daae44a 100644
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -138,10 +138,10 @@
#endif
/* Log 2 of the default number of strides per WQE for Multi-Packet RQ. */
-#define MLX5_MPRQ_STRIDE_NUM_N 6U
+#define MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM 6U
/* Log 2 of the default size of a stride per WQE for Multi-Packet RQ. */
-#define MLX5_MPRQ_STRIDE_SIZE_N 11U
+#define MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE 11U
/* Two-byte shift is disabled for Multi-Packet RQ. */
#define MLX5_MPRQ_TWO_BYTE_SHIFT 0
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index ac1939415b..b2c770f537 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -348,11 +348,11 @@ mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
* 512*2^single_wqe_log_num_of_strides.
*/
rq_attr.wq_attr.single_wqe_log_num_of_strides =
- rxq_data->strd_num_n -
+ rxq_data->log_strd_num -
MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES;
/* Stride size = (2^single_stride_log_num_of_bytes)*64B. */
rq_attr.wq_attr.single_stride_log_num_of_bytes =
- rxq_data->strd_sz_n -
+ rxq_data->log_strd_sz -
MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES;
wqe_size = sizeof(struct mlx5_wqe_mprq);
} else {
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index ed38c1eea0..cba673fee6 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -80,7 +80,7 @@ mlx5_check_mprq_support(struct rte_eth_dev *dev)
inline int
mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
{
- return rxq->strd_num_n > 0;
+ return rxq->log_strd_num > 0;
}
/**
@@ -135,7 +135,7 @@ mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
unsigned int wqe_n = 1 << rxq_data->elts_n;
if (mlx5_rxq_mprq_enabled(rxq_data))
- cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
+ cqe_n = wqe_n * RTE_BIT32(rxq_data->log_strd_num) - 1;
else
cqe_n = wqe_n - 1;
return cqe_n;
@@ -205,8 +205,9 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
{
const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
- (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
- (1 << rxq_ctrl->rxq.elts_n);
+ RTE_BIT32(rxq_ctrl->rxq.elts_n) *
+ RTE_BIT32(rxq_ctrl->rxq.log_strd_num) :
+ RTE_BIT32(rxq_ctrl->rxq.elts_n);
unsigned int i;
int err;
@@ -345,8 +346,8 @@ rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
{
struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
- (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
- (1 << rxq->elts_n);
+ RTE_BIT32(rxq->elts_n) * RTE_BIT32(rxq->log_strd_num) :
+ RTE_BIT32(rxq->elts_n);
const uint16_t q_mask = q_n - 1;
uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
rxq->elts_ci : rxq->rq_ci;
@@ -1233,8 +1234,8 @@ mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
unsigned int buf_len;
unsigned int obj_num;
unsigned int obj_size;
- unsigned int strd_num_n = 0;
- unsigned int strd_sz_n = 0;
+ unsigned int log_strd_num = 0;
+ unsigned int log_strd_sz = 0;
unsigned int i;
unsigned int n_ibv = 0;
@@ -1251,16 +1252,18 @@ mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
n_ibv++;
desc += 1 << rxq->elts_n;
/* Get the max number of strides. */
- if (strd_num_n < rxq->strd_num_n)
- strd_num_n = rxq->strd_num_n;
+ if (log_strd_num < rxq->log_strd_num)
+ log_strd_num = rxq->log_strd_num;
/* Get the max size of a stride. */
- if (strd_sz_n < rxq->strd_sz_n)
- strd_sz_n = rxq->strd_sz_n;
- }
- MLX5_ASSERT(strd_num_n && strd_sz_n);
- buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
- obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
- sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
+ if (log_strd_sz < rxq->log_strd_sz)
+ log_strd_sz = rxq->log_strd_sz;
+ }
+ MLX5_ASSERT(log_strd_num && log_strd_sz);
+ buf_len = RTE_BIT32(log_strd_num) * RTE_BIT32(log_strd_sz);
+ obj_size = sizeof(struct mlx5_mprq_buf) + buf_len +
+ RTE_BIT32(log_strd_num) *
+ sizeof(struct rte_mbuf_ext_shared_info) +
+ RTE_PKTMBUF_HEADROOM;
/*
* Received packets can be either memcpy'd or externally referenced. In
* case that the packet is attached to an mbuf as an external buffer, as
@@ -1306,7 +1309,7 @@ mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
0, NULL, NULL, mlx5_mprq_buf_init,
- (void *)((uintptr_t)1 << strd_num_n),
+ (void *)((uintptr_t)1 << log_strd_num),
dev->device->numa_node, 0);
if (mp == NULL) {
DRV_LOG(ERR,
@@ -1411,15 +1414,18 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
!rx_seg[0].offset && !rx_seg[0].length;
- unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
- config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
- unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
- (1U << config->mprq.max_stride_size_n) ?
- log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
- unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
- (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
- (config->mprq.stride_size_n ?
- (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
+ unsigned int log_mprq_stride_nums = config->mprq.log_stride_num ?
+ config->mprq.log_stride_num : MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
+ unsigned int log_mprq_stride_size = non_scatter_min_mbuf_size <=
+ RTE_BIT32(config->mprq.log_max_stride_size) ?
+ log2above(non_scatter_min_mbuf_size) :
+ MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE;
+ unsigned int mprq_stride_cap = (config->mprq.log_stride_num ?
+ RTE_BIT32(config->mprq.log_stride_num) :
+ RTE_BIT32(log_mprq_stride_nums)) *
+ (config->mprq.log_stride_size ?
+ RTE_BIT32(config->mprq.log_stride_size) :
+ RTE_BIT32(log_mprq_stride_size));
/*
* Always allocate extra slots, even if eventually
* the vector Rx will not be used.
@@ -1431,7 +1437,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
(!!mprq_en) *
- (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
+ (desc >> log_mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
0, socket);
if (!tmpl) {
rte_errno = ENOMEM;
@@ -1527,37 +1533,37 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
* - MPRQ is enabled.
* - The number of descs is more than the number of strides.
* - max_rx_pkt_len plus overhead is less than the max size
- * of a stride or mprq_stride_size is specified by a user.
+ * of a stride or log_mprq_stride_size is specified by a user.
* Need to make sure that there are enough strides to encap
- * the maximum packet size in case mprq_stride_size is set.
+ * the maximum packet size in case log_mprq_stride_size is set.
* Otherwise, enable Rx scatter if necessary.
*/
- if (mprq_en && desc > (1U << mprq_stride_nums) &&
+ if (mprq_en && desc > RTE_BIT32(log_mprq_stride_nums) &&
(non_scatter_min_mbuf_size <=
- (1U << config->mprq.max_stride_size_n) ||
- (config->mprq.stride_size_n &&
+ RTE_BIT32(config->mprq.log_max_stride_size) ||
+ (config->mprq.log_stride_size &&
non_scatter_min_mbuf_size <= mprq_stride_cap))) {
/* TODO: Rx scatter isn't supported yet. */
tmpl->rxq.sges_n = 0;
/* Trim the number of descs needed. */
- desc >>= mprq_stride_nums;
- tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
- config->mprq.stride_num_n : mprq_stride_nums;
- tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
- config->mprq.stride_size_n : mprq_stride_size;
+ desc >>= log_mprq_stride_nums;
+ tmpl->rxq.log_strd_num = config->mprq.log_stride_num ?
+ config->mprq.log_stride_num : log_mprq_stride_nums;
+ tmpl->rxq.log_strd_sz = config->mprq.log_stride_size ?
+ config->mprq.log_stride_size : log_mprq_stride_size;
tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
tmpl->rxq.strd_scatter_en =
!!(offloads & DEV_RX_OFFLOAD_SCATTER);
tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
config->mprq.max_memcpy_len);
max_lro_size = RTE_MIN(max_rx_pkt_len,
- (1u << tmpl->rxq.strd_num_n) *
- (1u << tmpl->rxq.strd_sz_n));
+ RTE_BIT32(tmpl->rxq.log_strd_num) *
+ RTE_BIT32(tmpl->rxq.log_strd_sz));
DRV_LOG(DEBUG,
"port %u Rx queue %u: Multi-Packet RQ is enabled"
" strd_num_n = %u, strd_sz_n = %u",
dev->data->port_id, idx,
- tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
+ tmpl->rxq.log_strd_num, tmpl->rxq.log_strd_sz);
} else if (tmpl->rxq.rxseg_n == 1) {
MLX5_ASSERT(max_rx_pkt_len <= first_mb_free_size);
tmpl->rxq.sges_n = 0;
@@ -1600,15 +1606,15 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
" min_stride_sz = %u, max_stride_sz = %u).",
dev->data->port_id, non_scatter_min_mbuf_size,
desc, priv->rxqs_n,
- config->mprq.stride_size_n ?
- (1U << config->mprq.stride_size_n) :
- (1U << mprq_stride_size),
- config->mprq.stride_num_n ?
- (1U << config->mprq.stride_num_n) :
- (1U << mprq_stride_nums),
+ config->mprq.log_stride_size ?
+ RTE_BIT32(config->mprq.log_stride_size) :
+ RTE_BIT32(log_mprq_stride_size),
+ config->mprq.log_stride_num ?
+ RTE_BIT32(config->mprq.log_stride_num) :
+ RTE_BIT32(log_mprq_stride_nums),
config->mprq.min_rxqs_num,
- (1U << config->mprq.min_stride_size_n),
- (1U << config->mprq.max_stride_size_n));
+ RTE_BIT32(config->mprq.log_min_stride_size),
+ RTE_BIT32(config->mprq.log_max_stride_size));
DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
dev->data->port_id, 1 << tmpl->rxq.sges_n);
if (desc % (1 << tmpl->rxq.sges_n)) {
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 5012f2a74f..11a7c72053 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -465,7 +465,7 @@ rx_queue_count(struct mlx5_rxq_data *rxq)
const unsigned int cqe_n = (1 << rxq->cqe_n);
const unsigned int sges_n = (1 << rxq->sges_n);
const unsigned int elts_n = (1 << rxq->elts_n);
- const unsigned int strd_n = (1 << rxq->strd_num_n);
+ const unsigned int strd_n = RTE_BIT32(rxq->log_strd_num);
const unsigned int cqe_cnt = cqe_n - 1;
unsigned int cq_ci, used;
@@ -566,8 +566,8 @@ mlx5_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
qinfo->conf.offloads = dev->data->dev_conf.rxmode.offloads;
qinfo->scattered_rx = dev->data->scattered_rx;
qinfo->nb_desc = mlx5_rxq_mprq_enabled(rxq) ?
- (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
- (1 << rxq->elts_n);
+ RTE_BIT32(rxq->elts_n) * RTE_BIT32(rxq->log_strd_num) :
+ RTE_BIT32(rxq->elts_n);
}
/**
@@ -872,10 +872,10 @@ mlx5_rxq_initialize(struct mlx5_rxq_data *rxq)
scat = &((volatile struct mlx5_wqe_mprq *)
rxq->wqes)[i].dseg;
- addr = (uintptr_t)mlx5_mprq_buf_addr(buf,
- 1 << rxq->strd_num_n);
- byte_count = (1 << rxq->strd_sz_n) *
- (1 << rxq->strd_num_n);
+ addr = (uintptr_t)mlx5_mprq_buf_addr
+ (buf, RTE_BIT32(rxq->log_strd_num));
+ byte_count = RTE_BIT32(rxq->log_strd_sz) *
+ RTE_BIT32(rxq->log_strd_num);
} else {
struct rte_mbuf *buf = (*rxq->elts)[i];
@@ -899,7 +899,7 @@ mlx5_rxq_initialize(struct mlx5_rxq_data *rxq)
.ai = 0,
};
rxq->elts_ci = mlx5_rxq_mprq_enabled(rxq) ?
- (wqe_n >> rxq->sges_n) * (1 << rxq->strd_num_n) : 0;
+ (wqe_n >> rxq->sges_n) * RTE_BIT32(rxq->log_strd_num) : 0;
/* Update doorbell counter. */
rxq->rq_ci = wqe_n >> rxq->sges_n;
rte_io_wmb();
@@ -1004,7 +1004,7 @@ mlx5_rx_err_handle(struct mlx5_rxq_data *rxq, uint8_t vec)
const uint16_t cqe_n = 1 << rxq->cqe_n;
const uint16_t cqe_mask = cqe_n - 1;
const uint16_t wqe_n = 1 << rxq->elts_n;
- const uint16_t strd_n = 1 << rxq->strd_num_n;
+ const uint16_t strd_n = RTE_BIT32(rxq->log_strd_num);
struct mlx5_rxq_ctrl *rxq_ctrl =
container_of(rxq, struct mlx5_rxq_ctrl, rxq);
union {
@@ -1651,8 +1651,8 @@ uint16_t
mlx5_rx_burst_mprq(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
{
struct mlx5_rxq_data *rxq = dpdk_rxq;
- const uint32_t strd_n = 1 << rxq->strd_num_n;
- const uint32_t strd_sz = 1 << rxq->strd_sz_n;
+ const uint32_t strd_n = RTE_BIT32(rxq->log_strd_num);
+ const uint32_t strd_sz = RTE_BIT32(rxq->log_strd_sz);
const uint32_t cq_mask = (1 << rxq->cqe_n) - 1;
const uint32_t wq_mask = (1 << rxq->elts_n) - 1;
volatile struct mlx5_cqe *cqe = &(*rxq->cqes)[rxq->cq_ci & cq_mask];
diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index b2a891c8f6..cdde42ec6f 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -118,8 +118,8 @@ struct mlx5_rxq_data {
unsigned int elts_n:4; /* Log 2 of Mbufs. */
unsigned int rss_hash:1; /* RSS hash result is enabled. */
unsigned int mark:1; /* Marked flow available on the queue. */
- unsigned int strd_num_n:5; /* Log 2 of the number of stride. */
- unsigned int strd_sz_n:4; /* Log 2 of stride size. */
+ unsigned int log_strd_num:5; /* Log 2 of the number of stride. */
+ unsigned int log_strd_sz:4; /* Log 2 of stride size. */
unsigned int strd_shift_en:1; /* Enable 2bytes shift on a stride. */
unsigned int err_state:2; /* enum mlx5_rxq_err_state. */
unsigned int strd_scatter_en:1; /* Scattered packets from a stride. */
@@ -748,7 +748,7 @@ mlx5_timestamp_set(struct rte_mbuf *mbuf, int offset,
static __rte_always_inline void
mprq_buf_replace(struct mlx5_rxq_data *rxq, uint16_t rq_idx)
{
- const uint32_t strd_n = 1 << rxq->strd_num_n;
+ const uint32_t strd_n = RTE_BIT32(rxq->log_strd_num);
struct mlx5_mprq_buf *rep = rxq->mprq_repl;
volatile struct mlx5_wqe_data_seg *wqe =
&((volatile struct mlx5_wqe_mprq *)rxq->wqes)[rq_idx].dseg;
@@ -806,8 +806,8 @@ static __rte_always_inline enum mlx5_rqx_code
mprq_buf_to_pkt(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt, uint32_t len,
struct mlx5_mprq_buf *buf, uint16_t strd_idx, uint16_t strd_cnt)
{
- const uint32_t strd_n = 1 << rxq->strd_num_n;
- const uint16_t strd_sz = 1 << rxq->strd_sz_n;
+ const uint32_t strd_n = RTE_BIT32(rxq->log_strd_num);
+ const uint16_t strd_sz = RTE_BIT32(rxq->log_strd_sz);
const uint16_t strd_shift =
MLX5_MPRQ_STRIDE_SHIFT_BYTE * rxq->strd_shift_en;
const int32_t hdrm_overlap =
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_vec.c
index 1536a462dc..d156de4ec1 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec.c
@@ -142,7 +142,7 @@ static inline void
mlx5_rx_mprq_replenish_bulk_mbuf(struct mlx5_rxq_data *rxq)
{
const uint16_t wqe_n = 1 << rxq->elts_n;
- const uint32_t strd_n = 1 << rxq->strd_num_n;
+ const uint32_t strd_n = RTE_BIT32(rxq->log_strd_num);
const uint32_t elts_n = wqe_n * strd_n;
const uint32_t wqe_mask = elts_n - 1;
uint32_t n = elts_n - (rxq->elts_ci - rxq->rq_pi);
@@ -191,8 +191,8 @@ rxq_copy_mprq_mbuf_v(struct mlx5_rxq_data *rxq,
{
const uint16_t wqe_n = 1 << rxq->elts_n;
const uint16_t wqe_mask = wqe_n - 1;
- const uint16_t strd_sz = 1 << rxq->strd_sz_n;
- const uint32_t strd_n = 1 << rxq->strd_num_n;
+ const uint16_t strd_sz = RTE_BIT32(rxq->log_strd_sz);
+ const uint32_t strd_n = RTE_BIT32(rxq->log_strd_num);
const uint32_t elts_n = wqe_n * strd_n;
const uint32_t elts_mask = elts_n - 1;
uint32_t elts_idx = rxq->rq_pi & elts_mask;
@@ -422,7 +422,7 @@ rxq_burst_mprq_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts,
const uint16_t q_n = 1 << rxq->cqe_n;
const uint16_t q_mask = q_n - 1;
const uint16_t wqe_n = 1 << rxq->elts_n;
- const uint32_t strd_n = 1 << rxq->strd_num_n;
+ const uint32_t strd_n = RTE_BIT32(rxq->log_strd_num);
const uint32_t elts_n = wqe_n * strd_n;
const uint32_t elts_mask = elts_n - 1;
volatile struct mlx5_cqe *cq;
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 20.11 3/5] net/mlx5: fix MPRQ stride devargs adjustment
2022-02-21 19:46 [PATCH 20.11 0/5] mlx5: some fixes Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 1/5] common/mlx5: add minimum WQE size for striding RQ Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 2/5] net/mlx5: improve stride parameter names Michael Baum
@ 2022-02-21 19:46 ` Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 4/5] net/mlx5: fix memory socket selection in ASO management Michael Baum
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Michael Baum @ 2022-02-21 19:46 UTC (permalink / raw)
To: stable; +Cc: Matan Azrad, Viacheslav Ovsiienko
[ upstream commit 34776af600df4475799ad8004e76d0eb77c163ff ]
In Multi-Packet RQ creation, the user can choose the number of strides
and their size in bytes. The user updates it using specific devargs for
both of these parameters.
The above two parameters determine the size of the WQE which is actually
their product of multiplication.
If the user selects values that are not in the supported range, the PMD
changes them to default values. However, apart from the range
limitations for each parameter individually there is also a minimum
value on their multiplication. When the user selects values that their
multiplication are lower than minimum value, no adjustment is made and
the creation of the WQE fails.
This patch adds an adjustment in these cases as well. When the user
selects values whose multiplication is lower than the minimum, they are
replaced with the default values.
Fixes: ecb160456aed ("net/mlx5: add device parameter for MPRQ stride size")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 48 ++-----
drivers/net/mlx5/mlx5.h | 4 +
drivers/net/mlx5/mlx5_rxq.c | 209 +++++++++++++++++++++----------
3 files changed, 154 insertions(+), 107 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 8cd120d467..7ddc1551cd 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -758,10 +758,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
unsigned int mpls_en = 0;
unsigned int swp = 0;
unsigned int mprq = 0;
- unsigned int mprq_min_stride_size_n = 0;
- unsigned int mprq_max_stride_size_n = 0;
- unsigned int mprq_min_stride_num_n = 0;
- unsigned int mprq_max_stride_num_n = 0;
struct rte_ether_addr mac;
char name[RTE_ETH_NAME_MAX_LEN];
int own_domain_id = 0;
@@ -934,13 +930,13 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
mprq_caps.supported_qpts);
DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
mprq = 1;
- mprq_min_stride_size_n =
+ config->mprq.log_min_stride_size =
mprq_caps.min_single_stride_log_num_of_bytes;
- mprq_max_stride_size_n =
+ config->mprq.log_max_stride_size =
mprq_caps.max_single_stride_log_num_of_bytes;
- mprq_min_stride_num_n =
+ config->mprq.log_min_stride_num =
mprq_caps.min_single_wqe_log_num_of_strides;
- mprq_max_stride_num_n =
+ config->mprq.log_max_stride_num =
mprq_caps.max_single_wqe_log_num_of_strides;
}
#endif
@@ -1178,12 +1174,17 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
config->mps == MLX5_MPW ? "legacy " : "",
config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
+ config->mprq.log_min_stride_wqe_size =
+ MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
+ config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
if (config->devx) {
err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
if (err) {
err = -err;
goto error;
}
+ config->mprq.log_min_stride_wqe_size =
+ config->hca_attr.log_min_stride_wqe_sz;
sh->rq_ts_format = config->hca_attr.rq_ts_format;
sh->sq_ts_format = config->hca_attr.sq_ts_format;
sh->qp_ts_format = config->hca_attr.qp_ts_format;
@@ -1382,36 +1383,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
config->hw_fcs_strip = 0;
DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
(config->hw_fcs_strip ? "" : "not "));
- if (config->mprq.enabled && mprq) {
- if (config->mprq.log_stride_num &&
- (config->mprq.log_stride_num > mprq_max_stride_num_n ||
- config->mprq.log_stride_num < mprq_min_stride_num_n)) {
- config->mprq.log_stride_num =
- RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM,
- mprq_min_stride_num_n),
- mprq_max_stride_num_n);
- DRV_LOG(WARNING,
- "the number of strides"
- " for Multi-Packet RQ is out of range,"
- " setting default value (%u)",
- 1 << config->mprq.log_stride_num);
- }
- if (config->mprq.log_stride_size &&
- (config->mprq.log_stride_size > mprq_max_stride_size_n ||
- config->mprq.log_stride_size < mprq_min_stride_size_n)) {
- config->mprq.log_stride_size =
- RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE,
- mprq_min_stride_size_n),
- mprq_max_stride_size_n);
- DRV_LOG(WARNING,
- "the size of a stride"
- " for Multi-Packet RQ is out of range,"
- " setting default value (%u)",
- 1 << config->mprq.log_stride_size);
- }
- config->mprq.log_min_stride_size = mprq_min_stride_size_n;
- config->mprq.log_max_stride_size = mprq_max_stride_size_n;
- } else if (config->mprq.enabled && !mprq) {
+ if (config->mprq.enabled && !mprq) {
DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
config->mprq.enabled = 0;
}
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 642fa804ef..2b8e2c8ebb 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -232,6 +232,10 @@ struct mlx5_dev_config {
unsigned int log_stride_size; /* Log size of a stride. */
unsigned int log_min_stride_size; /* Log min size of a stride.*/
unsigned int log_max_stride_size; /* Log max size of a stride.*/
+ unsigned int log_min_stride_num; /* Log min num of strides. */
+ unsigned int log_max_stride_num; /* Log max num of strides. */
+ unsigned int log_min_stride_wqe_size;
+ /* Log min WQE size, (size of single stride)*(num of strides).*/
unsigned int max_memcpy_len;
/* Maximum packet size to memcpy Rx packets. */
unsigned int min_rxqs_num;
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index cba673fee6..c4c81aa68f 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -1378,6 +1378,127 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
}
+/**
+ * Prepare both size and number of stride for Multi-Packet RQ.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ * @param idx
+ * RX queue index.
+ * @param desc
+ * Number of descriptors to configure in queue.
+ * @param rx_seg_en
+ * Indicator if Rx segment enables, if so Multi-Packet RQ doesn't enable.
+ * @param min_mbuf_size
+ * Non scatter min mbuf size, max_rx_pktlen plus overhead.
+ * @param actual_log_stride_num
+ * Log number of strides to configure for this queue.
+ * @param actual_log_stride_size
+ * Log stride size to configure for this queue.
+ *
+ * @return
+ * 0 if Multi-Packet RQ is supported, otherwise -1.
+ */
+static int
+mlx5_mprq_prepare(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
+ bool rx_seg_en, uint32_t min_mbuf_size,
+ uint32_t *actual_log_stride_num,
+ uint32_t *actual_log_stride_size)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_dev_config *config = &priv->config;
+ uint32_t log_min_stride_num = config->mprq.log_min_stride_num;
+ uint32_t log_max_stride_num = config->mprq.log_max_stride_num;
+ uint32_t log_def_stride_num =
+ RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM,
+ log_min_stride_num),
+ log_max_stride_num);
+ uint32_t log_min_stride_size = config->mprq.log_min_stride_size;
+ uint32_t log_max_stride_size = config->mprq.log_max_stride_size;
+ uint32_t log_def_stride_size =
+ RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE,
+ log_min_stride_size),
+ log_max_stride_size);
+ uint32_t log_stride_wqe_size;
+
+ if (mlx5_check_mprq_support(dev) != 1 || rx_seg_en)
+ goto unsupport;
+ /* Checks if chosen number of strides is in supported range. */
+ if (config->mprq.log_stride_num > log_max_stride_num ||
+ config->mprq.log_stride_num < log_min_stride_num) {
+ *actual_log_stride_num = log_def_stride_num;
+ DRV_LOG(WARNING,
+ "Port %u Rx queue %u number of strides for Multi-Packet RQ is out of range, setting default value (%u)",
+ dev->data->port_id, idx, RTE_BIT32(log_def_stride_num));
+ } else {
+ *actual_log_stride_num = config->mprq.log_stride_num;
+ }
+ if (config->mprq.log_stride_size) {
+ /* Checks if chosen size of stride is in supported range. */
+ if (config->mprq.log_stride_size > log_max_stride_size ||
+ config->mprq.log_stride_size < log_min_stride_size) {
+ *actual_log_stride_size = log_def_stride_size;
+ DRV_LOG(WARNING,
+ "Port %u Rx queue %u size of a stride for Multi-Packet RQ is out of range, setting default value (%u)",
+ dev->data->port_id, idx,
+ RTE_BIT32(log_def_stride_size));
+ } else {
+ *actual_log_stride_size = config->mprq.log_stride_size;
+ }
+ } else {
+ if (min_mbuf_size <= RTE_BIT32(log_max_stride_size))
+ *actual_log_stride_size = log2above(min_mbuf_size);
+ else
+ goto unsupport;
+ }
+ log_stride_wqe_size = *actual_log_stride_num + *actual_log_stride_size;
+ /* Check if WQE buffer size is supported by hardware. */
+ if (log_stride_wqe_size < config->mprq.log_min_stride_wqe_size) {
+ *actual_log_stride_num = log_def_stride_num;
+ *actual_log_stride_size = log_def_stride_size;
+ DRV_LOG(WARNING,
+ "Port %u Rx queue %u size of WQE buffer for Multi-Packet RQ is too small, setting default values (stride_num_n=%u, stride_size_n=%u)",
+ dev->data->port_id, idx, RTE_BIT32(log_def_stride_num),
+ RTE_BIT32(log_def_stride_size));
+ log_stride_wqe_size = log_def_stride_num + log_def_stride_size;
+ }
+ MLX5_ASSERT(log_stride_wqe_size >=
+ config->mprq.log_min_stride_wqe_size);
+ if (desc <= RTE_BIT32(*actual_log_stride_num))
+ goto unsupport;
+ if (min_mbuf_size > RTE_BIT32(log_stride_wqe_size)) {
+ DRV_LOG(WARNING, "Port %u Rx queue %u "
+ "Multi-Packet RQ is unsupported, WQE buffer size (%u) "
+ "is smaller than min mbuf size (%u)",
+ dev->data->port_id, idx, RTE_BIT32(log_stride_wqe_size),
+ min_mbuf_size);
+ goto unsupport;
+ }
+ DRV_LOG(DEBUG, "Port %u Rx queue %u "
+ "Multi-Packet RQ is enabled strd_num_n = %u, strd_sz_n = %u",
+ dev->data->port_id, idx, RTE_BIT32(*actual_log_stride_num),
+ RTE_BIT32(*actual_log_stride_size));
+ return 0;
+unsupport:
+ if (config->mprq.enabled)
+ DRV_LOG(WARNING,
+ "Port %u MPRQ is requested but cannot be enabled\n"
+ " (requested: pkt_sz = %u, desc_num = %u,"
+ " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
+ " supported: min_rxqs_num = %u, min_buf_wqe_sz = %u"
+ " min_stride_sz = %u, max_stride_sz = %u).\n"
+ "Rx segment is %senable.",
+ dev->data->port_id, min_mbuf_size, desc, priv->rxqs_n,
+ RTE_BIT32(config->mprq.log_stride_size),
+ RTE_BIT32(config->mprq.log_stride_num),
+ config->mprq.min_rxqs_num,
+ RTE_BIT32(config->mprq.log_min_stride_wqe_size),
+ RTE_BIT32(config->mprq.log_min_stride_size),
+ RTE_BIT32(config->mprq.log_max_stride_size),
+ rx_seg_en ? "" : "not ");
+ return -1;
+}
+
/**
* Create a DPDK Rx queue.
*
@@ -1412,33 +1533,28 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
RTE_PKTMBUF_HEADROOM;
unsigned int max_lro_size = 0;
unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
- const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
- !rx_seg[0].offset && !rx_seg[0].length;
- unsigned int log_mprq_stride_nums = config->mprq.log_stride_num ?
- config->mprq.log_stride_num : MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
- unsigned int log_mprq_stride_size = non_scatter_min_mbuf_size <=
- RTE_BIT32(config->mprq.log_max_stride_size) ?
- log2above(non_scatter_min_mbuf_size) :
- MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE;
- unsigned int mprq_stride_cap = (config->mprq.log_stride_num ?
- RTE_BIT32(config->mprq.log_stride_num) :
- RTE_BIT32(log_mprq_stride_nums)) *
- (config->mprq.log_stride_size ?
- RTE_BIT32(config->mprq.log_stride_size) :
- RTE_BIT32(log_mprq_stride_size));
+ uint32_t mprq_log_actual_stride_num = 0;
+ uint32_t mprq_log_actual_stride_size = 0;
+ bool rx_seg_en = n_seg != 1 || rx_seg[0].offset || rx_seg[0].length;
+ const int mprq_en = !mlx5_mprq_prepare(dev, idx, desc, rx_seg_en,
+ non_scatter_min_mbuf_size,
+ &mprq_log_actual_stride_num,
+ &mprq_log_actual_stride_size);
/*
* Always allocate extra slots, even if eventually
* the vector Rx will not be used.
*/
uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
+ size_t alloc_size = sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *);
const struct rte_eth_rxseg_split *qs_seg = rx_seg;
unsigned int tail_len;
- tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
- sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
- (!!mprq_en) *
- (desc >> log_mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
- 0, socket);
+ if (mprq_en) {
+ /* Trim the number of descs needed. */
+ desc >>= mprq_log_actual_stride_num;
+ alloc_size += desc * sizeof(struct mlx5_mprq_buf *);
+ }
+ tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, alloc_size, 0, socket);
if (!tmpl) {
rte_errno = ENOMEM;
return NULL;
@@ -1527,30 +1643,11 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
tmpl->socket = socket;
if (dev->data->dev_conf.intr_conf.rxq)
tmpl->irq = 1;
- /*
- * This Rx queue can be configured as a Multi-Packet RQ if all of the
- * following conditions are met:
- * - MPRQ is enabled.
- * - The number of descs is more than the number of strides.
- * - max_rx_pkt_len plus overhead is less than the max size
- * of a stride or log_mprq_stride_size is specified by a user.
- * Need to make sure that there are enough strides to encap
- * the maximum packet size in case log_mprq_stride_size is set.
- * Otherwise, enable Rx scatter if necessary.
- */
- if (mprq_en && desc > RTE_BIT32(log_mprq_stride_nums) &&
- (non_scatter_min_mbuf_size <=
- RTE_BIT32(config->mprq.log_max_stride_size) ||
- (config->mprq.log_stride_size &&
- non_scatter_min_mbuf_size <= mprq_stride_cap))) {
+ if (mprq_en) {
/* TODO: Rx scatter isn't supported yet. */
tmpl->rxq.sges_n = 0;
- /* Trim the number of descs needed. */
- desc >>= log_mprq_stride_nums;
- tmpl->rxq.log_strd_num = config->mprq.log_stride_num ?
- config->mprq.log_stride_num : log_mprq_stride_nums;
- tmpl->rxq.log_strd_sz = config->mprq.log_stride_size ?
- config->mprq.log_stride_size : log_mprq_stride_size;
+ tmpl->rxq.log_strd_num = mprq_log_actual_stride_num;
+ tmpl->rxq.log_strd_sz = mprq_log_actual_stride_size;
tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
tmpl->rxq.strd_scatter_en =
!!(offloads & DEV_RX_OFFLOAD_SCATTER);
@@ -1559,11 +1656,6 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
max_lro_size = RTE_MIN(max_rx_pkt_len,
RTE_BIT32(tmpl->rxq.log_strd_num) *
RTE_BIT32(tmpl->rxq.log_strd_sz));
- DRV_LOG(DEBUG,
- "port %u Rx queue %u: Multi-Packet RQ is enabled"
- " strd_num_n = %u, strd_sz_n = %u",
- dev->data->port_id, idx,
- tmpl->rxq.log_strd_num, tmpl->rxq.log_strd_sz);
} else if (tmpl->rxq.rxseg_n == 1) {
MLX5_ASSERT(max_rx_pkt_len <= first_mb_free_size);
tmpl->rxq.sges_n = 0;
@@ -1597,24 +1689,6 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
tmpl->rxq.sges_n = sges_n;
max_lro_size = max_rx_pkt_len;
}
- if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
- DRV_LOG(WARNING,
- "port %u MPRQ is requested but cannot be enabled\n"
- " (requested: pkt_sz = %u, desc_num = %u,"
- " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
- " supported: min_rxqs_num = %u,"
- " min_stride_sz = %u, max_stride_sz = %u).",
- dev->data->port_id, non_scatter_min_mbuf_size,
- desc, priv->rxqs_n,
- config->mprq.log_stride_size ?
- RTE_BIT32(config->mprq.log_stride_size) :
- RTE_BIT32(log_mprq_stride_size),
- config->mprq.log_stride_num ?
- RTE_BIT32(config->mprq.log_stride_num) :
- RTE_BIT32(log_mprq_stride_nums),
- config->mprq.min_rxqs_num,
- RTE_BIT32(config->mprq.log_min_stride_size),
- RTE_BIT32(config->mprq.log_max_stride_size));
DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
dev->data->port_id, 1 << tmpl->rxq.sges_n);
if (desc % (1 << tmpl->rxq.sges_n)) {
@@ -1672,17 +1746,14 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
dev->data->port_id,
tmpl->rxq.crc_present ? "disabled" : "enabled",
tmpl->rxq.crc_present << 2);
- /* Save port ID. */
tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
(!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
tmpl->rxq.port_id = dev->data->port_id;
tmpl->priv = priv;
tmpl->rxq.mp = rx_seg[0].mp;
tmpl->rxq.elts_n = log2above(desc);
- tmpl->rxq.rq_repl_thresh =
- MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
- tmpl->rxq.elts =
- (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
+ tmpl->rxq.rq_repl_thresh = MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
+ tmpl->rxq.elts = (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
tmpl->rxq.mprq_bufs =
(struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
#ifndef RTE_ARCH_64
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 20.11 4/5] net/mlx5: fix memory socket selection in ASO management
2022-02-21 19:46 [PATCH 20.11 0/5] mlx5: some fixes Michael Baum
` (2 preceding siblings ...)
2022-02-21 19:46 ` [PATCH 20.11 3/5] net/mlx5: fix MPRQ stride devargs adjustment Michael Baum
@ 2022-02-21 19:46 ` Michael Baum
2022-02-21 19:46 ` [PATCH 20.11 5/5] common/mlx5: fix error handling in multi-class probe Michael Baum
2022-02-22 14:32 ` [PATCH 20.11 0/5] mlx5: some fixes Luca Boccassi
5 siblings, 0 replies; 8+ messages in thread
From: Michael Baum @ 2022-02-21 19:46 UTC (permalink / raw)
To: stable; +Cc: Matan Azrad, Viacheslav Ovsiienko
[ upstream commit 147f6fb42bd7637b37a9180b0774275531c05f9b ]
In ASO objects creation (WQE, CQE and MR), socket number is given as
a parameter.
The selection was wrongly socket 0 hardcoded even if the user didn't
configure memory for this socket.
This patch replaces the selection to default socket (SOCKET_ID_ANY).
Fixes: f935ed4b645a ("net/mlx5: support flow hit action for aging")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_age.c | 27 +++++++++++----------------
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_age.c b/drivers/net/mlx5/mlx5_flow_age.c
index 6c4ee0d33c..aae7a3758a 100644
--- a/drivers/net/mlx5/mlx5_flow_age.c
+++ b/drivers/net/mlx5/mlx5_flow_age.c
@@ -38,8 +38,6 @@ mlx5_aso_cq_destroy(struct mlx5_aso_cq *cq)
* Pointer to CQ to create.
* @param[in] log_desc_n
* Log of number of descriptors in queue.
- * @param[in] socket
- * Socket to use for allocation.
* @param[in] uar_page_id
* UAR page ID to use.
* @param[in] eqn
@@ -50,7 +48,7 @@ mlx5_aso_cq_destroy(struct mlx5_aso_cq *cq)
*/
static int
mlx5_aso_cq_create(void *ctx, struct mlx5_aso_cq *cq, uint16_t log_desc_n,
- int socket, int uar_page_id, uint32_t eqn)
+ int uar_page_id, uint32_t eqn)
{
struct mlx5_devx_cq_attr attr = { 0 };
size_t pgsize = sysconf(_SC_PAGESIZE);
@@ -60,7 +58,7 @@ mlx5_aso_cq_create(void *ctx, struct mlx5_aso_cq *cq, uint16_t log_desc_n,
cq->log_desc_n = log_desc_n;
umem_size = sizeof(struct mlx5_cqe) * cq_size + sizeof(*cq->db_rec) * 2;
cq->umem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size,
- 4096, socket);
+ 4096, SOCKET_ID_ANY);
if (!cq->umem_buf) {
DRV_LOG(ERR, "Failed to allocate memory for CQ.");
rte_errno = ENOMEM;
@@ -123,8 +121,6 @@ mlx5_aso_devx_dereg_mr(struct mlx5_aso_devx_mr *mr)
* Size of MR buffer.
* @param[in/out] mr
* Pointer to MR to create.
- * @param[in] socket
- * Socket to use for allocation.
* @param[in] pdn
* Protection Domain number to use.
*
@@ -133,12 +129,12 @@ mlx5_aso_devx_dereg_mr(struct mlx5_aso_devx_mr *mr)
*/
static int
mlx5_aso_devx_reg_mr(void *ctx, size_t length, struct mlx5_aso_devx_mr *mr,
- int socket, int pdn)
+ int pdn)
{
struct mlx5_devx_mkey_attr mkey_attr;
mr->buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, length, 4096,
- socket);
+ SOCKET_ID_ANY);
if (!mr->buf) {
DRV_LOG(ERR, "Failed to create ASO bits mem for MR by Devx.");
return -1;
@@ -240,8 +236,6 @@ mlx5_aso_init_sq(struct mlx5_aso_sq *sq)
* Context returned from mlx5 open_device() glue function.
* @param[in/out] sq
* Pointer to SQ to create.
- * @param[in] socket
- * Socket to use for allocation.
* @param[in] uar
* User Access Region object.
* @param[in] pdn
@@ -255,7 +249,7 @@ mlx5_aso_init_sq(struct mlx5_aso_sq *sq)
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq, int socket,
+mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
struct mlx5dv_devx_uar *uar, uint32_t pdn,
uint32_t eqn, uint16_t log_desc_n, uint32_t ts_format)
{
@@ -268,14 +262,15 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq, int socket,
int ret;
if (mlx5_aso_devx_reg_mr(ctx, (MLX5_ASO_AGE_ACTIONS_PER_POOL / 8) *
- sq_desc_n, &sq->mr, socket, pdn))
+ sq_desc_n, &sq->mr, pdn))
return -1;
- if (mlx5_aso_cq_create(ctx, &sq->cq, log_desc_n, socket,
+ if (mlx5_aso_cq_create(ctx, &sq->cq, log_desc_n,
mlx5_os_get_devx_uar_page_id(uar), eqn))
goto error;
sq->log_desc_n = log_desc_n;
- sq->umem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, wq_size +
- sizeof(*sq->db_rec) * 2, 4096, socket);
+ sq->umem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
+ wq_size + sizeof(*sq->db_rec) * 2,
+ 4096, SOCKET_ID_ANY);
if (!sq->umem_buf) {
DRV_LOG(ERR, "Can't allocate wqe buffer.");
rte_errno = ENOMEM;
@@ -347,7 +342,7 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq, int socket,
int
mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh)
{
- return mlx5_aso_sq_create(sh->ctx, &sh->aso_age_mng->aso_sq, 0,
+ return mlx5_aso_sq_create(sh->ctx, &sh->aso_age_mng->aso_sq,
sh->tx_uar, sh->pdn, sh->eqn,
MLX5_ASO_QUEUE_LOG_DESC, sh->sq_ts_format);
}
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 20.11 5/5] common/mlx5: fix error handling in multi-class probe
2022-02-21 19:46 [PATCH 20.11 0/5] mlx5: some fixes Michael Baum
` (3 preceding siblings ...)
2022-02-21 19:46 ` [PATCH 20.11 4/5] net/mlx5: fix memory socket selection in ASO management Michael Baum
@ 2022-02-21 19:46 ` Michael Baum
2022-02-22 14:32 ` [PATCH 20.11 0/5] mlx5: some fixes Luca Boccassi
5 siblings, 0 replies; 8+ messages in thread
From: Michael Baum @ 2022-02-21 19:46 UTC (permalink / raw)
To: stable; +Cc: Matan Azrad, Viacheslav Ovsiienko
[ upstream commit 8928997a1388ba1b045a55732acced4baf00b21d ]
The common drivers_probe function calls in a loop to all probe functions
for classes requested by the user. After it manages to probe them all,
it updates this on the device in the "classes_loaded" field.
If one of them fails, all those probed to it are remove using the
drivers_remove function. However, this function only releases the
classes in the "classes_loaded" field on the given device and misses the
newly probed classes.
This patch removes the condition from the release function, and ensures
that the caller function sends a more accurate parameter.
Fixes: 8a41f4deccc3 ("common/mlx5: introduce layer for multiple class drivers")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/common/mlx5/mlx5_common_pci.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_common_pci.c b/drivers/common/mlx5/mlx5_common_pci.c
index 5208972bb6..fa6e89efd3 100644
--- a/drivers/common/mlx5/mlx5_common_pci.c
+++ b/drivers/common/mlx5/mlx5_common_pci.c
@@ -203,7 +203,6 @@ drivers_remove(struct mlx5_pci_device *dev, uint32_t enabled_classes)
unsigned int i = 0;
int ret = 0;
- enabled_classes &= dev->classes_loaded;
while (enabled_classes) {
driver = driver_get(RTE_BIT64(i));
if (driver) {
@@ -254,9 +253,11 @@ drivers_probe(struct mlx5_pci_device *dev, struct rte_pci_driver *pci_drv,
dev->classes_loaded |= enabled_classes;
return 0;
probe_err:
- /* Only unload drivers which are enabled which were enabled
- * in this probe instance.
+ /*
+ * Need to remove only drivers which were not probed before this probe
+ * instance, but have already been probed before this failure.
*/
+ enabled_classes &= ~dev->classes_loaded;
drivers_remove(dev, enabled_classes);
return ret;
}
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 20.11 0/5] mlx5: some fixes
2022-02-21 19:46 [PATCH 20.11 0/5] mlx5: some fixes Michael Baum
` (4 preceding siblings ...)
2022-02-21 19:46 ` [PATCH 20.11 5/5] common/mlx5: fix error handling in multi-class probe Michael Baum
@ 2022-02-22 14:32 ` Luca Boccassi
2022-02-23 16:06 ` Michael Baum
5 siblings, 1 reply; 8+ messages in thread
From: Luca Boccassi @ 2022-02-22 14:32 UTC (permalink / raw)
To: Michael Baum, stable; +Cc: Matan Azrad, Viacheslav Ovsiienko, akozyrev
On Mon, 2022-02-21 at 21:46 +0200, Michael Baum wrote:
> Backport some fixes to 20.11.5
>
> The upstream commits:
> - 10599cf83e common/mlx5: add minimum WQE size for striding RQ
> - 8928997a13 common/mlx5: fix error handling in multi-class probe
> - 147f6fb42b net/mlx5: fix memory socket selection in ASO management
> - 34776af600 net/mlx5: fix MPRQ stride devargs adjustment
> - 0947ed380f net/mlx5: improve stride parameter names
>
> The following commit [1] sent by Alexander Kozyrev fixes one of them
> [2], so I integrated it inside.
>
> [1] 728b6447e7 net/mlx5: fix MPRQ WQE size assertion
>
> [2] 34776af600 net/mlx5: fix MPRQ stride devargs adjustment
>
> Cc: akozyrev@nvidia.com
>
> Michael Baum (5):
> common/mlx5: add minimum WQE size for striding RQ
> net/mlx5: improve stride parameter names
> net/mlx5: fix MPRQ stride devargs adjustment
> net/mlx5: fix memory socket selection in ASO management
> common/mlx5: fix error handling in multi-class probe
>
> drivers/common/mlx5/mlx5_common_pci.c | 7 +-
> drivers/common/mlx5/mlx5_devx_cmds.c | 28 +++
> drivers/common/mlx5/mlx5_devx_cmds.h | 1 +
> drivers/common/mlx5/mlx5_prm.h | 38 +++-
> drivers/net/mlx5/linux/mlx5_os.c | 48 ++---
> drivers/net/mlx5/linux/mlx5_verbs.c | 4 +-
> drivers/net/mlx5/mlx5.c | 4 +-
> drivers/net/mlx5/mlx5.h | 12 +-
> drivers/net/mlx5/mlx5_defs.h | 4 +-
> drivers/net/mlx5/mlx5_devx.c | 4 +-
> drivers/net/mlx5/mlx5_flow_age.c | 27 ++-
> drivers/net/mlx5/mlx5_rxq.c | 249 +++++++++++++++++---------
> drivers/net/mlx5/mlx5_rxtx.c | 22 +--
> drivers/net/mlx5/mlx5_rxtx.h | 10 +-
> drivers/net/mlx5/mlx5_rxtx_vec.c | 8 +-
> 15 files changed, 290 insertions(+), 176 deletions(-)
>
The second patch does not apply:
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@@ -205,9 -205,9 +205,15 @@@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctr
{
const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
++<<<<<<< HEAD
+ (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
+ (1 << rxq_ctrl->rxq.elts_n);
+ bool has_vec_support = mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0;
++=======
+ RTE_BIT32(rxq_ctrl->rxq.elts_n) *
+ RTE_BIT32(rxq_ctrl->rxq.log_strd_num) :
+ RTE_BIT32(rxq_ctrl->rxq.elts_n);
++>>>>>>> net/mlx5: improve stride parameter names
unsigned int i;
int err;
Did you test it with the 20.11 branch from the staging area at
https://github.com/bluca/dpdk-stable.git ?
--
Kind regards,
Luca Boccassi
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH 20.11 0/5] mlx5: some fixes
2022-02-22 14:32 ` [PATCH 20.11 0/5] mlx5: some fixes Luca Boccassi
@ 2022-02-23 16:06 ` Michael Baum
0 siblings, 0 replies; 8+ messages in thread
From: Michael Baum @ 2022-02-23 16:06 UTC (permalink / raw)
To: Luca Boccassi, stable; +Cc: Matan Azrad, Slava Ovsiienko, Alexander Kozyrev
Hi
> -----Original Message-----
> From: Luca Boccassi <bluca@debian.org>
> Sent: Tuesday, February 22, 2022 4:33 PM
> To: Michael Baum <michaelba@nvidia.com>; stable@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Alexander Kozyrev <akozyrev@nvidia.com>
> Subject: Re: [PATCH 20.11 0/5] mlx5: some fixes
>
> External email: Use caution opening links or attachments
>
>
> On Mon, 2022-02-21 at 21:46 +0200, Michael Baum wrote:
> > Backport some fixes to 20.11.5
> >
> > The upstream commits:
> > - 10599cf83e common/mlx5: add minimum WQE size for striding RQ
> > - 8928997a13 common/mlx5: fix error handling in multi-class probe
> > - 147f6fb42b net/mlx5: fix memory socket selection in ASO management
> > - 34776af600 net/mlx5: fix MPRQ stride devargs adjustment
> > - 0947ed380f net/mlx5: improve stride parameter names
> >
> > The following commit [1] sent by Alexander Kozyrev fixes one of them
> > [2], so I integrated it inside.
> >
> > [1] 728b6447e7 net/mlx5: fix MPRQ WQE size assertion
> >
> > [2] 34776af600 net/mlx5: fix MPRQ stride devargs adjustment
> >
> > Cc: akozyrev@nvidia.com
> >
> > Michael Baum (5):
> > common/mlx5: add minimum WQE size for striding RQ
> > net/mlx5: improve stride parameter names
> > net/mlx5: fix MPRQ stride devargs adjustment
> > net/mlx5: fix memory socket selection in ASO management
> > common/mlx5: fix error handling in multi-class probe
> >
> > drivers/common/mlx5/mlx5_common_pci.c | 7 +-
> > drivers/common/mlx5/mlx5_devx_cmds.c | 28 +++
> > drivers/common/mlx5/mlx5_devx_cmds.h | 1 +
> > drivers/common/mlx5/mlx5_prm.h | 38 +++-
> > drivers/net/mlx5/linux/mlx5_os.c | 48 ++---
> > drivers/net/mlx5/linux/mlx5_verbs.c | 4 +-
> > drivers/net/mlx5/mlx5.c | 4 +-
> > drivers/net/mlx5/mlx5.h | 12 +-
> > drivers/net/mlx5/mlx5_defs.h | 4 +-
> > drivers/net/mlx5/mlx5_devx.c | 4 +-
> > drivers/net/mlx5/mlx5_flow_age.c | 27 ++-
> > drivers/net/mlx5/mlx5_rxq.c | 249 +++++++++++++++++---------
> > drivers/net/mlx5/mlx5_rxtx.c | 22 +--
> > drivers/net/mlx5/mlx5_rxtx.h | 10 +-
> > drivers/net/mlx5/mlx5_rxtx_vec.c | 8 +-
> > 15 files changed, 290 insertions(+), 176 deletions(-)
> >
>
> The second patch does not apply:
>
> --- a/drivers/net/mlx5/mlx5_rxq.c
> +++ b/drivers/net/mlx5/mlx5_rxq.c
> @@@ -205,9 -205,9 +205,15 @@@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctr
> {
> const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
> unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
> ++<<<<<<< HEAD
> + (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
> + (1 << rxq_ctrl->rxq.elts_n);
> + bool has_vec_support = mlx5_rxq_check_vec_support(&rxq_ctrl->rxq)
> > 0;
> ++=======
> + RTE_BIT32(rxq_ctrl->rxq.elts_n) *
> + RTE_BIT32(rxq_ctrl->rxq.log_strd_num) :
> + RTE_BIT32(rxq_ctrl->rxq.elts_n);
> ++>>>>>>> net/mlx5: improve stride parameter names
> unsigned int i;
> int err;
>
> Did you test it with the 20.11 branch from the staging area at
> https://github.com/bluca/dpdk-stable.git ?
I'm sorry, I made a mistake in the branch.
I'm sending v2.
>
> --
> Kind regards,
> Luca Boccassi
^ permalink raw reply [flat|nested] 8+ messages in thread