From: Michael Baum <michaelba@nvidia.com>
To: <stable@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Xueming Li <xuemingl@nvidia.com>
Subject: [PATCH 20.11] net/mlx5: workaround ASO memory region creation
Date: Wed, 9 Mar 2022 13:52:24 +0200 [thread overview]
Message-ID: <20220309115224.820658-1-michaelba@nvidia.com> (raw)
[ upstream commit cd414f81d1afdabf5cf13a1d9e859877af176ab9 ]
Due to kernel issue in direct MKEY creation using the DevX API for
physical memory, this patch replaces the ASO MR creation to use Verbs
API.
Fixes: f935ed4b645a ("net/mlx5: support flow hit action for aging")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/common/mlx5/linux/mlx5_common_verbs.c | 1 -
drivers/net/mlx5/mlx5.h | 10 +-
drivers/net/mlx5/mlx5_flow_age.c | 97 ++++++++-----------
3 files changed, 41 insertions(+), 67 deletions(-)
diff --git a/drivers/common/mlx5/linux/mlx5_common_verbs.c b/drivers/common/mlx5/linux/mlx5_common_verbs.c
index 339535dd04..aa560f05f2 100644
--- a/drivers/common/mlx5/linux/mlx5_common_verbs.c
+++ b/drivers/common/mlx5/linux/mlx5_common_verbs.c
@@ -37,7 +37,6 @@ mlx5_common_verbs_reg_mr(void *pd, void *addr, size_t length,
{
struct ibv_mr *ibv_mr;
- memset(pmd_mr, 0, sizeof(*pmd_mr));
ibv_mr = mlx5_glue->reg_mr(pd, addr, length,
IBV_ACCESS_LOCAL_WRITE |
(haswell_broadwell_cpu ? 0 :
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index d5016545b0..00713d6647 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -479,14 +479,6 @@ struct mlx5_aso_cq {
uint64_t errors;
};
-struct mlx5_aso_devx_mr {
- void *buf;
- uint64_t length;
- struct mlx5dv_devx_umem *umem;
- struct mlx5_devx_obj *mkey;
- bool is_indirect;
-};
-
struct mlx5_aso_sq_elem {
struct mlx5_aso_age_pool *pool;
uint16_t burst_size;
@@ -503,7 +495,7 @@ struct mlx5_aso_sq {
};
volatile uint32_t *db_rec;
volatile uint64_t *uar_addr;
- struct mlx5_aso_devx_mr mr;
+ struct mlx5_pmd_mr mr;
uint16_t pi;
uint32_t head;
uint32_t tail;
diff --git a/drivers/net/mlx5/mlx5_flow_age.c b/drivers/net/mlx5/mlx5_flow_age.c
index aae7a3758a..e110288c85 100644
--- a/drivers/net/mlx5/mlx5_flow_age.c
+++ b/drivers/net/mlx5/mlx5_flow_age.c
@@ -99,84 +99,65 @@ mlx5_aso_cq_create(void *ctx, struct mlx5_aso_cq *cq, uint16_t log_desc_n,
/**
* Free MR resources.
*
+ * @param[in] sh
+ * Pointer to shared device context.
* @param[in] mr
* MR to free.
*/
static void
-mlx5_aso_devx_dereg_mr(struct mlx5_aso_devx_mr *mr)
+mlx5_aso_dereg_mr(struct mlx5_dev_ctx_shared *sh, struct mlx5_pmd_mr *mr)
{
- claim_zero(mlx5_devx_cmd_destroy(mr->mkey));
- if (!mr->is_indirect && mr->umem)
- claim_zero(mlx5_glue->devx_umem_dereg(mr->umem));
- mlx5_free(mr->buf);
+ void *addr = mr->addr;
+
+ sh->share_cache.dereg_mr_cb(mr);
+ mlx5_free(addr);
memset(mr, 0, sizeof(*mr));
}
/**
* Register Memory Region.
*
- * @param[in] ctx
- * Context returned from mlx5 open_device() glue function.
+ * @param[in] sh
+ * Pointer to shared device context.
* @param[in] length
* Size of MR buffer.
* @param[in/out] mr
* Pointer to MR to create.
- * @param[in] pdn
- * Protection Domain number to use.
*
* @return
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_aso_devx_reg_mr(void *ctx, size_t length, struct mlx5_aso_devx_mr *mr,
- int pdn)
+mlx5_aso_reg_mr(struct mlx5_dev_ctx_shared *sh, size_t length,
+ struct mlx5_pmd_mr *mr)
{
- struct mlx5_devx_mkey_attr mkey_attr;
+ int ret;
- mr->buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, length, 4096,
- SOCKET_ID_ANY);
- if (!mr->buf) {
- DRV_LOG(ERR, "Failed to create ASO bits mem for MR by Devx.");
+ mr->addr = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, length, 4096,
+ SOCKET_ID_ANY);
+ if (!mr->addr) {
+ DRV_LOG(ERR, "Failed to create ASO bits mem for MR.");
return -1;
}
- mr->umem = mlx5_glue->devx_umem_reg(ctx, mr->buf, length,
- IBV_ACCESS_LOCAL_WRITE);
- if (!mr->umem) {
- DRV_LOG(ERR, "Failed to register Umem for MR by Devx.");
- goto error;
- }
- mkey_attr.addr = (uintptr_t)mr->buf;
- mkey_attr.size = length;
- mkey_attr.umem_id = mlx5_os_get_umem_id(mr->umem);
- mkey_attr.pd = pdn;
- mkey_attr.pg_access = 1;
- mkey_attr.klm_array = NULL;
- mkey_attr.klm_num = 0;
- mkey_attr.relaxed_ordering_read = 0;
- mkey_attr.relaxed_ordering_write = 0;
- mr->mkey = mlx5_devx_cmd_mkey_create(ctx, &mkey_attr);
- if (!mr->mkey) {
+ ret = sh->share_cache.reg_mr_cb(sh->pd, mr->addr, length, mr);
+ if (ret) {
DRV_LOG(ERR, "Failed to create direct Mkey.");
- goto error;
+ mlx5_free(mr->addr);
+ return -1;
}
- mr->length = length;
- mr->is_indirect = false;
return 0;
-error:
- if (mr->umem)
- claim_zero(mlx5_glue->devx_umem_dereg(mr->umem));
- mlx5_free(mr->buf);
- return -1;
}
/**
* Destroy Send Queue used for ASO access.
*
+ * @param[in] sh
+ * Pointer to shared device context.
* @param[in] sq
* ASO SQ to destroy.
*/
static void
-mlx5_aso_destroy_sq(struct mlx5_aso_sq *sq)
+mlx5_aso_destroy_sq(struct mlx5_dev_ctx_shared *sh, struct mlx5_aso_sq *sq)
{
if (sq->wqe_umem) {
mlx5_glue->devx_umem_dereg(sq->wqe_umem);
@@ -192,7 +173,7 @@ mlx5_aso_destroy_sq(struct mlx5_aso_sq *sq)
}
if (sq->cq.cq)
mlx5_aso_cq_destroy(&sq->cq);
- mlx5_aso_devx_dereg_mr(&sq->mr);
+ mlx5_aso_dereg_mr(sh, &sq->mr);
memset(sq, 0, sizeof(*sq));
}
@@ -214,8 +195,8 @@ mlx5_aso_init_sq(struct mlx5_aso_sq *sq)
for (i = 0, wqe = &sq->wqes[0]; i < size; ++i, ++wqe) {
wqe->general_cseg.sq_ds = rte_cpu_to_be_32((sq->sqn << 8) |
(sizeof(*wqe) >> 4));
- wqe->aso_cseg.lkey = rte_cpu_to_be_32(sq->mr.mkey->id);
- addr = (uint64_t)((uint64_t *)sq->mr.buf + i *
+ wqe->aso_cseg.lkey = rte_cpu_to_be_32(sq->mr.lkey);
+ addr = (uint64_t)((uint64_t *)sq->mr.addr + i *
MLX5_ASO_AGE_ACTIONS_PER_POOL / 64);
wqe->aso_cseg.va_h = rte_cpu_to_be_32((uint32_t)(addr >> 32));
wqe->aso_cseg.va_l_r = rte_cpu_to_be_32((uint32_t)addr | 1u);
@@ -232,8 +213,8 @@ mlx5_aso_init_sq(struct mlx5_aso_sq *sq)
/**
* Create Send Queue used for ASO access.
*
- * @param[in] ctx
- * Context returned from mlx5 open_device() glue function.
+ * @param[in] sh
+ * Pointer to shared device context.
* @param[in/out] sq
* Pointer to SQ to create.
* @param[in] uar
@@ -244,12 +225,14 @@ mlx5_aso_init_sq(struct mlx5_aso_sq *sq)
* EQ number.
* @param[in] log_desc_n
* Log of number of descriptors in queue.
+ * @param[in] ts_format
+ * timestamp format supported by the queue.
*
* @return
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
+mlx5_aso_sq_create(struct mlx5_dev_ctx_shared *sh, struct mlx5_aso_sq *sq,
struct mlx5dv_devx_uar *uar, uint32_t pdn,
uint32_t eqn, uint16_t log_desc_n, uint32_t ts_format)
{
@@ -261,10 +244,10 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
uint32_t wq_size = sizeof(struct mlx5_aso_wqe) * sq_desc_n;
int ret;
- if (mlx5_aso_devx_reg_mr(ctx, (MLX5_ASO_AGE_ACTIONS_PER_POOL / 8) *
- sq_desc_n, &sq->mr, pdn))
+ if (mlx5_aso_reg_mr(sh, (MLX5_ASO_AGE_ACTIONS_PER_POOL / 8) * sq_desc_n,
+ &sq->mr))
return -1;
- if (mlx5_aso_cq_create(ctx, &sq->cq, log_desc_n,
+ if (mlx5_aso_cq_create(sh->ctx, &sq->cq, log_desc_n,
mlx5_os_get_devx_uar_page_id(uar), eqn))
goto error;
sq->log_desc_n = log_desc_n;
@@ -276,7 +259,7 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
rte_errno = ENOMEM;
goto error;
}
- sq->wqe_umem = mlx5_glue->devx_umem_reg(ctx,
+ sq->wqe_umem = mlx5_glue->devx_umem_reg(sh->ctx,
(void *)(uintptr_t)sq->umem_buf,
wq_size +
sizeof(*sq->db_rec) * 2,
@@ -304,7 +287,7 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
wq_attr->dbr_umem_id = wq_attr->wq_umem_id;
wq_attr->dbr_addr = wq_size;
wq_attr->dbr_umem_valid = 1;
- sq->sq = mlx5_devx_cmd_create_sq(ctx, &attr);
+ sq->sq = mlx5_devx_cmd_create_sq(sh->ctx, &attr);
if (!sq->sq) {
DRV_LOG(ERR, "Can't create sq object.");
rte_errno = ENOMEM;
@@ -326,7 +309,7 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
mlx5_aso_init_sq(sq);
return 0;
error:
- mlx5_aso_destroy_sq(sq);
+ mlx5_aso_destroy_sq(sh, sq);
return -1;
}
@@ -342,7 +325,7 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq,
int
mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh)
{
- return mlx5_aso_sq_create(sh->ctx, &sh->aso_age_mng->aso_sq,
+ return mlx5_aso_sq_create(sh, &sh->aso_age_mng->aso_sq,
sh->tx_uar, sh->pdn, sh->eqn,
MLX5_ASO_QUEUE_LOG_DESC, sh->sq_ts_format);
}
@@ -356,7 +339,7 @@ mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh)
void
mlx5_aso_queue_uninit(struct mlx5_dev_ctx_shared *sh)
{
- mlx5_aso_destroy_sq(&sh->aso_age_mng->aso_sq);
+ mlx5_aso_destroy_sq(sh, &sh->aso_age_mng->aso_sq);
}
/**
@@ -486,7 +469,7 @@ mlx5_aso_age_action_update(struct mlx5_dev_ctx_shared *sh, uint16_t n)
uint16_t idx = (sq->tail + i) & mask;
struct mlx5_aso_age_pool *pool = sq->elts[idx].pool;
uint64_t diff = curr - pool->time_of_last_age_check;
- uint64_t *addr = sq->mr.buf;
+ uint64_t *addr = sq->mr.addr;
int j;
addr += idx * MLX5_ASO_AGE_ACTIONS_PER_POOL / 64;
--
2.25.1
next reply other threads:[~2022-03-09 11:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-09 11:52 Michael Baum [this message]
2022-03-09 14:14 ` Luca Boccassi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220309115224.820658-1-michaelba@nvidia.com \
--to=michaelba@nvidia.com \
--cc=matan@nvidia.com \
--cc=stable@dpdk.org \
--cc=viacheslavo@nvidia.com \
--cc=xuemingl@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).