From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C1E5CA00BE for ; Thu, 17 Mar 2022 04:50:53 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AE7AD410F3; Thu, 17 Mar 2022 04:50:53 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 077A340151; Thu, 17 Mar 2022 04:50:51 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22H3klHH027579; Wed, 16 Mar 2022 20:50:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=FqVy72DAP0b915GYIQEcThJVEoxfp8Fxu+Taf8Tkw+o=; b=GFEOYRo11mqp/tm/1mLGNEqekwXgWVl9PvF9yxIxxrV7KMx5aEZWa/P7LQiVcL20bXLg 7kWlgEi0Wyifnf66ItXZPZioMYjmsjKxIZjN18liDptGg9PPwvSVPT7I3+4D2c154wp7 RscIosHKYfLXoAcQt3pJpNz3FSX/cY7iEyN/KRvQrcdphStPaOiJzGrg7ghQ3vhmI01R 5UpH3Ec7/BGWFuY069XKCV9wMDGoJ9HEzRkCE/1fUTUscD7vKe5SWOOj72wpbgojdqJH Rj/0S7qjBMSrW1pxHZ/tMluIDtZmjmtyxwdp6dF5zu8JQYq5VTPJVAFAylu/L9IQ3CY+ cA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3eue23mnwe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 16 Mar 2022 20:50:49 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 16 Mar 2022 20:50:47 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 16 Mar 2022 20:50:47 -0700 Received: from localhost.localdomain (unknown [10.28.34.33]) by maili.marvell.com (Postfix) with ESMTP id B09263F705C; Wed, 16 Mar 2022 20:50:45 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Satheesh Paul , Subject: [dpdk-dev] [PATCH 1/2] common/cnxk: fix ROC naming convention issues Date: Thu, 17 Mar 2022 09:20:35 +0530 Message-ID: <20220317035036.2290272-1-psatheesh@marvell.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: ovQ2Ze79cGmipCXSukpthrPtY7qLAy0v X-Proofpoint-ORIG-GUID: ovQ2Ze79cGmipCXSukpthrPtY7qLAy0v X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-16_09,2022-03-15_01,2022-02-23_01 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org From: Satheesh Paul Fixed some names to follow ROC naming convention in ROC NPC code. Fixes: 4edf1246a40 ("common/cnxk: support matching VLAN existence in RTE Flow") Cc: stable@dpdk.org Signed-off-by: Satheesh Paul --- drivers/common/cnxk/roc_npc.h | 6 +++--- drivers/common/cnxk/roc_npc_mcam.c | 4 ++-- drivers/common/cnxk/roc_platform.h | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h index 6204139396..4c0151e2e7 100644 --- a/drivers/common/cnxk/roc_npc.h +++ b/drivers/common/cnxk/roc_npc.h @@ -60,7 +60,7 @@ struct roc_npc_flow_item_raw { struct roc_ether_addr { uint8_t addr_bytes[PLT_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */ -} plt_aligned(2); +} __plt_aligned(2); struct roc_ether_hdr { struct roc_ether_addr d_addr; /**< Destination address. */ @@ -72,7 +72,7 @@ struct roc_ether_hdr { } S_un; /**< Do not use directly; use s_addr instead.*/ }; uint16_t ether_type; /**< Frame type. */ -} plt_aligned(2); +} __plt_aligned(2); PLT_STD_C11 struct roc_npc_flow_item_eth { @@ -254,7 +254,7 @@ enum roc_npc_rss_hash_function { struct roc_npc_action_rss { enum roc_npc_rss_hash_function func; uint32_t level; - uint64_t types; /**< Specific RSS hash types (see RTE_ETH_RSS_*). */ + uint64_t types; /**< Specific RSS hash types (see ETH_RSS_*). */ uint32_t key_len; /**< Hash key length in bytes. */ uint32_t queue_num; /**< Number of entries in @p queue. */ const uint8_t *key; /**< Hash key. */ diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c index 9c5ff5e60a..e592310bde 100644 --- a/drivers/common/cnxk/roc_npc_mcam.c +++ b/drivers/common/cnxk/roc_npc_mcam.c @@ -283,8 +283,8 @@ npc_get_kex_capability(struct npc *npc) /* Custom L3 frame: varied offset and lengths */ kex_cap.bit.custom_l3 = npc_is_kex_enabled(npc, NPC_LID_LC, NPC_LT_LC_CUSTOM0, 0, 0); - kex_cap.bit.custom_l3 |= - npc_is_kex_enabled(npc, NPC_LID_LC, NPC_LT_LC_CUSTOM1, 0, 0); + kex_cap.bit.custom_l3 |= (uint64_t)npc_is_kex_enabled( + npc, NPC_LID_LC, NPC_LT_LC_CUSTOM1, 0, 0); /* SCTP sport : offset 0B, len 2B */ kex_cap.bit.sctp_sport = npc_is_kex_enabled( npc, NPC_LID_LD, NPC_LT_LD_SCTP, 0 * 8, 2 * 8); diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index 28004b1743..dd6514eb10 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -98,7 +98,7 @@ #define plt_cpu_to_be_64 rte_cpu_to_be_64 #define plt_be_to_cpu_64 rte_be_to_cpu_64 -#define plt_aligned __rte_aligned +#define __plt_aligned __rte_aligned #define plt_align32pow2 rte_align32pow2 #define plt_align32prevpow2 rte_align32prevpow2 -- 2.25.4