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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.238) by BN8NAM11FT022.mail.protection.outlook.com (10.13.176.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5273.14 via Frontend Transport; Wed, 18 May 2022 09:42:46 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Wed, 18 May 2022 09:42:45 +0000 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 18 May 2022 02:42:44 -0700 From: Raja Zidane To: CC: , , Dmitry Kozlyuk Subject: [PATCH] net/mlx5: fix Tx recovery Date: Wed, 18 May 2022 12:42:32 +0300 Message-ID: <20220518094232.24197-1-rzidane@nvidia.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1dc1e1de-30a1-4a04-0235-08da38b2c3d9 X-MS-TrafficTypeDiagnostic: MN2PR12MB3519:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2022 09:42:46.5584 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1dc1e1de-30a1-4a04-0235-08da38b2c3d9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT022.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3519 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org When an error occurs in Tx, and it is moved to ERROR state, it is not recoverable, during recovery it's state cannot be modified to INIT. to modify state from RESET to INIT, the port must be passed in modify attributes, and in case of ERROR to READY modification path, it was not provided. Provide port number when changing state from RESET to INIT. Fixes: 3a87b964edd3 ("net/mlx5: create Tx queues with DevX") Cc: stable@dpdk.org Signed-off-by: Raja Zidane Acked-by: Matan Azrad Acked-by: Dmitry Kozlyuk --- drivers/net/mlx5/linux/mlx5_verbs.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c index b6ba21c216..67a7bec22b 100644 --- a/drivers/net/mlx5/linux/mlx5_verbs.c +++ b/drivers/net/mlx5/linux/mlx5_verbs.c @@ -94,7 +94,6 @@ mlx5_ibv_modify_qp(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type, .qp_state = IBV_QPS_RESET, .port_num = dev_port, }; - int attr_mask = (IBV_QP_STATE | IBV_QP_PORT); int ret; if (type != MLX5_TXQ_MOD_RST2RDY) { @@ -108,10 +107,8 @@ mlx5_ibv_modify_qp(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type, if (type == MLX5_TXQ_MOD_RDY2RST) return 0; } - if (type == MLX5_TXQ_MOD_ERR2RDY) - attr_mask = IBV_QP_STATE; mod.qp_state = IBV_QPS_INIT; - ret = mlx5_glue->modify_qp(obj->qp, &mod, attr_mask); + ret = mlx5_glue->modify_qp(obj->qp, &mod, IBV_QP_STATE | IBV_QP_PORT); if (ret) { DRV_LOG(ERR, "Cannot change Tx QP state to INIT %s", strerror(errno)); -- 2.21.0