From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8AAE5A034C for ; Mon, 30 May 2022 11:22:22 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8114B42B92; Mon, 30 May 2022 11:22:22 +0200 (CEST) Received: from smtpbg151.qq.com (smtpbg151.qq.com [18.169.211.239]) by mails.dpdk.org (Postfix) with ESMTP id 4179542B93 for ; Mon, 30 May 2022 11:22:20 +0200 (CEST) X-QQ-mid: bizesmtp87t1653902537tqk0bnqi Received: from wxdbg.localdomain.com ( [183.129.236.74]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 30 May 2022 17:22:16 +0800 (CST) X-QQ-SSF: 01400000000000F0P000000A0000000 X-QQ-FEAT: 381xoVMPsREuUoUp4DjgmmGtPdMgc4zY0dqVzTTUuAejwHisoNA7snWKvGFq5 GoeQVxpvbqBvLcod0N28ha/sWZD6Utxd5KI7Aji0oAUdcTKhy/Jk/i84OkljXmV+l/XMRTg RSloh9zpugn5IwCLPt3vTT4Saf+5fSbp7TtBLKeA1n/PONEu4jIZvwj6YIsqTe9DmUYZlXK rakUGY03vQzJgQQ0wdZG6kEnv53wwK+lSAxUpgEMIut8gEsnLYGfN1meHYmmunZ8vxjGjmD IjFvgOD6fH3Q8LR7XbSoOdPDeEXxxPN73kVzQi4XzdKsqkWByOfviQO6yTO2dz3QEcLMD8f gVSJZ2xNIjxy3hiQLLrORRZq8bgqp3KJFKqw8RtH998Gg/oegw= X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 5/9] net/ngbe: fix to read M88E1512 PHY mode Date: Mon, 30 May 2022 17:30:12 +0800 Message-Id: <20220530093016.16326-6-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220530093016.16326-1-jiawenwu@trustnetic.com> References: <20220530093016.16326-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign8 X-QQ-Bgrelay: 1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org For M88E1512 PHY mixed mode, PXE driver overrides PHY mode at load time. To workaround this problem, change to read PHY mode from flash instead of register. Fixes: 1c44384fce76 ("net/ngbe: support custom PHY interfaces") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_hw.c | 37 ++++++++++++++++++++++++++++ drivers/net/ngbe/base/ngbe_hw.h | 3 +++ drivers/net/ngbe/base/ngbe_phy_mvl.c | 9 ++++--- drivers/net/ngbe/base/ngbe_phy_mvl.h | 1 + 4 files changed, 46 insertions(+), 4 deletions(-) diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c index fa2d749240..050649e0a6 100644 --- a/drivers/net/ngbe/base/ngbe_hw.c +++ b/drivers/net/ngbe/base/ngbe_hw.c @@ -1805,6 +1805,43 @@ s32 ngbe_enable_rx_dma(struct ngbe_hw *hw, u32 regval) return 0; } +/* cmd_addr is used for some special command: + * 1. to be sector address, when implemented erase sector command + * 2. to be flash address when implemented read, write flash address + */ +u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr) +{ + u32 cmd_val = 0; + u32 i = 0; + + cmd_val = NGBE_SPICMD_CMD(cmd) | NGBE_SPICMD_CLK(3) | cmd_addr; + wr32(hw, NGBE_SPICMD, cmd_val); + + for (i = 0; i < 10000; i++) { + if (rd32(hw, NGBE_SPISTAT) & NGBE_SPISTAT_OPDONE) + break; + + usec_delay(10); + } + if (i == 10000) + return 1; + + return 0; +} + +u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr) +{ + u32 status = 0; + + status = ngbe_fmgr_cmd_op(hw, 1, addr); + if (status) { + DEBUGOUT("Read flash timeout."); + return status; + } + + return rd32(hw, NGBE_SPIDAT); +} + void ngbe_map_device_id(struct ngbe_hw *hw) { u16 oem = hw->sub_system_id & NGBE_OEM_MASK; diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h index 7e0e23b195..2813e72d60 100644 --- a/drivers/net/ngbe/base/ngbe_hw.h +++ b/drivers/net/ngbe/base/ngbe_hw.h @@ -83,4 +83,7 @@ s32 ngbe_init_phy(struct ngbe_hw *hw); s32 ngbe_enable_rx_dma(struct ngbe_hw *hw, u32 regval); void ngbe_map_device_id(struct ngbe_hw *hw); +u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr); +u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr); + #endif /* _NGBE_HW_H_ */ diff --git a/drivers/net/ngbe/base/ngbe_phy_mvl.c b/drivers/net/ngbe/base/ngbe_phy_mvl.c index 85af6bc99c..c5256359ed 100644 --- a/drivers/net/ngbe/base/ngbe_phy_mvl.c +++ b/drivers/net/ngbe/base/ngbe_phy_mvl.c @@ -50,11 +50,12 @@ s32 ngbe_write_phy_reg_mvl(struct ngbe_hw *hw, s32 ngbe_check_phy_mode_mvl(struct ngbe_hw *hw) { - u16 value = 0; + u8 value = 0; + u32 phy_mode = 0; + + phy_mode = ngbe_flash_read_dword(hw, 0xFF010); + value = (u8)(phy_mode >> (hw->bus.lan_id * 8)); - /* select page 18 reg 20 */ - ngbe_write_phy_reg_mdi(hw, MVL_PAGE_SEL, 0, 18); - ngbe_read_phy_reg_mdi(hw, MVL_GEN_CTL, 0, &value); if (MVL_GEN_CTL_MODE(value) == MVL_GEN_CTL_MODE_COPPER) { /* mode select to RGMII-to-copper */ hw->phy.type = ngbe_phy_mvl; diff --git a/drivers/net/ngbe/base/ngbe_phy_mvl.h b/drivers/net/ngbe/base/ngbe_phy_mvl.h index ab07c99fe4..1cf49ac8c5 100644 --- a/drivers/net/ngbe/base/ngbe_phy_mvl.h +++ b/drivers/net/ngbe/base/ngbe_phy_mvl.h @@ -3,6 +3,7 @@ */ #include "ngbe_phy.h" +#include "ngbe_hw.h" #ifndef _NGBE_PHY_MVL_H_ #define _NGBE_PHY_MVL_H_ -- 2.27.0