* patch 'test/crypto: fix ZUC vector IV format' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'test/crypto: fix SNOW3G " luca.boccassi
` (28 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Ciara Power; +Cc: Tejasree Kondoj, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/35b1acf851d61291eb1ca6db8b416fbeb677e8e9
Thanks.
Luca Boccassi
---
From 35b1acf851d61291eb1ca6db8b416fbeb677e8e9 Mon Sep 17 00:00:00 2001
From: Ciara Power <ciara.power@intel.com>
Date: Thu, 23 Jun 2022 14:42:49 +0000
Subject: [PATCH] test/crypto: fix ZUC vector IV format
[ upstream commit 3025fe291015686f3e954dd520e7cbc130439d33 ]
Some authentication and cipher IV formats were not following the spec [1].
For ZUC128 cipher IV, an 8 byte block is repeated,
with the last 3 bytes of each being 0x0.
IV[4] and IV[12] must have the last 2 bits set to 0.
Auth IVs must also have repeated bytes with the last 3 bytes
containing 0x0 in each 8 byte block.
IV[4] and IV[12] must have the last 3 bits set to 0.
IV[8] and IV[14] may have a flipped bit based on direction.
[1] https://www.gsma.com/security/wp-content/uploads/2019/05/EEA3_EIA3_specification_v1_8.pdf
Fixes: a81a81850fb1 ("test/crypto: add ZUC test cases for QAT")
Fixes: b1c1df46878d ("test/crypto: add ZUC test cases for auth-cipher")
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Tejasree Kondoj <ktejasree@marvell.com>
---
app/test/test_cryptodev_zuc_test_vectors.h | 54 +++++++++++-----------
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/app/test/test_cryptodev_zuc_test_vectors.h b/app/test/test_cryptodev_zuc_test_vectors.h
index 5d1d264579..299d7649fe 100644
--- a/app/test/test_cryptodev_zuc_test_vectors.h
+++ b/app/test/test_cryptodev_zuc_test_vectors.h
@@ -558,13 +558,13 @@ static struct wireless_test_data zuc_test_case_cipher_200b_auth_200b = {
},
.auth_iv = {
.data = {
- 0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00,
- 0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00
+ 0xFA, 0x55, 0x6B, 0x26, 0x18, 0x00, 0x00, 0x00,
+ 0xFA, 0x55, 0x6B, 0x26, 0x18, 0x00, 0x00, 0x00
},
.len = 16
},
.digest = {
- .data = {0x01, 0xFE, 0x5E, 0x38},
+ .data = {0x2F, 0x45, 0x7D, 0x7B},
.len = 4
},
.validAuthLenInBits = {
@@ -631,13 +631,13 @@ static struct wireless_test_data zuc_test_case_cipher_800b_auth_120b = {
},
.auth_iv = {
.data = {
- 0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00,
- 0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00
+ 0xFA, 0x55, 0x6B, 0x26, 0x18, 0x00, 0x00, 0x00,
+ 0xFA, 0x55, 0x6B, 0x26, 0x18, 0x00, 0x00, 0x00
},
.len = 16
},
.digest = {
- .data = {0x9D, 0x42, 0x1C, 0xEA},
+ .data = {0xCA, 0xBB, 0x8D, 0x94},
.len = 4
},
.validAuthLenInBits = {
@@ -1166,15 +1166,15 @@ struct wireless_test_data zuc_auth_cipher_test_case_1 = {
},
.cipher_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x66, 0x03, 0x54, 0x92, 0x78, 0x00, 0x00, 0x00,
+ 0x66, 0x03, 0x54, 0x92, 0x78, 0x00, 0x00, 0x00
},
.len = 16
},
.auth_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0xFA, 0x55, 0x6B, 0x26, 0x18, 0x00, 0x00, 0x00,
+ 0xFA, 0x55, 0x6B, 0x26, 0x18, 0x00, 0x00, 0x00
},
.len = 16
},
@@ -1201,22 +1201,22 @@ struct wireless_test_data zuc_auth_cipher_test_case_1 = {
},
.ciphertext = {
.data = {
- 0x5A, 0x5A, 0xDB, 0x3D, 0xD5, 0xB7, 0xB9, 0x58,
- 0xA5, 0xD3, 0xE3, 0xF9, 0x18, 0x73, 0xB4, 0x74,
- 0x05, 0xF0, 0xE9, 0xB6, 0x5D, 0x9A, 0xE3, 0xFA,
- 0x5D, 0xFD, 0x24, 0x51, 0xAD, 0x73, 0xCA, 0x64,
- 0x91, 0xD5, 0xB3, 0x94, 0x10, 0x91, 0x89, 0xEA,
- 0x73, 0x6F, 0xB0, 0x2A, 0x0A, 0x63, 0x0F, 0x8D,
- 0x64, 0x87, 0xA3, 0x14, 0x6B, 0x93, 0x31, 0x0F,
- 0x14, 0xAD, 0xEA, 0x62, 0x80, 0x3F, 0x44, 0xDD,
- 0x4E, 0x30, 0xFA, 0xC8, 0x0E, 0x5F, 0x46, 0xE7,
- 0x60, 0xEC, 0xDF, 0x8B, 0x94, 0x7D, 0x2E, 0x63,
- 0x48, 0xD9, 0x69, 0x06, 0x13, 0xF2, 0x20, 0x49,
- 0x54, 0xA6, 0xD4, 0x98, 0xF4, 0xF6, 0x1D, 0x4A,
- 0xC9, 0xA5, 0xDA, 0x46, 0x3D, 0xD9, 0x02, 0x47,
- 0x1C, 0x20, 0x73, 0x35, 0x17, 0x1D, 0x81, 0x8D,
- 0x2E, 0xCD, 0x70, 0x37, 0x22, 0x55, 0x3C, 0xF3,
- 0xDA, 0x70, 0x42, 0x12, 0x0E, 0xAA, 0xC4, 0xAB
+ 0x5A, 0x5A, 0x94, 0xE7, 0xB8, 0xD7, 0x4E, 0xBB,
+ 0x4C, 0xC3, 0xD1, 0x16, 0xFC, 0x8C, 0xE4, 0x27,
+ 0x44, 0xEC, 0x04, 0x26, 0x60, 0x9C, 0xFF, 0x81,
+ 0xB6, 0x2B, 0x48, 0x1D, 0xEE, 0x26, 0xF7, 0x58,
+ 0x40, 0x38, 0x58, 0xEA, 0x22, 0x23, 0xE6, 0x34,
+ 0x9A, 0x69, 0x32, 0x68, 0xBD, 0xDD, 0x7D, 0xA3,
+ 0xC0, 0x04, 0x79, 0xF0, 0xF1, 0x58, 0x78, 0x5E,
+ 0xD0, 0xDF, 0x27, 0x9A, 0x53, 0x70, 0x5D, 0xFB,
+ 0x1B, 0xCA, 0xBA, 0x97, 0x12, 0x1F, 0x59, 0x6B,
+ 0x75, 0x7B, 0x94, 0xF6, 0xE7, 0xFA, 0x49, 0x6B,
+ 0x7D, 0x7F, 0x8F, 0x0F, 0x78, 0x56, 0x40, 0x52,
+ 0x84, 0x3E, 0xA9, 0xE8, 0x84, 0x6F, 0xEF, 0xFB,
+ 0x4A, 0x48, 0x3A, 0x4C, 0x81, 0x98, 0xDD, 0x17,
+ 0x89, 0x66, 0x3B, 0xC0, 0xEC, 0x71, 0xDB, 0xF6,
+ 0x44, 0xDF, 0xA7, 0x97, 0xB2, 0x9B, 0x84, 0xA7,
+ 0x2D, 0x2D, 0xC1, 0x93, 0x12, 0x37, 0xEA, 0xD2
},
.len = 128 << 3
},
@@ -1233,7 +1233,7 @@ struct wireless_test_data zuc_auth_cipher_test_case_1 = {
.len = 2 << 3
},
.digest = {
- .data = {0x0E, 0xAA, 0xC4, 0xAB},
+ .data = {0x12, 0x37, 0xEA, 0xD2},
.len = 4,
.offset_bytes = 124
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.649808654 +0100
+++ 0002-test-crypto-fix-ZUC-vector-IV-format.patch 2022-07-06 21:07:53.523518323 +0100
@@ -1 +1 @@
-From 3025fe291015686f3e954dd520e7cbc130439d33 Mon Sep 17 00:00:00 2001
+From 35b1acf851d61291eb1ca6db8b416fbeb677e8e9 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 3025fe291015686f3e954dd520e7cbc130439d33 ]
+
@@ -21 +22,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'test/crypto: fix SNOW3G vector IV format' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
2022-07-06 20:34 ` patch 'test/crypto: fix ZUC vector IV format' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'examples/fips_validation: handle empty payload' " luca.boccassi
` (27 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Ciara Power; +Cc: Tejasree Kondoj, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/390e956b6ddb11d7f17f6a26014dbeb9744ad5ba
Thanks.
Luca Boccassi
---
From 390e956b6ddb11d7f17f6a26014dbeb9744ad5ba Mon Sep 17 00:00:00 2001
From: Ciara Power <ciara.power@intel.com>
Date: Thu, 23 Jun 2022 14:42:50 +0000
Subject: [PATCH] test/crypto: fix SNOW3G vector IV format
[ upstream commit 3271c24b295caa7ee3fe227225a2ce962757d9c4 ]
Some of the cipher and authentication IVs did not follow the spec for
SNOW3G algorithm [1].
Cipher IVs must have the last 3 bytes of each 8 byte block as 0x0.
IV[4] and IV[12] must have the last 2 bits set to 0.
Each 8 byte block is repeated.
Auth IVs must also have a repeated 8 byte block.
IV[8] and IV[14] may have a flipped bit based on direction.
[1] https://www.gsma.com/aboutus/wp-content/uploads/2014/12/uea2uia2d1v21.pdf
Fixes: 8bdf665fe6c0 ("app/test: add SNOW 3G")
Fixes: 24342ade2c9d ("test/crypto: check SNOW3G when digest is encrypted")
Fixes: 02ed7b3871d6 ("test/crypto: add SNOW3G test cases for auth-cipher")
Fixes: 11c5485bb276 ("test/crypto: add scatter-gather tests for IP and OOP")
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Tejasree Kondoj <ktejasree@marvell.com>
---
app/test/test_cryptodev_snow3g_test_vectors.h | 142 +++++++++---------
1 file changed, 71 insertions(+), 71 deletions(-)
diff --git a/app/test/test_cryptodev_snow3g_test_vectors.h b/app/test/test_cryptodev_snow3g_test_vectors.h
index bbe05662be..b49a07bcf2 100644
--- a/app/test/test_cryptodev_snow3g_test_vectors.h
+++ b/app/test/test_cryptodev_snow3g_test_vectors.h
@@ -138,11 +138,11 @@ struct snow3g_test_data snow3g_test_case_2 = {
.len = 16
},
.cipher_iv = {
- .data = {
+ .data = {
0xE2, 0x8B, 0xCF, 0x7B, 0xC0, 0x00, 0x00, 0x00,
0xE2, 0x8B, 0xCF, 0x7B, 0xC0, 0x00, 0x00, 0x00
},
- .len = 16
+ .len = 16
},
.plaintext = {
.data = {
@@ -359,8 +359,8 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_1 = {
},
.cipher_iv = {
.data = {
- 0x14, 0x79, 0x3E, 0x41, 0x03, 0x97, 0xE8, 0xFD,
- 0x94, 0x79, 0x3E, 0x41, 0x03, 0x97, 0x68, 0xFD
+ 0x72, 0xA4, 0xF2, 0x0F, 0x48, 0x00, 0x00, 0x00,
+ 0x72, 0xA4, 0xF2, 0x0F, 0x48, 0x00, 0x00, 0x00
},
.len = 16
},
@@ -383,13 +383,13 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_1 = {
.len = 384
},
.ciphertext = {
- .data = {
- 0x95, 0x2E, 0x5A, 0xE1, 0x50, 0xB8, 0x59, 0x2A,
- 0x9B, 0xA0, 0x38, 0xA9, 0x8E, 0x2F, 0xED, 0xAB,
- 0xFD, 0xC8, 0x3B, 0x47, 0x46, 0x0B, 0x50, 0x16,
- 0xEC, 0x88, 0x45, 0xB6, 0x05, 0xC7, 0x54, 0xF8,
- 0xBD, 0x91, 0xAA, 0xB6, 0xA4, 0xDC, 0x64, 0xB4,
- 0xCB, 0xEB, 0x97, 0x06, 0x4C, 0xF7, 0x02, 0x3D
+ .data = {
+ 0x86, 0x4F, 0x4D, 0xE8, 0x86, 0xE6, 0x3E, 0x66,
+ 0x52, 0x97, 0xC7, 0x62, 0xAE, 0x8E, 0xA2, 0xDB,
+ 0x01, 0xD6, 0x33, 0xA9, 0xA4, 0xCE, 0x02, 0xD5,
+ 0xC2, 0xC5, 0x5F, 0x90, 0xE0, 0x89, 0x48, 0xD4,
+ 0x92, 0xF4, 0xE5, 0x9A, 0xDA, 0x13, 0x76, 0xFF,
+ 0x6E, 0x76, 0x6B, 0x71, 0x62, 0x28, 0xB2, 0xEC
},
.len = 384
},
@@ -428,15 +428,15 @@ struct snow3g_test_data snow3g_test_case_7 = {
},
.cipher_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
+ 0xE2, 0x8B, 0xCF, 0x7B, 0xC0, 0x00, 0x00, 0x00,
+ 0xE2, 0x8B, 0xCF, 0x7B, 0xC0, 0x00, 0x00, 0x00
},
.len = 16
},
.auth_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x36, 0xAF, 0x61, 0x44, 0x98, 0x38, 0xF0, 0x3A,
+ 0x36, 0xAF, 0x61, 0x44, 0x98, 0x38, 0xF0, 0x3A
},
.len = 16
},
@@ -457,28 +457,28 @@ struct snow3g_test_data snow3g_test_case_7 = {
0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A,
0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A,
0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A,
- 0x5A, 0x5A, 0x5A, 0x5A, 0xF1, 0x9E, 0x2B, 0x6F,
+ 0x5A, 0x5A, 0x5A, 0x5A, 0xBB, 0x2B, 0x8B, 0x15,
},
.len = 128 << 3
},
.ciphertext = {
.data = {
- 0x5A, 0x5A, 0xE4, 0xAD, 0x29, 0xA2, 0x6A, 0xA6,
- 0x20, 0x1D, 0xCD, 0x08, 0x50, 0xD6, 0xE6, 0x47,
- 0xBC, 0x88, 0x08, 0x01, 0x17, 0xFA, 0x47, 0x5B,
- 0x90, 0x40, 0xBA, 0x0C, 0xB5, 0x58, 0xF3, 0x0C,
- 0xA0, 0xD4, 0x98, 0x83, 0x1B, 0xCE, 0x54, 0xE3,
- 0x29, 0x00, 0x3C, 0xA4, 0xAD, 0x74, 0xEE, 0x05,
- 0xA3, 0x6C, 0xD4, 0xAC, 0xC6, 0x30, 0x33, 0xC9,
- 0x37, 0x57, 0x41, 0x9B, 0xD4, 0x73, 0xB9, 0x77,
- 0x70, 0x8B, 0x63, 0xDD, 0x22, 0xB8, 0xE1, 0x85,
- 0xB2, 0x92, 0x7C, 0x37, 0xD3, 0x2E, 0xD9, 0xF4,
- 0x4A, 0x69, 0x25, 0x30, 0xE3, 0x5B, 0x8B, 0xF6,
- 0x0F, 0xDE, 0x0B, 0x92, 0xD5, 0x25, 0x52, 0x6D,
- 0x26, 0xEB, 0x2F, 0x8A, 0x3B, 0x8B, 0x38, 0xE2,
- 0x48, 0xD3, 0x4A, 0x98, 0xF7, 0x3A, 0xC2, 0x46,
- 0x69, 0x8D, 0x73, 0x3E, 0x57, 0x88, 0x2C, 0x80,
- 0xF0, 0xF2, 0x75, 0xB8, 0x7D, 0x27, 0xC6, 0xDA,
+ 0x5A, 0x5A, 0x8A, 0x35, 0xF7, 0x36, 0xDA, 0xD7,
+ 0xC4, 0x2C, 0x10, 0xEA, 0x92, 0x9C, 0x00, 0xF0,
+ 0xAE, 0x35, 0x5E, 0x8D, 0xB6, 0x88, 0x30, 0x66,
+ 0x74, 0x8B, 0xA2, 0x82, 0x5C, 0xA7, 0xF3, 0x54,
+ 0x75, 0x02, 0xA9, 0x90, 0x6B, 0x4B, 0x6A, 0x63,
+ 0xFF, 0x4B, 0x08, 0xFE, 0x11, 0x3C, 0x5A, 0x53,
+ 0xEE, 0x68, 0x14, 0x41, 0x17, 0xCD, 0x7B, 0x27,
+ 0x88, 0xAF, 0x99, 0xE2, 0x9C, 0x86, 0x42, 0x12,
+ 0x97, 0x93, 0xF0, 0xE6, 0xE2, 0xB2, 0x2D, 0xDA,
+ 0x2C, 0x59, 0xB0, 0xA7, 0x09, 0xF6, 0x32, 0xC0,
+ 0x35, 0x9A, 0xD3, 0xBA, 0xDC, 0x8F, 0x2E, 0x18,
+ 0x97, 0x87, 0x44, 0xD6, 0x43, 0xFA, 0x86, 0x5A,
+ 0xB0, 0xA2, 0x5A, 0xB8, 0x5F, 0x57, 0xE3, 0x2F,
+ 0x73, 0x9C, 0x01, 0x3A, 0x02, 0x08, 0x8C, 0xEB,
+ 0xA0, 0x5D, 0x74, 0x58, 0x5A, 0xA1, 0x58, 0x17,
+ 0x5E, 0x86, 0x96, 0xE6, 0x9C, 0xEE, 0x8C, 0xA8
},
.len = 128 << 3
@@ -493,7 +493,7 @@ struct snow3g_test_data snow3g_test_case_7 = {
},
.digest = {
.data = {
- 0x7D, 0x27, 0xC6, 0xDA
+ 0x9C, 0xEE, 0x8C, 0xA8
},
.len = 4,
.offset_bytes = 124
@@ -520,15 +520,15 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_2 = {
},
.cipher_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
+ 0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00,
+ 0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00
},
.len = 16
},
.auth_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x3E, 0xDC, 0x87, 0xE2, 0xA4, 0xF2, 0xD8, 0xE2,
+ 0x3E, 0xDC, 0x87, 0xE2, 0xA4, 0xF2, 0xD8, 0xE2
},
.len = 16
},
@@ -556,22 +556,22 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_2 = {
},
.ciphertext = {
.data = {
- 0x5A, 0x5A, 0xE4, 0xAD, 0x29, 0xA2, 0x6A, 0xA6,
- 0x20, 0x1D, 0xCD, 0x08, 0x50, 0xD6, 0xE6, 0x47,
- 0xBC, 0x88, 0x08, 0x01, 0x17, 0xFA, 0x47, 0x5B,
- 0x90, 0x40, 0xBA, 0x0C, 0xB5, 0x58, 0xF3, 0x0C,
- 0xA0, 0xD4, 0x98, 0x83, 0x1B, 0xCE, 0x54, 0xE3,
- 0x29, 0x00, 0x3C, 0xA4, 0xAD, 0x74, 0xEE, 0x05,
- 0xA3, 0x6C, 0xD4, 0xAC, 0xC6, 0x30, 0x33, 0xC9,
- 0x37, 0x57, 0x41, 0x9B, 0xD4, 0x73, 0xB9, 0x77,
- 0x70, 0x8B, 0x63, 0xDD, 0x22, 0xB8, 0xE1, 0x85,
- 0xB2, 0x92, 0x7C, 0x37, 0xD3, 0x2E, 0xD9, 0xF4,
- 0x4A, 0x69, 0x25, 0x30, 0xE3, 0x5B, 0x8B, 0xF6,
- 0x0F, 0xDE, 0x0B, 0x92, 0xD5, 0x25, 0x52, 0x6D,
- 0x26, 0xEB, 0x2F, 0x8A, 0x3B, 0x8B, 0x38, 0xE2,
- 0x48, 0xD3, 0x4A, 0x98, 0xF7, 0x3A, 0xC2, 0x46,
- 0x69, 0x8D, 0x73, 0x3E, 0x57, 0x88, 0x2C, 0x80,
- 0xF0, 0xF2, 0x75, 0xB8, 0x7D, 0x27, 0xC6, 0xDA,
+ 0x5A, 0x5A, 0xCF, 0xCF, 0x3D, 0x11, 0xBF, 0xD9,
+ 0xC3, 0x7F, 0x7C, 0xA8, 0x1A, 0x9F, 0x9F, 0x34,
+ 0xC5, 0x6E, 0x1B, 0x2C, 0xE0, 0x81, 0x4B, 0x66,
+ 0x87, 0xCB, 0xD5, 0x61, 0x04, 0xED, 0xBC, 0x69,
+ 0x79, 0x86, 0x73, 0x48, 0x69, 0x4A, 0xBA, 0x55,
+ 0x44, 0x6C, 0xEF, 0xD9, 0x34, 0x61, 0x59, 0x67,
+ 0x80, 0x4E, 0x03, 0x95, 0x0A, 0xA1, 0x6C, 0xBA,
+ 0x74, 0xBD, 0xAF, 0x11, 0x4B, 0xE6, 0x98, 0x61,
+ 0x4E, 0xD4, 0x3E, 0xE4, 0x99, 0x55, 0x5C, 0x3A,
+ 0x8C, 0x3E, 0xC0, 0x01, 0x6E, 0x15, 0xE1, 0x0E,
+ 0x71, 0x4C, 0x89, 0x43, 0x8A, 0x48, 0x69, 0x6D,
+ 0x02, 0x10, 0xC6, 0x54, 0x37, 0x18, 0xAA, 0x10,
+ 0x90, 0x80, 0x0B, 0x69, 0x08, 0xB4, 0xF9, 0x4D,
+ 0xD1, 0x2E, 0x43, 0xD9, 0x92, 0xAF, 0x06, 0x4A,
+ 0xAF, 0x26, 0x25, 0x77, 0x37, 0xD0, 0xFC, 0x3C,
+ 0xA0, 0xCB, 0xAF, 0x06, 0x95, 0x26, 0x30, 0x38,
},
.len = 128 << 3
@@ -586,7 +586,7 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_2 = {
},
.digest = {
.data = {
- 0x7D, 0x27, 0xC6, 0xDA
+ 0x95, 0x26, 0x30, 0x38
},
.len = 4,
.offset_bytes = 124
@@ -613,15 +613,15 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_3 = {
},
.cipher_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
+ 0x39, 0x8A, 0x59, 0xB4, 0x2C, 0x00, 0x00, 0x00,
+ 0x39, 0x8A, 0x59, 0xB4, 0x2C, 0x00, 0x00, 0x00
},
.len = 16
},
.auth_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x29, 0x6F, 0x39, 0x3C, 0x6B, 0x22, 0x77, 0x37,
+ 0x29, 0x6F, 0x39, 0x3C, 0x6B, 0x22, 0x77, 0x37
},
.len = 16
},
@@ -636,10 +636,10 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_3 = {
},
.ciphertext = {
.data = {
- 0x5A, 0x5A, 0xE4, 0xAD, 0x29, 0xA2, 0x6A, 0xA6,
- 0x20, 0x1D, 0xCD, 0x08, 0x50, 0xD6, 0xE6, 0x47,
- 0xBC, 0x88, 0x08, 0x01, 0x17, 0xFA, 0x47, 0x5B,
- 0x90, 0x40, 0xBA, 0x0C, 0xBA, 0x6D, 0x6A, 0x5E,
+ 0x5A, 0x5A, 0x93, 0xB0, 0x3F, 0xA4, 0xEB, 0xD4,
+ 0x51, 0x12, 0x3B, 0x95, 0x93, 0x12, 0xBF, 0xBE,
+ 0xF2, 0xFE, 0xA5, 0xAE, 0xE7, 0xF4, 0x80, 0x3E,
+ 0xB2, 0xD1, 0xFF, 0x5F, 0xD9, 0x32, 0x72, 0xFE,
},
.len = 32 << 3
},
@@ -653,7 +653,7 @@ struct snow3g_test_data snow3g_auth_cipher_test_case_3 = {
},
.digest = {
.data = {
- 0xBA, 0x6D, 0x6A, 0x5E
+ 0xD9, 0x32, 0x72, 0xFE
},
.len = 4,
.offset_bytes = 28
@@ -680,15 +680,15 @@ struct snow3g_test_data snow3g_auth_cipher_partial_digest_encryption = {
},
.cipher_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
+ 0x72, 0xA4, 0xF2, 0x0F, 0x48, 0x00, 0x00, 0x00,
+ 0x72, 0xA4, 0xF2, 0x0F, 0x48, 0x00, 0x00, 0x00
},
.len = 16
},
.auth_iv = {
.data = {
- 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ 0x14, 0x79, 0x3E, 0x41, 0x03, 0x97, 0xE8, 0xFD,
+ 0x14, 0x79, 0x3E, 0x41, 0x03, 0x97, 0xE8, 0xFD
},
.len = 16
},
@@ -704,9 +704,9 @@ struct snow3g_test_data snow3g_auth_cipher_partial_digest_encryption = {
.ciphertext = {
.data = {
0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A,
- 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0xE4, 0xAD,
- 0x29, 0xA2, 0x6A, 0xA6, 0x20, 0x1D, 0xCD, 0x08,
- 0x50, 0xD6, 0xE6, 0x47, 0xB3, 0xBD, 0xC3, 0x08
+ 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0x5A, 0xA2, 0xB7,
+ 0xDF, 0xA7, 0x98, 0xA1, 0xD8, 0xD4, 0x9B, 0x6E,
+ 0x2C, 0x7A, 0x66, 0x15, 0xCC, 0x4C, 0xE5, 0xE0
},
.len = 32 << 3
},
@@ -720,7 +720,7 @@ struct snow3g_test_data snow3g_auth_cipher_partial_digest_encryption = {
},
.digest = {
.data = {
- 0xB3, 0xBD, 0xC3, 0x08
+ 0xCC, 0x4C, 0xE5, 0xE0
},
.len = 4,
.offset_bytes = 28
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.682133550 +0100
+++ 0003-test-crypto-fix-SNOW3G-vector-IV-format.patch 2022-07-06 21:07:53.523518323 +0100
@@ -1 +1 @@
-From 3271c24b295caa7ee3fe227225a2ce962757d9c4 Mon Sep 17 00:00:00 2001
+From 390e956b6ddb11d7f17f6a26014dbeb9744ad5ba Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 3271c24b295caa7ee3fe227225a2ce962757d9c4 ]
+
@@ -22 +23,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'examples/fips_validation: handle empty payload' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
2022-07-06 20:34 ` patch 'test/crypto: fix ZUC vector IV format' " luca.boccassi
2022-07-06 20:34 ` patch 'test/crypto: fix SNOW3G " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-07 7:22 ` [EXT] " Gowrishankar Muthukrishnan
2022-07-06 20:34 ` patch 'crypto/qat: fix DOCSIS crash' " luca.boccassi
` (26 subsequent siblings)
29 siblings, 1 reply; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Gowrishankar Muthukrishnan; +Cc: Fan Zhang, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/f2a62f854ed397d37710255a3e8d137a3e514f67
Thanks.
Luca Boccassi
---
From f2a62f854ed397d37710255a3e8d137a3e514f67 Mon Sep 17 00:00:00 2001
From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Date: Tue, 28 Jun 2022 18:41:09 +0530
Subject: [PATCH] examples/fips_validation: handle empty payload
[ upstream commit 0fab1428332bdfb213b51e068625d38419488646 ]
Allocate at least onebyte to handle empty payload in a test vector
when defined.
Fixes: 3d0fad56b74 ("examples/fips_validation: add crypto FIPS application")
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
---
examples/fips_validation/fips_validation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/fips_validation/fips_validation.c b/examples/fips_validation/fips_validation.c
index 52a7bf952d..511c176a2a 100644
--- a/examples/fips_validation/fips_validation.c
+++ b/examples/fips_validation/fips_validation.c
@@ -522,7 +522,7 @@ parse_uint8_hex_str(const char *key, char *src, struct fips_val *val)
val->val = NULL;
}
- val->val = rte_zmalloc(NULL, len, 0);
+ val->val = rte_zmalloc(NULL, len + 1, 0);
if (!val->val)
return -ENOMEM;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.714139949 +0100
+++ 0004-examples-fips_validation-handle-empty-payload.patch 2022-07-06 21:07:53.523518323 +0100
@@ -1 +1 @@
-From 0fab1428332bdfb213b51e068625d38419488646 Mon Sep 17 00:00:00 2001
+From f2a62f854ed397d37710255a3e8d137a3e514f67 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 0fab1428332bdfb213b51e068625d38419488646 ]
+
@@ -10 +11,0 @@
-Cc: stable@dpdk.org
@@ -19 +20 @@
-index 94e31abf83..324abccb14 100644
+index 52a7bf952d..511c176a2a 100644
@@ -22 +23 @@
-@@ -630,7 +630,7 @@ parse_uint8_hex_str(const char *key, char *src, struct fips_val *val)
+@@ -522,7 +522,7 @@ parse_uint8_hex_str(const char *key, char *src, struct fips_val *val)
^ permalink raw reply [flat|nested] 67+ messages in thread* RE: [EXT] patch 'examples/fips_validation: handle empty payload' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'examples/fips_validation: handle empty payload' " luca.boccassi
@ 2022-07-07 7:22 ` Gowrishankar Muthukrishnan
2022-07-07 7:31 ` Gowrishankar Muthukrishnan
0 siblings, 1 reply; 67+ messages in thread
From: Gowrishankar Muthukrishnan @ 2022-07-07 7:22 UTC (permalink / raw)
To: luca.boccassi; +Cc: Fan Zhang, dpdk stable
Hi Luca,
Please drop this fix, as I am reverting it for a better alternative. Shortly I ll post a patch.
Thanks,
Gowrishankar
> -----Original Message-----
> From: luca.boccassi@gmail.com <luca.boccassi@gmail.com>
> Sent: Thursday, July 7, 2022 2:05 AM
> To: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> Cc: Fan Zhang <roy.fan.zhang@intel.com>; dpdk stable <stable@dpdk.org>
> Subject: [EXT] patch 'examples/fips_validation: handle empty payload' has
> been queued to stable release 21.11.2
>
> External Email
>
> ----------------------------------------------------------------------
> Hi,
>
> FYI, your patch has been queued to stable release 21.11.2
>
> Note it hasn't been pushed to
> https://urldefense.proofpoint.com/v2/url?u=http-
> 3A__dpdk.org_browse_dpdk-
> 2Dstable&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr-
> g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=O2PVDcsc2jMEc_mE6Xe
> sj52a6pfU3j2Tnm4zolBaKA89l0u7LxsGH-
> 96953ZrpZK&s=4Gnb_mWIkB5BPsKGuZ45SRvpvN3EjpdmkVaD3cbDiFc&e=
> yet.
> It will be pushed if I get no objections before 07/08/22. So please shout if
> anyone has objections.
>
> Also note that after the patch there's a diff of the upstream commit vs the
> patch applied to the branch. This will indicate if there was any rebasing
> needed to apply to the stable branch. If there were code changes for
> rebasing
> (ie: not only metadata diffs), please double check that the rebase was
> correctly done.
>
> Queued patches are on a temporary branch at:
> https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__github.com_kevintraynor_dpdk-
> 2Dstable&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr-
> g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=O2PVDcsc2jMEc_mE6Xe
> sj52a6pfU3j2Tnm4zolBaKA89l0u7LxsGH-
> 96953ZrpZK&s=LnrfYb9zJZbja3SE0piaX3QRtUu9Ei_dUAtR5A3lKok&e=
>
> This queued commit can be viewed at:
> https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__github.com_kevintraynor_dpdk-
> 2Dstable_commit_f2a62f854ed397d37710255a3e8d137a3e514f67&d=DwIDAg
> &c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr-
> g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=O2PVDcsc2jMEc_mE6Xe
> sj52a6pfU3j2Tnm4zolBaKA89l0u7LxsGH-
> 96953ZrpZK&s=HzrKlKMVYNlWanZ1zbvBgERFNcztMaGWajZensHeAz4&e=
>
> Thanks.
>
> Luca Boccassi
>
> ---
> From f2a62f854ed397d37710255a3e8d137a3e514f67 Mon Sep 17 00:00:00
> 2001
> From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> Date: Tue, 28 Jun 2022 18:41:09 +0530
> Subject: [PATCH] examples/fips_validation: handle empty payload
>
> [ upstream commit 0fab1428332bdfb213b51e068625d38419488646 ]
>
> Allocate at least onebyte to handle empty payload in a test vector when
> defined.
>
> Fixes: 3d0fad56b74 ("examples/fips_validation: add crypto FIPS application")
>
> Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
> ---
> examples/fips_validation/fips_validation.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/examples/fips_validation/fips_validation.c
> b/examples/fips_validation/fips_validation.c
> index 52a7bf952d..511c176a2a 100644
> --- a/examples/fips_validation/fips_validation.c
> +++ b/examples/fips_validation/fips_validation.c
> @@ -522,7 +522,7 @@ parse_uint8_hex_str(const char *key, char *src,
> struct fips_val *val)
> val->val = NULL;
> }
>
> - val->val = rte_zmalloc(NULL, len, 0);
> + val->val = rte_zmalloc(NULL, len + 1, 0);
> if (!val->val)
> return -ENOMEM;
>
> --
> 2.34.1
>
> ---
> Diff of the applied patch vs upstream commit (please double-check if non-
> empty:
> ---
> --- - 2022-07-06 21:07:53.714139949 +0100
> +++ 0004-examples-fips_validation-handle-empty-payload.patch 2022-
> 07-06 21:07:53.523518323 +0100
> @@ -1 +1 @@
> -From 0fab1428332bdfb213b51e068625d38419488646 Mon Sep 17 00:00:00
> 2001
> +From f2a62f854ed397d37710255a3e8d137a3e514f67 Mon Sep 17 00:00:00
> 2001
> @@ -5,0 +6,2 @@
> +[ upstream commit 0fab1428332bdfb213b51e068625d38419488646 ]
> +
> @@ -10 +11,0 @@
> -Cc: stable@dpdk.org
> @@ -19 +20 @@
> -index 94e31abf83..324abccb14 100644
> +index 52a7bf952d..511c176a2a 100644
> @@ -22 +23 @@
> -@@ -630,7 +630,7 @@ parse_uint8_hex_str(const char *key, char *src,
> struct fips_val *val)
> +@@ -522,7 +522,7 @@ parse_uint8_hex_str(const char *key, char *src,
> +struct fips_val *val)
^ permalink raw reply [flat|nested] 67+ messages in thread* RE: [EXT] patch 'examples/fips_validation: handle empty payload' has been queued to stable release 21.11.2
2022-07-07 7:22 ` [EXT] " Gowrishankar Muthukrishnan
@ 2022-07-07 7:31 ` Gowrishankar Muthukrishnan
0 siblings, 0 replies; 67+ messages in thread
From: Gowrishankar Muthukrishnan @ 2022-07-07 7:31 UTC (permalink / raw)
To: luca.boccassi; +Cc: Fan Zhang, dpdk stable
> -----Original Message-----
> From: Gowrishankar Muthukrishnan
> Sent: Thursday, July 7, 2022 12:52 PM
> To: luca.boccassi@gmail.com
> Cc: Fan Zhang <roy.fan.zhang@intel.com>; dpdk stable <stable@dpdk.org>
> Subject: RE: [EXT] patch 'examples/fips_validation: handle empty payload'
> has been queued to stable release 21.11.2
>
> Hi Luca,
> Please drop this fix, as I am reverting it for a better alternative. Shortly I ll
> post a patch.
>
Sorry please go ahead merging this patch. I thought I will squash it with my addon change
under test. I'll post it separately.
> Thanks,
> Gowrishankar
>
> > -----Original Message-----
> > From: luca.boccassi@gmail.com <luca.boccassi@gmail.com>
> > Sent: Thursday, July 7, 2022 2:05 AM
> > To: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> > Cc: Fan Zhang <roy.fan.zhang@intel.com>; dpdk stable <stable@dpdk.org>
> > Subject: [EXT] patch 'examples/fips_validation: handle empty payload'
> > has been queued to stable release 21.11.2
> >
> > External Email
> >
> > ----------------------------------------------------------------------
> > Hi,
> >
> > FYI, your patch has been queued to stable release 21.11.2
> >
> > Note it hasn't been pushed to
> > https://urldefense.proofpoint.com/v2/url?u=http-
> > 3A__dpdk.org_browse_dpdk-
> > 2Dstable&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr-
> >
> g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=O2PVDcsc2jMEc_mE6Xe
> > sj52a6pfU3j2Tnm4zolBaKA89l0u7LxsGH-
> > 96953ZrpZK&s=4Gnb_mWIkB5BPsKGuZ45SRvpvN3EjpdmkVaD3cbDiFc&e=
> > yet.
> > It will be pushed if I get no objections before 07/08/22. So please
> > shout if anyone has objections.
> >
> > Also note that after the patch there's a diff of the upstream commit
> > vs the patch applied to the branch. This will indicate if there was
> > any rebasing needed to apply to the stable branch. If there were code
> > changes for rebasing
> > (ie: not only metadata diffs), please double check that the rebase was
> > correctly done.
> >
> > Queued patches are on a temporary branch at:
> > https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__github.com_kevintraynor_dpdk-
> > 2Dstable&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr-
> >
> g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=O2PVDcsc2jMEc_mE6Xe
> > sj52a6pfU3j2Tnm4zolBaKA89l0u7LxsGH-
> > 96953ZrpZK&s=LnrfYb9zJZbja3SE0piaX3QRtUu9Ei_dUAtR5A3lKok&e=
> >
> > This queued commit can be viewed at:
> > https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__github.com_kevintraynor_dpdk-
> >
> 2Dstable_commit_f2a62f854ed397d37710255a3e8d137a3e514f67&d=DwIDAg
> > &c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr-
> >
> g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=O2PVDcsc2jMEc_mE6Xe
> > sj52a6pfU3j2Tnm4zolBaKA89l0u7LxsGH-
> > 96953ZrpZK&s=HzrKlKMVYNlWanZ1zbvBgERFNcztMaGWajZensHeAz4&e=
> >
> > Thanks.
> >
> > Luca Boccassi
> >
> > ---
> > From f2a62f854ed397d37710255a3e8d137a3e514f67 Mon Sep 17 00:00:00
> > 2001
> > From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> > Date: Tue, 28 Jun 2022 18:41:09 +0530
> > Subject: [PATCH] examples/fips_validation: handle empty payload
> >
> > [ upstream commit 0fab1428332bdfb213b51e068625d38419488646 ]
> >
> > Allocate at least onebyte to handle empty payload in a test vector
> > when defined.
> >
> > Fixes: 3d0fad56b74 ("examples/fips_validation: add crypto FIPS
> > application")
> >
> > Signed-off-by: Gowrishankar Muthukrishnan
> <gmuthukrishn@marvell.com>
> > Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
> > ---
> > examples/fips_validation/fips_validation.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/examples/fips_validation/fips_validation.c
> > b/examples/fips_validation/fips_validation.c
> > index 52a7bf952d..511c176a2a 100644
> > --- a/examples/fips_validation/fips_validation.c
> > +++ b/examples/fips_validation/fips_validation.c
> > @@ -522,7 +522,7 @@ parse_uint8_hex_str(const char *key, char *src,
> > struct fips_val *val)
> > val->val = NULL;
> > }
> >
> > - val->val = rte_zmalloc(NULL, len, 0);
> > + val->val = rte_zmalloc(NULL, len + 1, 0);
> > if (!val->val)
> > return -ENOMEM;
> >
> > --
> > 2.34.1
> >
> > ---
> > Diff of the applied patch vs upstream commit (please double-check if
> > non-
> > empty:
> > ---
> > --- - 2022-07-06 21:07:53.714139949 +0100
> > +++ 0004-examples-fips_validation-handle-empty-payload.patch 2022-
> > 07-06 21:07:53.523518323 +0100
> > @@ -1 +1 @@
> > -From 0fab1428332bdfb213b51e068625d38419488646 Mon Sep 17 00:00:00
> > 2001
> > +From f2a62f854ed397d37710255a3e8d137a3e514f67 Mon Sep 17 00:00:00
> > 2001
> > @@ -5,0 +6,2 @@
> > +[ upstream commit 0fab1428332bdfb213b51e068625d38419488646 ]
> > +
> > @@ -10 +11,0 @@
> > -Cc: stable@dpdk.org
> > @@ -19 +20 @@
> > -index 94e31abf83..324abccb14 100644
> > +index 52a7bf952d..511c176a2a 100644
> > @@ -22 +23 @@
> > -@@ -630,7 +630,7 @@ parse_uint8_hex_str(const char *key, char *src,
> > struct fips_val *val)
> > +@@ -522,7 +522,7 @@ parse_uint8_hex_str(const char *key, char *src,
> > +struct fips_val *val)
^ permalink raw reply [flat|nested] 67+ messages in thread
* patch 'crypto/qat: fix DOCSIS crash' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (2 preceding siblings ...)
2022-07-06 20:34 ` patch 'examples/fips_validation: handle empty payload' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'doc: fix grammar and formatting in compressdev guide' " luca.boccassi
` (25 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Rebecca Troy; +Cc: Fan Zhang, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/8017591016087a62c4bcc52ec7207ab6e342f50c
Thanks.
Luca Boccassi
---
From 8017591016087a62c4bcc52ec7207ab6e342f50c Mon Sep 17 00:00:00 2001
From: Rebecca Troy <rebecca.troy@intel.com>
Date: Wed, 29 Jun 2022 16:10:36 +0000
Subject: [PATCH] crypto/qat: fix DOCSIS crash
[ upstream commit 03f0e3608d44d468b22ed17c30144d87edeb3ee9 ]
Currently if AES or DES algorithms fail for DOCSIS test suite,
a segmentation fault occurs when cryptodev_qat_autotest is ran.
This is due to a duplicate call of EVP_CIPHER_CTX_free for the
session context. Ctx is freed firstly in the bpi_cipher_ctx_init
function and then again at the end of qat_sym_session_configure_cipher
function.
This commit fixes this bug by removing the first instance
of EVP_CIPHER_CTX_free, leaving just the dedicated function in
the upper level to free the ctx.
Fixes: 98f060891615 ("crypto/qat: add symmetric session file")
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
---
drivers/crypto/qat/qat_sym_session.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c
index f439bbd0f1..80d6fbfa46 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -126,8 +126,10 @@ bpi_cipher_ctx_init(enum rte_crypto_cipher_algorithm cryptodev_algo,
return 0;
ctx_init_err:
- if (*ctx != NULL)
+ if (*ctx != NULL) {
EVP_CIPHER_CTX_free(*ctx);
+ *ctx = NULL;
+ }
return ret;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.745612157 +0100
+++ 0005-crypto-qat-fix-DOCSIS-crash.patch 2022-07-06 21:07:53.527518400 +0100
@@ -1 +1 @@
-From 03f0e3608d44d468b22ed17c30144d87edeb3ee9 Mon Sep 17 00:00:00 2001
+From 8017591016087a62c4bcc52ec7207ab6e342f50c Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 03f0e3608d44d468b22ed17c30144d87edeb3ee9 ]
+
@@ -19 +20,0 @@
-Cc: stable@dpdk.org
@@ -28 +29 @@
-index e40c042ba9..b30396487e 100644
+index f439bbd0f1..80d6fbfa46 100644
@@ -31 +32 @@
-@@ -136,8 +136,10 @@ bpi_cipher_ctx_init(enum rte_crypto_cipher_algorithm cryptodev_algo,
+@@ -126,8 +126,10 @@ bpi_cipher_ctx_init(enum rte_crypto_cipher_algorithm cryptodev_algo,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'doc: fix grammar and formatting in compressdev guide' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (3 preceding siblings ...)
2022-07-06 20:34 ` patch 'crypto/qat: fix DOCSIS crash' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'doc: fix grammar and parameters in l2fwd-crypto " luca.boccassi
` (24 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Ciara Power; +Cc: Fan Zhang, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/a8b87a70630ea8825309faa9ac3a101d80aa2ff5
Thanks.
Luca Boccassi
---
From a8b87a70630ea8825309faa9ac3a101d80aa2ff5 Mon Sep 17 00:00:00 2001
From: Ciara Power <ciara.power@intel.com>
Date: Mon, 30 May 2022 16:03:42 +0000
Subject: [PATCH] doc: fix grammar and formatting in compressdev guide
[ upstream commit 4c9484373fcd0aa4a240fdb2e797269eb2f26b9b ]
Small improvements made to the compressdev programmer's guide.
This includes rephrasing some sentences, fixing grammar,
and aligning formatting.
Fixes: a584d3bea902 ("doc: add compressdev library guide")
Fixes: f7095d41bba6 ("doc: clarify data plane error handling in compressdev")
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
---
doc/guides/prog_guide/compressdev.rst | 281 ++++++++++++++------------
1 file changed, 147 insertions(+), 134 deletions(-)
diff --git a/doc/guides/prog_guide/compressdev.rst b/doc/guides/prog_guide/compressdev.rst
index 07d1a62a63..2a59c434c1 100644
--- a/doc/guides/prog_guide/compressdev.rst
+++ b/doc/guides/prog_guide/compressdev.rst
@@ -2,7 +2,7 @@
Copyright(c) 2017-2018 Cavium Networks.
Compression Device Library
-===========================
+==========================
The compression framework provides a generic set of APIs to perform compression services
as well as to query and configure compression devices both physical(hardware) and virtual(software)
@@ -32,10 +32,10 @@ From the command line using the --vdev EAL option
.. Note::
- * If DPDK application requires multiple software compression PMD devices then required
- number of ``--vdev`` with appropriate libraries are to be added.
+ * If a DPDK application requires multiple software compression PMD devices then the
+ required number of ``--vdev`` args with appropriate libraries are to be added.
- * An Application with multiple compression device instances exposed by the same PMD must
+ * An application with multiple compression device instances exposed by the same PMD must
specify a unique name for each device.
Example: ``--vdev 'pmd0' --vdev 'pmd1'``
@@ -53,7 +53,7 @@ All virtual compression devices support the following initialization parameters:
Device Identification
~~~~~~~~~~~~~~~~~~~~~
-Each device, whether virtual or physical is uniquely designated by two
+Each device, whether virtual or physical, is uniquely designated by two
identifiers:
- A unique device index used to designate the compression device in all functions
@@ -76,7 +76,7 @@ The ``rte_compressdev_configure`` API is used to configure a compression device.
The ``rte_compressdev_config`` structure is used to pass the configuration
parameters.
-See *DPDK API Reference* for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
Configuration of Queue Pairs
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -85,87 +85,88 @@ Each compression device queue pair is individually configured through the
``rte_compressdev_queue_pair_setup`` API.
The ``max_inflight_ops`` is used to pass maximum number of
-rte_comp_op that could be present in a queue at-a-time.
-PMD then can allocate resources accordingly on a specified socket.
+``rte_comp_op`` that could be present in a queue at a time.
+The PMD can then allocate resources accordingly on a specified socket.
-See *DPDK API Reference* for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
-Logical Cores, Memory and Queues Pair Relationships
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Logical Cores, Memory and Queue Pair Relationships
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-Library supports NUMA similarly as described in Cryptodev library section.
+The Compressdev library supports NUMA similarly as described in Cryptodev library section.
-A queue pair cannot be shared and should be exclusively used by a single processing
-context for enqueuing operations or dequeuing operations on the same compression device
+A queue pair cannot be shared, and should be exclusively used by a single processing
+context for enqueuing operations or dequeuing operations on the same compression device,
since sharing would require global locks and hinder performance. It is however possible
to use a different logical core to dequeue an operation on a queue pair from the logical
-core on which it was enqueued. This means that a compression burst enqueue/dequeue
+core on which it was enqueued. This means that for a compression burst, enqueue/dequeue
APIs are a logical place to transition from one logical core to another in a
data processing pipeline.
Device Features and Capabilities
----------------------------------
+--------------------------------
Compression devices define their functionality through two mechanisms, global device
-features and algorithm features. Global devices features identify device
-wide level features which are applicable to the whole device such as supported hardware
+features and algorithm features. Global device features identify device
+wide level features which are applicable to the whole device, such as supported hardware
acceleration and CPU features. List of compression device features can be seen in the
RTE_COMPDEV_FF_XXX macros.
-The algorithm features lists individual algo feature which device supports per-algorithm,
-such as a stateful compression/decompression, checksums operation etc. List of algorithm
-features can be seen in the RTE_COMP_FF_XXX macros.
+The algorithm features are features which the device supports per-algorithm,
+such as a stateful compression/decompression, checksums operation etc.
+The list of algorithm features can be seen in the RTE_COMP_FF_XXX macros.
Capabilities
~~~~~~~~~~~~
Each PMD has a list of capabilities, including algorithms listed in
-enum ``rte_comp_algorithm`` and its associated feature flag and
-sliding window range in log base 2 value. Sliding window tells
-the minimum and maximum size of lookup window that algorithm uses
+the enum ``rte_comp_algorithm``, its associated feature flag, and
+sliding window range in log base 2 value. The sliding window range
+defines the minimum and maximum size of a lookup window that an algorithm uses
to find duplicates.
-See *DPDK API Reference* for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
Each Compression poll mode driver defines its array of capabilities
-for each algorithm it supports. See PMD implementation for capability
+for each algorithm it supports. See the PMD implementation for capability
initialization.
Capabilities Discovery
~~~~~~~~~~~~~~~~~~~~~~
-PMD capability and features are discovered via ``rte_compressdev_info_get`` function.
+PMD capability and features are discovered via the ``rte_compressdev_info_get`` function.
The ``rte_compressdev_info`` structure contains all the relevant information for the device.
-See *DPDK API Reference* for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
Compression Operation
-----------------------
+---------------------
DPDK compression supports two types of compression methodologies:
-- Stateless, data associated to a compression operation is compressed without any reference
+- Stateless - data associated with a compression operation is compressed without any reference
to another compression operation.
-- Stateful, data in each compression operation is compressed with reference to previous compression
+- Stateful - data in each compression operation is compressed with reference to previous compression
operations in the same data stream i.e. history of data is maintained between the operations.
-For more explanation, please refer RFC https://www.ietf.org/rfc/rfc1951.txt
+For more explanation, please refer to the RFC https://www.ietf.org/rfc/rfc1951.txt
Operation Representation
~~~~~~~~~~~~~~~~~~~~~~~~
-Compression operation is described via ``struct rte_comp_op``, which contains both input and
+A compression operation is described via ``struct rte_comp_op``, which contains both input and
output data. The operation structure includes the operation type (stateless or stateful),
-the operation status and the priv_xform/stream handle, source, destination and checksum buffer
+the operation status, the priv_xform/stream handle, source, destination and checksum buffer
pointers. It also contains the source mempool from which the operation is allocated.
-PMD updates consumed field with amount of data read from source buffer and produced
-field with amount of data of written into destination buffer along with status of
-operation. See section *Produced, Consumed And Operation Status* for more details.
+The PMD updates the consumed field with the amount of data read from the source buffer,
+and the produced field with the amount of data written into the destination buffer,
+along with status of operation.
+See the section :ref:`compressdev_prod_cons_op_status`: for more details.
-Compression operations mempool also has an ability to allocate private memory with the
-operation for application's purposes. Application software is responsible for specifying
-all the operation specific fields in the ``rte_comp_op`` structure which are then used
+The compression operations mempool also has the ability to allocate private memory with the
+operation for the application's use. The application software is responsible for specifying
+all the operation specific fields in the ``rte_comp_op`` structure, which are then used
by the compression PMD to process the requested operation.
@@ -181,27 +182,27 @@ A ``rte_comp_op`` contains a field indicating the pool it originated from.
``rte_comp_op_alloc()`` and ``rte_comp_op_bulk_alloc()`` are used to allocate
compression operations from a given compression operation mempool.
-The operation gets reset before being returned to a user so that operation
+The operation gets reset before being returned to a user so that the operation
is always in a good known state before use by the application.
``rte_comp_op_free()`` is called by the application to return an operation to
its allocating pool.
-See *DPDK API Reference* for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
Passing source data as mbuf-chain
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
If input data is scattered across several different buffers, then
-Application can either parse through all such buffers and make one
+the application can either parse through all such buffers and make one
mbuf-chain and enqueue it for processing or, alternatively, it can
-make multiple sequential enqueue_burst() calls for each of them
-processing them statefully. See *Compression API Stateful Operation*
+make multiple sequential enqueue_burst() calls for each of them,
+processing them statefully. See :ref:`compressdev_stateful_op`:
for stateful processing of ops.
Operation Status
~~~~~~~~~~~~~~~~
-Each operation carries a status information updated by PMD after it is processed.
-Following are currently supported:
+Each operation carries status information updated by the PMD after it is processed.
+The following are currently supported:
- RTE_COMP_OP_STATUS_SUCCESS,
Operation is successfully completed
@@ -225,22 +226,25 @@ Following are currently supported:
- RTE_COMP_OP_STATUS_OUT_OF_SPACE_RECOVERABLE,
Output buffer ran out of space before operation completed, but this
is not an error case. Output data up to op.produced can be used and
- next op in the stream should continue on from op.consumed+1.
+ the next op in the stream should continue on from op.consumed+1.
Operation status after enqueue / dequeue
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Some of the above values may arise in the op after an
-``rte_compressdev_enqueue_burst()``. If number ops enqueued < number ops requested then
-the app should check the op.status of nb_enqd+1. If status is RTE_COMP_OP_STATUS_NOT_PROCESSED,
-it likely indicates a full-queue case for a hardware device and a retry after dequeuing some ops is likely
-to be successful. If the op holds any other status, e.g. RTE_COMP_OP_STATUS_INVALID_ARGS, a retry with
+``rte_compressdev_enqueue_burst()``. If the number of ops enqueued < the number of ops requested
+then the app should check the op.status of nb_enqd+1.
+If the status is RTE_COMP_OP_STATUS_NOT_PROCESSED, it likely indicates a full-queue case for a
+hardware device, and a retry after dequeuing some ops is likely to be successful.
+If the op holds any other status, e.g. RTE_COMP_OP_STATUS_INVALID_ARGS, a retry with
the same op is unlikely to be successful.
+.. _compressdev_prod_cons_op_status:
+
Produced, Consumed And Operation Status
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-- If status is RTE_COMP_OP_STATUS_SUCCESS,
+- If the status is RTE_COMP_OP_STATUS_SUCCESS,
consumed = amount of data read from input buffer, and
produced = amount of data written in destination buffer
- If status is RTE_COMP_OP_STATUS_ERROR,
@@ -253,37 +257,37 @@ Produced, Consumed And Operation Status
- If status is RTE_COMP_OP_STATUS_OUT_OF_SPACE_RECOVERABLE,
consumed = amount of data read, and
produced = amount of data successfully produced until
- out of space condition hit. PMD has ability to recover
- from here, so application can submit next op from
- consumed+1 and a destination buffer with available space.
+ out of space condition hit. The PMD has ability to recover
+ from here, so an application can submit the next op from
+ consumed+1, and a destination buffer with available space.
Transforms
----------
Compression transforms (``rte_comp_xform``) are the mechanism
to specify the details of the compression operation such as algorithm,
-window size and checksum.
+window size, and checksum.
Compression API Hash support
----------------------------
-Compression API allows application to enable digest calculation
+The compression API allows an application to enable digest calculation
alongside compression and decompression of data. A PMD reflects its
support for hash algorithms via capability algo feature flags.
-If supported, PMD calculates digest always on plaintext i.e.
+If supported, the PMD always calculates the digest on plaintext i.e.
before compression and after decompression.
Currently supported list of hash algos are SHA-1 and SHA2 family
SHA256.
-See *DPDK API Reference* for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
-If required, application should set valid hash algo in compress
+If required, the application should set the valid hash algo in compress
or decompress xforms during ``rte_compressdev_stream_create()``
-or ``rte_compressdev_private_xform_create()`` and pass a valid
+or ``rte_compressdev_private_xform_create()``, and pass a valid
output buffer in ``rte_comp_op`` hash field struct to store the
-resulting digest. Buffer passed should be contiguous and large
-enough to store digest which is 20 bytes for SHA-1 and
+resulting digest. The buffer passed should be contiguous and large
+enough to store digest, which is 20 bytes for SHA-1 and
32 bytes for SHA2-256.
Compression API Stateless operation
@@ -295,20 +299,21 @@ An op is processed stateless if it has
(required only on compression side),
- All required input in source buffer
-When all of the above conditions are met, PMD initiates stateless processing
+When all of the above conditions are met, the PMD initiates stateless processing
and releases acquired resources after processing of current operation is
-complete. Application can enqueue multiple stateless ops in a single burst
+complete. The application can enqueue multiple stateless ops in a single burst
and must attach priv_xform handle to such ops.
priv_xform in Stateless operation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-priv_xform is PMD internally managed private data that it maintains to do stateless processing.
-priv_xforms are initialized provided a generic xform structure by an application via making call
-to ``rte_compressdev_private_xform_create``, at an output PMD returns an opaque priv_xform reference.
-If PMD support SHAREABLE priv_xform indicated via algorithm feature flag, then application can
-attach same priv_xform with many stateless ops at-a-time. If not, then application needs to
-create as many priv_xforms as it expects to have stateless operations in-flight.
+A priv_xform is private data managed internally by the PMD to do stateless processing.
+A priv_xform is initialized by an application providing a generic xform structure
+to ``rte_compressdev_private_xform_create``, which returns an opaque priv_xform reference.
+If the PMD supports SHAREABLE priv_xform, indicated via algorithm feature flag,
+then the application can attach the same priv_xform with many stateless ops at a time.
+If not, then the application needs to create as many priv_xforms as it expects to have
+stateless operations in-flight.
.. figure:: img/stateless-op.*
@@ -320,8 +325,9 @@ create as many priv_xforms as it expects to have stateless operations in-flight.
Stateless Ops using Shareable priv_xform
-Application should call ``rte_compressdev_private_xform_create()`` and attach to stateless op before
-enqueuing them for processing and free via ``rte_compressdev_private_xform_free()`` during termination.
+The application should call ``rte_compressdev_private_xform_create()`` and attach it to a stateless
+op before enqueuing them for processing and free via ``rte_compressdev_private_xform_free()``
+during termination.
An example pseudocode to setup and process NUM_OPS stateless ops with each of length OP_LEN
using priv_xform would look like:
@@ -399,75 +405,80 @@ using priv_xform would look like:
Stateless and OUT_OF_SPACE
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+~~~~~~~~~~~~~~~~~~~~~~~~~~
-OUT_OF_SPACE is a condition when output buffer runs out of space and where PMD
-still has more data to produce. If PMD runs into such condition, then PMD returns
-RTE_COMP_OP_OUT_OF_SPACE_TERMINATED error. In such case, PMD resets itself and can set
+OUT_OF_SPACE is a condition when the output buffer runs out of space and where the PMD
+still has more data to produce. If the PMD runs into such condition, then the PMD returns
+RTE_COMP_OP_OUT_OF_SPACE_TERMINATED error. In such case, the PMD resets itself and can set
consumed=0 and produced=amount of output it could produce before hitting out_of_space.
-Application would need to resubmit the whole input with a larger output buffer, if it
+The application would need to resubmit the whole input with a larger output buffer, if it
wants the operation to be completed.
Hash in Stateless
~~~~~~~~~~~~~~~~~
-If hash is enabled, digest buffer will contain valid data after op is successfully
+If hash is enabled, the digest buffer will contain valid data after an op is successfully
processed i.e. dequeued with status = RTE_COMP_OP_STATUS_SUCCESS.
Checksum in Stateless
~~~~~~~~~~~~~~~~~~~~~
-If checksum is enabled, checksum will only be available after op is successfully
+If checksum is enabled, checksum will only be available after an op is successfully
processed i.e. dequeued with status = RTE_COMP_OP_STATUS_SUCCESS.
+.. _compressdev_stateful_op:
+
Compression API Stateful operation
-----------------------------------
-Compression API provide RTE_COMP_FF_STATEFUL_COMPRESSION and
-RTE_COMP_FF_STATEFUL_DECOMPRESSION feature flag for PMD to reflect
+The compression API provides RTE_COMP_FF_STATEFUL_COMPRESSION and
+RTE_COMP_FF_STATEFUL_DECOMPRESSION feature flag for the PMD to reflect
its support for Stateful operations.
-A Stateful operation in DPDK compression means application invokes enqueue
-burst() multiple times to process related chunk of data because
-application broke data into several ops.
+A Stateful operation in DPDK compression means the application invokes enqueue
+burst() multiple times to process a related chunk of data because the
+application broke the data into several ops.
-In such case
+In such cases
- ops are setup with op_type RTE_COMP_OP_STATEFUL,
-- all ops except last set to flush value = RTE_COMP_FLUSH_NONE/SYNC
-and last set to flush value RTE_COMP_FLUSH_FULL/FINAL.
+- all ops except the last are set with flush value = RTE_COMP_FLUSH_NONE/SYNC
+and the last is set with flush value RTE_COMP_FLUSH_FULL/FINAL.
-In case of either one or all of the above conditions, PMD initiates
-stateful processing and releases acquired resources after processing
+In case of either one or all of the above conditions, the PMD initiates
+stateful processing and releases acquired resources after processing the
operation with flush value = RTE_COMP_FLUSH_FULL/FINAL is complete.
-Unlike stateless, application can enqueue only one stateful op from
-a particular stream at a time and must attach stream handle
+Unlike stateless, the application can enqueue only one stateful op from
+a particular stream at a time and must attach a stream handle
to each op.
Stream in Stateful operation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-`stream` in DPDK compression is a logical entity which identifies related set of ops, say, a one large
-file broken into multiple chunks then file is represented by a stream and each chunk of that file is
-represented by compression op `rte_comp_op`. Whenever application wants a stateful processing of such
-data, then it must get a stream handle via making call to ``rte_compressdev_stream_create()``
-with xform, at an output the target PMD will return an opaque stream handle to application which
-it must attach to all of the ops carrying data of that stream. In stateful processing, every op
-requires previous op data for compression/decompression. A PMD allocates and set up resources such
-as history, states, etc. within a stream, which are maintained during the processing of the related ops.
+A stream in DPDK compression is a logical entity which identifies a related set of ops.
+For example, one large file broken into multiple chunks, then the file is represented by a stream,
+and each chunk of that file is represented by a compression op ``rte_comp_op``.
+Whenever an application wants stateful processing of such data, then it must get a stream handle
+via making call to ``rte_compressdev_stream_create()`` with an xform, which will return an opaque
+stream handle to attach to all of the ops carrying data of that stream.
+In stateful processing, every op requires previous op data for compression/decompression.
+A PMD allocates and sets up resources such as history, states, etc. within a stream,
+which are maintained during the processing of related ops.
-Unlike priv_xforms, stream is always a NON_SHAREABLE entity. One stream handle must be attached to only
-one set of related ops and cannot be reused until all of them are processed with status Success or failure.
+Unlike priv_xforms, a stream is always a NON_SHAREABLE entity. One stream handle must be attached
+to only one set of related ops and cannot be reused until all of them are processed with a
+success/failure status.
.. figure:: img/stateful-op.*
Stateful Ops
-Application should call ``rte_compressdev_stream_create()`` and attach to op before
+An application should call ``rte_compressdev_stream_create()`` and attach it to the op before
enqueuing them for processing and free via ``rte_compressdev_stream_free()`` during
-termination. All ops that are to be processed statefully should carry *same* stream.
+termination. All ops that are to be processed statefully should carry the *same* stream.
-See *DPDK API Reference* document for details.
+See the `DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_ for details.
-An example pseudocode to set up and process a stream having NUM_CHUNKS with each chunk size of CHUNK_LEN would look like:
+An example pseudocode to set up and process a stream having NUM_CHUNKS,
+with each chunk size of CHUNK_LEN, would look like:
.. code-block:: c
@@ -549,64 +560,65 @@ An example pseudocode to set up and process a stream having NUM_CHUNKS with each
Stateful and OUT_OF_SPACE
-~~~~~~~~~~~~~~~~~~~~~~~~~~~
+~~~~~~~~~~~~~~~~~~~~~~~~~
-If PMD supports stateful operation, then OUT_OF_SPACE status is not an actual
-error for the PMD. In such case, PMD returns with status
+If a PMD supports stateful operation, then an OUT_OF_SPACE status is not an actual
+error for the PMD. In such a case, the PMD returns with status
RTE_COMP_OP_STATUS_OUT_OF_SPACE_RECOVERABLE with consumed = number of input bytes
-read and produced = length of complete output buffer.
-Application should enqueue next op with source starting at consumed+1 and an
+read, and produced = length of complete output buffer.
+The application should enqueue the next op with source starting at consumed+1, and an
output buffer with available space.
Hash in Stateful
~~~~~~~~~~~~~~~~
-If enabled, digest buffer will contain valid digest after last op in stream
+If enabled, the digest buffer will contain valid digest after the last op in a stream
(having flush = RTE_COMP_FLUSH_FINAL) is successfully processed i.e. dequeued
with status = RTE_COMP_OP_STATUS_SUCCESS.
Checksum in Stateful
~~~~~~~~~~~~~~~~~~~~
-If enabled, checksum will only be available after last op in stream
+If enabled, the checksum will only be available after the last op in a stream
(having flush = RTE_COMP_FLUSH_FINAL) is successfully processed i.e. dequeued
with status = RTE_COMP_OP_STATUS_SUCCESS.
Burst in compression API
--------------------------
+------------------------
Scheduling of compression operations on DPDK's application data path is
performed using a burst oriented asynchronous API set. A queue pair on a compression
-device accepts a burst of compression operations using enqueue burst API. On physical
-devices the enqueue burst API will place the operations to be processed
+device accepts a burst of compression operations using the enqueue burst API.
+On physical devices the enqueue burst API will place the operations to be processed
on the device's hardware input queue, for virtual devices the processing of the
operations is usually completed during the enqueue call to the compression
device. The dequeue burst API will retrieve any processed operations available
from the queue pair on the compression device, from physical devices this is usually
-directly from the devices processed queue, and for virtual device's from a
+directly from the devices processed queue, and for virtual device's from an
``rte_ring`` where processed operations are placed after being processed on the
enqueue call.
-A burst in DPDK compression can be a combination of stateless and stateful operations with a condition
-that for stateful ops only one op at-a-time should be enqueued from a particular stream i.e. no-two ops
-should belong to same stream in a single burst. However a burst may contain multiple stateful ops as long
-as each op is attached to a different stream i.e. a burst can look like:
+A burst in DPDK compression can be a combination of stateless and stateful operations with a
+condition that for stateful ops only one op at a time should be enqueued from a particular stream
+i.e. two ops should never belong to the same stream in a single burst.
+However, a burst may contain multiple stateful ops, as long as each op is attached to a different
+stream, i.e. a burst can look like:
+---------------+--------------+--------------+-----------------+--------------+--------------+
| enqueue_burst | op1.no_flush | op2.no_flush | op3.flush_final | op4.no_flush | op5.no_flush |
+---------------+--------------+--------------+-----------------+--------------+--------------+
-Where, op1 .. op5 all belong to different independent data units. op1, op2, op4, op5 must be stateful
-as stateless ops can only use flush full or final and op3 can be of type stateless or stateful.
-Every op with type set to RTE_COMP_OP_STATELESS must be attached to priv_xform and
-Every op with type set to RTE_COMP_OP_STATEFUL *must* be attached to stream.
+Where, op1 .. op5 all belong to different independent data units. op1, op2, op4, op5 must be
+stateful as stateless ops can only use flush full or final and op3 can be of type stateless or
+stateful. Every op with type set to RTE_COMP_OP_STATELESS must be attached to priv_xform and
+every op with type set to RTE_COMP_OP_STATEFUL *must* be attached to stream.
Since each operation in a burst is independent and thus can be completed
-out-of-order, applications which need ordering, should setup per-op user data
-area with reordering information so that it can determine enqueue order at
+out of order, applications which need ordering should setup a per-op user data
+area, with reordering information so that it can determine enqueue order at
dequeue.
-Also if multiple threads calls enqueue_burst() on same queue pair then it’s
-application onus to use proper locking mechanism to ensure exclusive enqueuing
-of operations.
+Also, if multiple threads calls enqueue_burst() on the same queue pair then it's
+the application's responsibility to use a proper locking mechanism to ensure
+exclusive enqueuing of operations.
Enqueue / Dequeue Burst APIs
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -629,9 +641,10 @@ Sample code
-----------
There are unit test applications that show how to use the compressdev library inside
-app/test/test_compressdev.c
+``app/test/test_compressdev.c``
Compression Device API
~~~~~~~~~~~~~~~~~~~~~~
-The compressdev Library API is described in the *DPDK API Reference* document.
+The compressdev Library API is described in the
+`DPDK API Reference <https://doc.dpdk.org/api/rte__compressdev_8h.html>`_.
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.780155587 +0100
+++ 0006-doc-fix-grammar-and-formatting-in-compressdev-guide.patch 2022-07-06 21:07:53.527518400 +0100
@@ -1 +1 @@
-From 4c9484373fcd0aa4a240fdb2e797269eb2f26b9b Mon Sep 17 00:00:00 2001
+From a8b87a70630ea8825309faa9ac3a101d80aa2ff5 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 4c9484373fcd0aa4a240fdb2e797269eb2f26b9b ]
+
@@ -12 +13,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'doc: fix grammar and parameters in l2fwd-crypto guide' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (4 preceding siblings ...)
2022-07-06 20:34 ` patch 'doc: fix grammar and formatting in compressdev guide' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'eventdev/eth_tx: fix queue delete' " luca.boccassi
` (23 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Jakub Poczatek; +Cc: Akhil Goyal, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/a1564274cd981375b4a4ff2bfc66d6bd3a90d78a
Thanks.
Luca Boccassi
---
From a1564274cd981375b4a4ff2bfc66d6bd3a90d78a Mon Sep 17 00:00:00 2001
From: Jakub Poczatek <jakub.poczatek@intel.com>
Date: Wed, 1 Jun 2022 09:35:52 +0000
Subject: [PATCH] doc: fix grammar and parameters in l2fwd-crypto guide
[ upstream commit 7fe84b0de25105952cf4e07970e5ea46788a2e2c ]
Doc was updated with fixed grammar in most cases. These
include adding periods to ends of sentences and capitalizing
some words. Some instances of "a" were changed to "an". The
option "-n 4" has also been removed from the example of
running the application.
Fixes: ba7b86b1419 ("doc: add l2fwd-crypto sample app guide")
Fixes: 2661f4fbe93 ("examples/l2fwd-crypto: add AEAD parameters")
Fixes: 4790f99d2d3 ("examples/l2fwd-crypto: use cryptodev algorithm parser")
Fixes: 5949e30dae6 ("doc: fix typo in l2fwd-crypto usage")
Fixes: acf8616901b ("cryptodev: add auth IV")
Fixes: b79e4c00af0 ("cryptodev: use AES-GCM/CCM as AEAD algorithms")
Fixes: d2797f51cc6 ("examples/l2fwd-crypto: add cryptodev mask option")
Fixes: e2a94f9ad3e ("doc: remove references to make from apps guide")
Fixes: 10b9d471a6f ("doc: update minimum requirement of l2fwd-crypto")
Fixes: 3cc28001a33 ("doc: fix typo in l2fwd-crypto guide")
Signed-off-by: Jakub Poczatek <jakub.poczatek@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
---
.../sample_app_ug/l2_forward_crypto.rst | 72 +++++++++----------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/doc/guides/sample_app_ug/l2_forward_crypto.rst b/doc/guides/sample_app_ug/l2_forward_crypto.rst
index 1b4444b7d8..ce49eab96f 100644
--- a/doc/guides/sample_app_ug/l2_forward_crypto.rst
+++ b/doc/guides/sample_app_ug/l2_forward_crypto.rst
@@ -15,7 +15,7 @@ Overview
The L2 Forwarding with Crypto sample application performs a crypto operation (cipher/hash)
specified by the user from command line (or using the default values),
with a crypto device capable of doing that operation,
-for each packet that is received on a RX_PORT and performs L2 forwarding.
+for each packet that is received on an RX_PORT and performs L2 forwarding.
The destination port is the adjacent port from the enabled portmask, that is,
if the first four ports are enabled (portmask 0xf),
ports 0 and 1 forward into each other, and ports 2 and 3 forward into each other.
@@ -54,37 +54,37 @@ The application requires a number of command line options:
where,
-* p PORTMASK: A hexadecimal bitmask of the ports to configure (default is all the ports)
+* p PORTMASK: A hexadecimal bitmask of the ports to configure. (Default is all the ports.)
-* q NQ: A number of queues (=ports) per lcore (default is 1)
+* q NQ: A number of queues (=ports) per lcore. (Default is 1.)
-* s: manage all ports from single core
+* s: manage all ports from a single core.
-* T PERIOD: statistics will be refreshed each PERIOD seconds
+* T PERIOD: statistics will be refreshed each PERIOD seconds.
- (0 to disable, 10 default, 86400 maximum)
+ (0 to disable, 10 default, 86400 maximum.)
-* cdev_type: select preferred crypto device type: HW, SW or anything (ANY)
+* cdev_type: select preferred crypto device type: HW, SW or anything (ANY).
- (default is ANY)
+ (Default is ANY.)
* chain: select the operation chaining to perform: Cipher->Hash (CIPHER_HASH),
Hash->Cipher (HASH_CIPHER), Cipher (CIPHER_ONLY), Hash (HASH_ONLY)
- or AEAD (AEAD)
+ or AEAD (AEAD).
- (default is Cipher->Hash)
+ (Default is Cipher->Hash.)
-* cipher_algo: select the ciphering algorithm (default is aes-cbc)
+* cipher_algo: select the ciphering algorithm. (Default is aes-cbc.)
-* cipher_op: select the ciphering operation to perform: ENCRYPT or DECRYPT
+* cipher_op: select the ciphering operation to perform: ENCRYPT or DECRYPT.
- (default is ENCRYPT)
+ (Default is ENCRYPT.)
* cipher_dataunit_len: set the length of the cipher data-unit.
-* cipher_key: set the ciphering key to be used. Bytes has to be separated with ":"
+* cipher_key: set the ciphering key to be used. Bytes have to be separated with ":".
* cipher_key_random_size: set the size of the ciphering key,
@@ -92,19 +92,19 @@ where,
Note that if --cipher_key is used, this will be ignored.
-* cipher_iv: set the cipher IV to be used. Bytes has to be separated with ":"
+* cipher_iv: set the cipher IV to be used. Bytes have to be separated with ":".
* cipher_iv_random_size: set the size of the cipher IV, which will be generated randomly.
Note that if --cipher_iv is used, this will be ignored.
-* auth_algo: select the authentication algorithm (default is sha1-hmac)
+* auth_algo: select the authentication algorithm. (Default is sha1-hmac.)
-* auth_op: select the authentication operation to perform: GENERATE or VERIFY
+* auth_op: select the authentication operation to perform: GENERATE or VERIFY.
- (default is GENERATE)
+ (Default is GENERATE.)
-* auth_key: set the authentication key to be used. Bytes has to be separated with ":"
+* auth_key: set the authentication key to be used. Bytes have to be separated with ":".
* auth_key_random_size: set the size of the authentication key,
@@ -112,19 +112,19 @@ where,
Note that if --auth_key is used, this will be ignored.
-* auth_iv: set the auth IV to be used. Bytes has to be separated with ":"
+* auth_iv: set the auth IV to be used. Bytes have to be separated with ":".
* auth_iv_random_size: set the size of the auth IV, which will be generated randomly.
Note that if --auth_iv is used, this will be ignored.
-* aead_algo: select the AEAD algorithm (default is aes-gcm)
+* aead_algo: select the AEAD algorithm. (Default is aes-gcm.)
-* aead_op: select the AEAD operation to perform: ENCRYPT or DECRYPT
+* aead_op: select the AEAD operation to perform: ENCRYPT or DECRYPT.
- (default is ENCRYPT)
+ (Default is ENCRYPT.)
-* aead_key: set the AEAD key to be used. Bytes has to be separated with ":"
+* aead_key: set the AEAD key to be used. Bytes have to be separated with ":".
* aead_key_random_size: set the size of the AEAD key,
@@ -132,13 +132,13 @@ where,
Note that if --aead_key is used, this will be ignored.
-* aead_iv: set the AEAD IV to be used. Bytes has to be separated with ":"
+* aead_iv: set the AEAD IV to be used. Bytes have to be separated with ":".
* aead_iv_random_size: set the size of the AEAD IV, which will be generated randomly.
Note that if --aead_iv is used, this will be ignored.
-* aad: set the AAD to be used. Bytes has to be separated with ":"
+* aad: set the AAD to be used. Bytes have to be separated with ":".
* aad_random_size: set the size of the AAD, which will be generated randomly.
@@ -151,9 +151,9 @@ where,
* cryptodev_mask: A hexadecimal bitmask of the cryptodevs to be used by the
application.
- (default is all cryptodevs).
+ (Default is all cryptodevs.)
-* [no-]mac-updating: Enable or disable MAC addresses updating (enabled by default).
+* [no-]mac-updating: Enable or disable MAC addresses updating. (Enabled by default.)
The application requires that crypto devices capable of performing
@@ -165,7 +165,7 @@ To run the application in linux environment with 2 lcores, 2 ports and 2 crypto
.. code-block:: console
- $ ./<build_dir>/examples/dpdk-l2fwd-crypto -l 0-1 -n 4 --vdev "crypto_aesni_mb0" \
+ $ ./<build_dir>/examples/dpdk-l2fwd-crypto -l 0-1 --vdev "crypto_aesni_mb0" \
--vdev "crypto_aesni_mb1" -- -p 0x3 --chain CIPHER_HASH \
--cipher_op ENCRYPT --cipher_algo aes-cbc \
--cipher_key 00:01:02:03:04:05:06:07:08:09:0a:0b:0c:0d:0e:0f \
@@ -179,7 +179,7 @@ and the Environment Abstraction Layer (EAL) options.
* The ``l2fwd-crypto`` sample application requires IPv4 packets for crypto operation.
- * If multiple Ethernet ports is passed, then equal number of crypto devices are to be passed.
+ * If multiple Ethernet ports are passed, then equal number of crypto devices are to be passed.
* All crypto devices shall use the same session.
@@ -187,7 +187,7 @@ Explanation
-----------
The L2 forward with Crypto application demonstrates the performance of a crypto operation
-on a packet received on a RX PORT before forwarding it to a TX PORT.
+on a packet received on an RX PORT before forwarding it to a TX PORT.
The following figure illustrates a sample flow of a packet in the application,
from reception until transmission.
@@ -196,7 +196,7 @@ from reception until transmission.
.. figure:: img/l2_fwd_encrypt_flow.*
- Encryption flow Through the L2 Forwarding with Crypto Application
+ Encryption flow through the L2 Forwarding with Crypto Application
The following sections provide some explanation of the application.
@@ -206,8 +206,8 @@ Crypto operation specification
All the packets received in all the ports get transformed by the crypto device/s
(ciphering and/or authentication).
-The crypto operation to be performed on the packet is parsed from the command line
-(go to "Running the Application" section for all the options).
+The crypto operation to be performed on the packet is parsed from the command line.
+(Go to "Running the Application" section for all the options.)
If no parameter is passed, the default crypto operation is:
@@ -244,7 +244,7 @@ when running the application.
The initialize_cryptodevs() function performs the device initialization.
It iterates through the list of the available crypto devices and
-check which ones are capable of performing the operation.
+checks which ones are capable of performing the operation.
Each device has a set of capabilities associated with it,
which are stored in the device info structure, so the function checks if the operation
is within the structure of each device.
@@ -291,7 +291,7 @@ This session is created and is later attached to the crypto operation:
Crypto operation creation
~~~~~~~~~~~~~~~~~~~~~~~~~
-Given N packets received from a RX PORT, N crypto operations are allocated
+Given N packets received from an RX PORT, N crypto operations are allocated
and filled:
.. literalinclude:: ../../../examples/l2fwd-crypto/main.c
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.813172886 +0100
+++ 0007-doc-fix-grammar-and-parameters-in-l2fwd-crypto-guide.patch 2022-07-06 21:07:53.527518400 +0100
@@ -1 +1 @@
-From 7fe84b0de25105952cf4e07970e5ea46788a2e2c Mon Sep 17 00:00:00 2001
+From a1564274cd981375b4a4ff2bfc66d6bd3a90d78a Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 7fe84b0de25105952cf4e07970e5ea46788a2e2c ]
+
@@ -22 +23,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'eventdev/eth_tx: fix queue delete' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (5 preceding siblings ...)
2022-07-06 20:34 ` patch 'doc: fix grammar and parameters in l2fwd-crypto " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'app/testpmd: fix supported RSS offload display' " luca.boccassi
` (22 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Naga Harish K S V; +Cc: Jay Jayatheerthan, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/49cc0b73a033688bf15e3d98a1e3247eb8b0ac7e
Thanks.
Luca Boccassi
---
From 49cc0b73a033688bf15e3d98a1e3247eb8b0ac7e Mon Sep 17 00:00:00 2001
From: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Date: Thu, 23 Jun 2022 15:35:11 +0530
Subject: [PATCH] eventdev/eth_tx: fix queue delete
[ upstream commit 881d4b4d8587419197815db57b94fc58ee487445 ]
Add spinlock protection in queue delete function.
This protects the data path while the queue delete operation
is in progress.
Fixes: a3bbf2e09756 ("eventdev: add eth Tx adapter implementation")
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
---
lib/eventdev/rte_event_eth_tx_adapter.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c
index c700fb7b1f..b4b37f1cae 100644
--- a/lib/eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/eventdev/rte_event_eth_tx_adapter.c
@@ -891,9 +891,10 @@ txa_service_queue_del(uint8_t id,
txa = txa_service_id_to_data(id);
+ rte_spinlock_lock(&txa->tx_lock);
tqi = txa_service_queue(txa, port_id, tx_queue_id);
if (tqi == NULL || !tqi->added)
- return 0;
+ goto ret_unlock;
tb = tqi->tx_buf;
tqi->added = 0;
@@ -903,6 +904,9 @@ txa_service_queue_del(uint8_t id,
txa->txa_ethdev[port_id].nb_queues--;
txa_service_queue_array_free(txa, port_id);
+
+ret_unlock:
+ rte_spinlock_unlock(&txa->tx_lock);
return 0;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.844956826 +0100
+++ 0008-eventdev-eth_tx-fix-queue-delete.patch 2022-07-06 21:07:53.531518477 +0100
@@ -1 +1 @@
-From 881d4b4d8587419197815db57b94fc58ee487445 Mon Sep 17 00:00:00 2001
+From 49cc0b73a033688bf15e3d98a1e3247eb8b0ac7e Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 881d4b4d8587419197815db57b94fc58ee487445 ]
+
@@ -11 +12,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'app/testpmd: fix supported RSS offload display' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (6 preceding siblings ...)
2022-07-06 20:34 ` patch 'eventdev/eth_tx: fix queue delete' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'net/netvsc: fix vmbus device reference in multi-process' " luca.boccassi
` (21 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Huisong Li; +Cc: Ferruh Yigit, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/b6e496325594c0dc79d89d608c5a33917a259b74
Thanks.
Luca Boccassi
---
From b6e496325594c0dc79d89d608c5a33917a259b74 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Wed, 29 Jun 2022 16:34:44 +0800
Subject: [PATCH] app/testpmd: fix supported RSS offload display
[ upstream commit 3c23ee6cdddf28641f52f31ced84d3feb867027c ]
The rte_eth_dev_info.flow_type_rss_offloads is populated in terms of
RTE_ETH_RSS_* bits. If PMD sets RTE_ETH_RSS_L3_SRC_ONLY to
dev_info->flow_type_rss_offloads. testpmd will display "user defined 63"
when run 'show port info 0'. Because testpmd use flowtype_to_str()
to display the supported RSS offload of PMD. In fact, the function is
used to display flow type in FDIR commands for i40e or ixgbe. This patch
uses the RTE_ETH_RSS_* bits to display supported RSS offload of PMD.
Fixes: b12964f621dc ("ethdev: unification of RSS offload types")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@xilinx.com>
---
app/test-pmd/config.c | 40 ++++++++++++++++++++++++++--------------
app/test-pmd/testpmd.h | 2 ++
2 files changed, 28 insertions(+), 14 deletions(-)
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index f8c058f204..ad1b5f51d5 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -66,8 +66,6 @@
#define NS_PER_SEC 1E9
-static char *flowtype_to_str(uint16_t flow_type);
-
static const struct {
enum tx_pkt_split split;
const char *name;
@@ -674,6 +672,19 @@ print_dev_capabilities(uint64_t capabilities)
}
}
+const char *
+rsstypes_to_str(uint64_t rss_type)
+{
+ uint16_t i;
+
+ for (i = 0; rss_type_table[i].str != NULL; i++) {
+ if (rss_type_table[i].rss_type == rss_type)
+ return rss_type_table[i].str;
+ }
+
+ return NULL;
+}
+
void
port_infos_display(portid_t port_id)
{
@@ -778,19 +789,20 @@ port_infos_display(portid_t port_id)
if (!dev_info.flow_type_rss_offloads)
printf("No RSS offload flow type is supported.\n");
else {
+ uint64_t rss_offload_types = dev_info.flow_type_rss_offloads;
uint16_t i;
- char *p;
printf("Supported RSS offload flow types:\n");
- for (i = RTE_ETH_FLOW_UNKNOWN + 1;
- i < sizeof(dev_info.flow_type_rss_offloads) * CHAR_BIT; i++) {
- if (!(dev_info.flow_type_rss_offloads & (1ULL << i)))
- continue;
- p = flowtype_to_str(i);
- if (p)
- printf(" %s\n", p);
- else
- printf(" user defined %d\n", i);
+ for (i = 0; i < sizeof(rss_offload_types) * CHAR_BIT; i++) {
+ uint64_t rss_offload = RTE_BIT64(i);
+ if ((rss_offload_types & rss_offload) != 0) {
+ const char *p = rsstypes_to_str(rss_offload);
+ if (p)
+ printf(" %s\n", p);
+ else
+ printf(" user defined %u\n",
+ i);
+ }
}
}
@@ -4825,6 +4837,8 @@ set_record_burst_stats(uint8_t on_off)
record_burst_stats = on_off;
}
+#if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
+
static char*
flowtype_to_str(uint16_t flow_type)
{
@@ -4868,8 +4882,6 @@ flowtype_to_str(uint16_t flow_type)
return NULL;
}
-#if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
-
static inline void
print_fdir_mask(struct rte_eth_fdir_masks *mask)
{
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 8fb3c3a3af..18abee907c 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -1124,6 +1124,8 @@ extern int flow_parse(const char *src, void *result, unsigned int size,
struct rte_flow_item **pattern,
struct rte_flow_action **actions);
+const char *rsstypes_to_str(uint64_t rss_type);
+
/*
* Work-around of a compilation error with ICC on invocations of the
* rte_be_to_cpu_16() function.
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.877328616 +0100
+++ 0009-app-testpmd-fix-supported-RSS-offload-display.patch 2022-07-06 21:07:53.535518554 +0100
@@ -1 +1 @@
-From 3c23ee6cdddf28641f52f31ced84d3feb867027c Mon Sep 17 00:00:00 2001
+From b6e496325594c0dc79d89d608c5a33917a259b74 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 3c23ee6cdddf28641f52f31ced84d3feb867027c ]
+
@@ -15 +16,0 @@
-Cc: stable@dpdk.org
@@ -25 +26 @@
-index 62833fe97c..a1183ad18e 100644
+index f8c058f204..ad1b5f51d5 100644
@@ -37 +38 @@
-@@ -675,6 +673,19 @@ print_dev_capabilities(uint64_t capabilities)
+@@ -674,6 +672,19 @@ print_dev_capabilities(uint64_t capabilities)
@@ -57 +58 @@
-@@ -779,19 +790,20 @@ port_infos_display(portid_t port_id)
+@@ -778,19 +789,20 @@ port_infos_display(portid_t port_id)
@@ -88 +89 @@
-@@ -5604,6 +5616,8 @@ set_record_burst_stats(uint8_t on_off)
+@@ -4825,6 +4837,8 @@ set_record_burst_stats(uint8_t on_off)
@@ -97 +98 @@
-@@ -5647,8 +5661,6 @@ flowtype_to_str(uint16_t flow_type)
+@@ -4868,8 +4882,6 @@ flowtype_to_str(uint16_t flow_type)
@@ -107 +108 @@
-index eeefb5e70f..195488b602 100644
+index 8fb3c3a3af..18abee907c 100644
@@ -110 +111 @@
-@@ -1199,6 +1199,8 @@ extern int flow_parse(const char *src, void *result, unsigned int size,
+@@ -1124,6 +1124,8 @@ extern int flow_parse(const char *src, void *result, unsigned int size,
@@ -116,3 +117,3 @@
- /* For registering driver specific testpmd commands. */
- struct testpmd_driver_commands {
- TAILQ_ENTRY(testpmd_driver_commands) next;
+ /*
+ * Work-around of a compilation error with ICC on invocations of the
+ * rte_be_to_cpu_16() function.
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/netvsc: fix vmbus device reference in multi-process' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (7 preceding siblings ...)
2022-07-06 20:34 ` patch 'app/testpmd: fix supported RSS offload display' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'net/virtio-user: fix socket non-blocking mode' " luca.boccassi
` (20 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Long Li; +Cc: Stephen Hemminger, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/3287afa5e81416f0fc06e860c0e5ebfc860790d1
Thanks.
Luca Boccassi
---
From 3287afa5e81416f0fc06e860c0e5ebfc860790d1 Mon Sep 17 00:00:00 2001
From: Long Li <longli@microsoft.com>
Date: Wed, 29 Jun 2022 16:29:44 -0700
Subject: [PATCH] net/netvsc: fix vmbus device reference in multi-process
[ upstream commit 7b1a614dcbe2017f1984be28a01efabcd7fed8b8 ]
The vmbus device is allocated via "calloc" before the EAL memory is
initialized. The secondary process can't reference the vmbus device as
it is not mapped correctly in the shared memory region.
Replace all references to the vmbus device (and its contents) with the
pointers/contents set by the primary process.
Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Signed-off-by: Long Li <longli@microsoft.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
---
drivers/bus/vmbus/private.h | 2 ++
drivers/bus/vmbus/vmbus_channel.c | 15 +++++++--------
drivers/net/netvsc/hn_ethdev.c | 4 ++--
drivers/net/netvsc/hn_nvs.c | 14 +++++++-------
drivers/net/netvsc/hn_rxtx.c | 8 ++++----
drivers/net/netvsc/hn_var.h | 4 ++--
6 files changed, 24 insertions(+), 23 deletions(-)
diff --git a/drivers/bus/vmbus/private.h b/drivers/bus/vmbus/private.h
index 1bca147e12..658303bc27 100644
--- a/drivers/bus/vmbus/private.h
+++ b/drivers/bus/vmbus/private.h
@@ -74,6 +74,8 @@ struct vmbus_channel {
uint16_t relid;
uint16_t subchannel_id;
uint8_t monitor_id;
+
+ struct vmbus_mon_page *monitor_page;
};
#define VMBUS_MAX_CHANNELS 64
diff --git a/drivers/bus/vmbus/vmbus_channel.c b/drivers/bus/vmbus/vmbus_channel.c
index 119b9b367e..9bd01679c3 100644
--- a/drivers/bus/vmbus/vmbus_channel.c
+++ b/drivers/bus/vmbus/vmbus_channel.c
@@ -27,7 +27,7 @@ vmbus_sync_set_bit(volatile uint32_t *addr, uint32_t mask)
}
static inline void
-vmbus_set_monitor(const struct rte_vmbus_device *dev, uint32_t monitor_id)
+vmbus_set_monitor(const struct vmbus_channel *channel, uint32_t monitor_id)
{
uint32_t *monitor_addr, monitor_mask;
unsigned int trigger_index;
@@ -35,15 +35,14 @@ vmbus_set_monitor(const struct rte_vmbus_device *dev, uint32_t monitor_id)
trigger_index = monitor_id / HV_MON_TRIG_LEN;
monitor_mask = 1u << (monitor_id % HV_MON_TRIG_LEN);
- monitor_addr = &dev->monitor_page->trigs[trigger_index].pending;
+ monitor_addr = &channel->monitor_page->trigs[trigger_index].pending;
vmbus_sync_set_bit(monitor_addr, monitor_mask);
}
static void
-vmbus_set_event(const struct rte_vmbus_device *dev,
- const struct vmbus_channel *chan)
+vmbus_set_event(const struct vmbus_channel *chan)
{
- vmbus_set_monitor(dev, chan->monitor_id);
+ vmbus_set_monitor(chan, chan->monitor_id);
}
/*
@@ -81,7 +80,6 @@ rte_vmbus_set_latency(const struct rte_vmbus_device *dev,
void
rte_vmbus_chan_signal_tx(const struct vmbus_channel *chan)
{
- const struct rte_vmbus_device *dev = chan->device;
const struct vmbus_br *tbr = &chan->txbr;
/* Make sure all updates are done before signaling host */
@@ -91,7 +89,7 @@ rte_vmbus_chan_signal_tx(const struct vmbus_channel *chan)
if (tbr->vbr->imask)
return;
- vmbus_set_event(dev, chan);
+ vmbus_set_event(chan);
}
@@ -218,7 +216,7 @@ void rte_vmbus_chan_signal_read(struct vmbus_channel *chan, uint32_t bytes_read)
if (write_sz <= pending_sz)
return;
- vmbus_set_event(chan->device, chan);
+ vmbus_set_event(chan);
}
int rte_vmbus_chan_recv(struct vmbus_channel *chan, void *data, uint32_t *len,
@@ -325,6 +323,7 @@ int vmbus_chan_create(const struct rte_vmbus_device *device,
chan->subchannel_id = subid;
chan->relid = relid;
chan->monitor_id = monitor_id;
+ chan->monitor_page = device->monitor_page;
*new_chan = chan;
err = vmbus_uio_map_rings(chan);
diff --git a/drivers/net/netvsc/hn_ethdev.c b/drivers/net/netvsc/hn_ethdev.c
index 0a357d3645..787139c0b2 100644
--- a/drivers/net/netvsc/hn_ethdev.c
+++ b/drivers/net/netvsc/hn_ethdev.c
@@ -1169,8 +1169,8 @@ eth_hn_dev_init(struct rte_eth_dev *eth_dev)
}
hv->vmbus = vmbus;
- hv->rxbuf_res = &vmbus->resource[HV_RECV_BUF_MAP];
- hv->chim_res = &vmbus->resource[HV_SEND_BUF_MAP];
+ hv->rxbuf_res = vmbus->resource[HV_RECV_BUF_MAP];
+ hv->chim_res = vmbus->resource[HV_SEND_BUF_MAP];
hv->port_id = eth_dev->data->port_id;
hv->latency = HN_CHAN_LATENCY_NS;
hv->rx_copybreak = HN_RXCOPY_THRESHOLD;
diff --git a/drivers/net/netvsc/hn_nvs.c b/drivers/net/netvsc/hn_nvs.c
index a29ac18ff4..b90280c9ff 100644
--- a/drivers/net/netvsc/hn_nvs.c
+++ b/drivers/net/netvsc/hn_nvs.c
@@ -193,11 +193,11 @@ hn_nvs_conn_rxbuf(struct hn_data *hv)
* Connect RXBUF to NVS.
*/
conn.type = NVS_TYPE_RXBUF_CONN;
- conn.gpadl = hv->rxbuf_res->phys_addr;
+ conn.gpadl = hv->rxbuf_res.phys_addr;
conn.sig = NVS_RXBUF_SIG;
PMD_DRV_LOG(DEBUG, "connect rxbuff va=%p gpad=%#" PRIx64,
- hv->rxbuf_res->addr,
- hv->rxbuf_res->phys_addr);
+ hv->rxbuf_res.addr,
+ hv->rxbuf_res.phys_addr);
error = hn_nvs_execute(hv, &conn, sizeof(conn),
&resp, sizeof(resp),
@@ -308,17 +308,17 @@ hn_nvs_conn_chim(struct hn_data *hv)
struct hn_nvs_chim_conn chim;
struct hn_nvs_chim_connresp resp;
uint32_t sectsz;
- unsigned long len = hv->chim_res->len;
+ unsigned long len = hv->chim_res.len;
int error;
/* Connect chimney sending buffer to NVS */
memset(&chim, 0, sizeof(chim));
chim.type = NVS_TYPE_CHIM_CONN;
- chim.gpadl = hv->chim_res->phys_addr;
+ chim.gpadl = hv->chim_res.phys_addr;
chim.sig = NVS_CHIM_SIG;
PMD_DRV_LOG(DEBUG, "connect send buf va=%p gpad=%#" PRIx64,
- hv->chim_res->addr,
- hv->chim_res->phys_addr);
+ hv->chim_res.addr,
+ hv->chim_res.phys_addr);
error = hn_nvs_execute(hv, &chim, sizeof(chim),
&resp, sizeof(resp),
diff --git a/drivers/net/netvsc/hn_rxtx.c b/drivers/net/netvsc/hn_rxtx.c
index bf33bb031e..7a3bd523a5 100644
--- a/drivers/net/netvsc/hn_rxtx.c
+++ b/drivers/net/netvsc/hn_rxtx.c
@@ -582,7 +582,7 @@ static void hn_rxpkt(struct hn_rx_queue *rxq, struct hn_rx_bufinfo *rxb,
* Use refcount to handle multiple packets in same
* receive buffer section.
*/
- rxbuf = hv->rxbuf_res->addr;
+ rxbuf = hv->rxbuf_res.addr;
iova = rte_mem_virt2iova(rxbuf) + RTE_PTR_DIFF(data, rxbuf);
shinfo = &rxb->shinfo;
@@ -765,8 +765,8 @@ hn_nvs_handle_rxbuf(struct rte_eth_dev *dev,
{
const struct vmbus_chanpkt_rxbuf *pkt;
const struct hn_nvs_hdr *nvs_hdr = buf;
- uint32_t rxbuf_sz = hv->rxbuf_res->len;
- char *rxbuf = hv->rxbuf_res->addr;
+ uint32_t rxbuf_sz = hv->rxbuf_res.len;
+ char *rxbuf = hv->rxbuf_res.addr;
unsigned int i, hlen, count;
struct hn_rx_bufinfo *rxb;
@@ -1266,7 +1266,7 @@ hn_try_txagg(struct hn_data *hv, struct hn_tx_queue *txq,
if (txd->chim_index == NVS_CHIM_IDX_INVALID)
return NULL;
- chim = (uint8_t *)hv->chim_res->addr
+ chim = (uint8_t *)hv->chim_res.addr
+ txd->chim_index * hv->chim_szmax;
txq->agg_txd = txd;
diff --git a/drivers/net/netvsc/hn_var.h b/drivers/net/netvsc/hn_var.h
index 416c042a27..98a3b83033 100644
--- a/drivers/net/netvsc/hn_var.h
+++ b/drivers/net/netvsc/hn_var.h
@@ -147,7 +147,7 @@ struct hn_data {
uint32_t link_status;
uint32_t link_speed;
- struct rte_mem_resource *rxbuf_res; /* UIO resource for Rx */
+ struct rte_mem_resource rxbuf_res; /* UIO resource for Rx */
uint32_t rxbuf_section_cnt; /* # of Rx sections */
uint32_t rx_copybreak;
uint32_t rx_extmbuf_enable;
@@ -156,7 +156,7 @@ struct hn_data {
uint64_t rss_offloads;
rte_spinlock_t chim_lock;
- struct rte_mem_resource *chim_res; /* UIO resource for Tx */
+ struct rte_mem_resource chim_res; /* UIO resource for Tx */
struct rte_bitmap *chim_bmap; /* Send buffer map */
void *chim_bmem;
uint32_t tx_copybreak;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.916097388 +0100
+++ 0010-net-netvsc-fix-vmbus-device-reference-in-multi-proce.patch 2022-07-06 21:07:53.539518631 +0100
@@ -1 +1 @@
-From 7b1a614dcbe2017f1984be28a01efabcd7fed8b8 Mon Sep 17 00:00:00 2001
+From 3287afa5e81416f0fc06e860c0e5ebfc860790d1 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 7b1a614dcbe2017f1984be28a01efabcd7fed8b8 ]
+
@@ -14 +15,0 @@
-Cc: stable@dpdk.org
@@ -163 +164 @@
-index 1afc14f280..909c07a4ab 100644
+index bf33bb031e..7a3bd523a5 100644
@@ -166 +167 @@
-@@ -580,7 +580,7 @@ static void hn_rxpkt(struct hn_rx_queue *rxq, struct hn_rx_bufinfo *rxb,
+@@ -582,7 +582,7 @@ static void hn_rxpkt(struct hn_rx_queue *rxq, struct hn_rx_bufinfo *rxb,
@@ -175 +176 @@
-@@ -763,8 +763,8 @@ hn_nvs_handle_rxbuf(struct rte_eth_dev *dev,
+@@ -765,8 +765,8 @@ hn_nvs_handle_rxbuf(struct rte_eth_dev *dev,
@@ -186 +187 @@
-@@ -1264,7 +1264,7 @@ hn_try_txagg(struct hn_data *hv, struct hn_tx_queue *txq,
+@@ -1266,7 +1266,7 @@ hn_try_txagg(struct hn_data *hv, struct hn_tx_queue *txq,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/virtio-user: fix socket non-blocking mode' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (8 preceding siblings ...)
2022-07-06 20:34 ` patch 'net/netvsc: fix vmbus device reference in multi-process' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'doc: fix readability in vhost guide' " luca.boccassi
` (19 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Yuan Wang; +Cc: Stephen Hemminger, Chenbo Xia, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/19457a68eab5f145a21844c1edcf559a69dc7540
Thanks.
Luca Boccassi
---
From 19457a68eab5f145a21844c1edcf559a69dc7540 Mon Sep 17 00:00:00 2001
From: Yuan Wang <yuanx.wang@intel.com>
Date: Fri, 17 Jun 2022 10:42:29 +0800
Subject: [PATCH] net/virtio-user: fix socket non-blocking mode
[ upstream commit 41f9a1757ffc010cc3debaad9a56af8ad88d0c6d ]
The virtio-user initialization requires unix socket to receive backend
messages in block mode. However, vhost_user_update_link_state() sets
the same socket to nonblocking via fcntl, which affects all threads.
Enabling the rxq interrupt can causes both of these behaviors to occur
concurrently, with the result that the initialization may fail
because no messages are received in nonblocking socket.
Thread 1:
virtio_init_device()
--> virtio_user_start_device()
--> vhost_user_set_memory_table()
--> vhost_user_check_reply_ack()
Thread 2:
virtio_interrupt_handler()
--> vhost_user_update_link_state()
Fix that by replacing O_NONBLOCK with the recv per-call option
MSG_DONTWAIT.
Fixes: ef53b6030039 ("net/virtio-user: support LSC")
Signed-off-by: Yuan Wang <yuanx.wang@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
---
drivers/net/virtio/virtio_user/vhost_user.c | 15 +--------------
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drivers/net/virtio/virtio_user/vhost_user.c b/drivers/net/virtio/virtio_user/vhost_user.c
index 0a39393c45..77820bf967 100644
--- a/drivers/net/virtio/virtio_user/vhost_user.c
+++ b/drivers/net/virtio/virtio_user/vhost_user.c
@@ -942,15 +942,8 @@ vhost_user_update_link_state(struct virtio_user_dev *dev)
if (data->vhostfd >= 0) {
int r;
- int flags;
- flags = fcntl(data->vhostfd, F_GETFL);
- if (fcntl(data->vhostfd, F_SETFL, flags | O_NONBLOCK) == -1) {
- PMD_DRV_LOG(ERR, "error setting O_NONBLOCK flag");
- return -1;
- }
-
- r = recv(data->vhostfd, buf, 128, MSG_PEEK);
+ r = recv(data->vhostfd, buf, 128, MSG_PEEK | MSG_DONTWAIT);
if (r == 0 || (r < 0 && errno != EAGAIN)) {
dev->net_status &= (~VIRTIO_NET_S_LINK_UP);
PMD_DRV_LOG(ERR, "virtio-user port %u is down", dev->hw.port_id);
@@ -965,12 +958,6 @@ vhost_user_update_link_state(struct virtio_user_dev *dev)
} else {
dev->net_status |= VIRTIO_NET_S_LINK_UP;
}
-
- if (fcntl(data->vhostfd, F_SETFL,
- flags & ~O_NONBLOCK) == -1) {
- PMD_DRV_LOG(ERR, "error clearing O_NONBLOCK flag");
- return -1;
- }
} else if (dev->is_server) {
dev->net_status &= (~VIRTIO_NET_S_LINK_UP);
if (virtio_user_dev_server_reconnect(dev) >= 0)
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.952055233 +0100
+++ 0011-net-virtio-user-fix-socket-non-blocking-mode.patch 2022-07-06 21:07:53.539518631 +0100
@@ -1 +1 @@
-From 41f9a1757ffc010cc3debaad9a56af8ad88d0c6d Mon Sep 17 00:00:00 2001
+From 19457a68eab5f145a21844c1edcf559a69dc7540 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 41f9a1757ffc010cc3debaad9a56af8ad88d0c6d ]
+
@@ -27 +28,0 @@
-Cc: stable@dpdk.org
@@ -37 +38 @@
-index 7d1749114d..198bd63d3c 100644
+index 0a39393c45..77820bf967 100644
@@ -40 +41 @@
-@@ -940,15 +940,8 @@ vhost_user_update_link_state(struct virtio_user_dev *dev)
+@@ -942,15 +942,8 @@ vhost_user_update_link_state(struct virtio_user_dev *dev)
@@ -57 +58 @@
-@@ -963,12 +956,6 @@ vhost_user_update_link_state(struct virtio_user_dev *dev)
+@@ -965,12 +958,6 @@ vhost_user_update_link_state(struct virtio_user_dev *dev)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'doc: fix readability in vhost guide' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (9 preceding siblings ...)
2022-07-06 20:34 ` patch 'net/virtio-user: fix socket non-blocking mode' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'net/vhost: fix deadlock on vring state change' " luca.boccassi
` (18 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Herakliusz Lipiec; +Cc: Chenbo Xia, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/a3ff1d7e9ce4d3f5b2dbb2b4fda74cb20ad76781
Thanks.
Luca Boccassi
---
From a3ff1d7e9ce4d3f5b2dbb2b4fda74cb20ad76781 Mon Sep 17 00:00:00 2001
From: Herakliusz Lipiec <herakliusz.lipiec@intel.com>
Date: Thu, 23 Jun 2022 14:57:21 +0100
Subject: [PATCH] doc: fix readability in vhost guide
[ upstream commit c8a3ee49c94d72d03e2de5814bca01f7fd7d79d1 ]
fix grammar issues and readbility in vhost library programmer guide
Fixes: 768274ebbd5e ("vhost: avoid populate guest memory")
Signed-off-by: Herakliusz Lipiec <herakliusz.lipiec@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
---
doc/guides/prog_guide/vhost_lib.rst | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/doc/guides/prog_guide/vhost_lib.rst b/doc/guides/prog_guide/vhost_lib.rst
index 76f5d303c9..8959568d8f 100644
--- a/doc/guides/prog_guide/vhost_lib.rst
+++ b/doc/guides/prog_guide/vhost_lib.rst
@@ -331,7 +331,7 @@ vhost-user implementation has two options:
* The vhost supported features must be exactly the same before and
after the restart. For example, if TSO is disabled and then enabled,
- nothing will work and issues undefined might happen.
+ nothing will work and undefined issues might happen.
No matter which mode is used, once a connection is established, DPDK
vhost-user will start receiving and processing vhost messages from QEMU.
@@ -362,12 +362,12 @@ Guest memory requirement
* Memory pre-allocation
- For non-async data path, guest memory pre-allocation is not a
- must. This can help save of memory. If users really want the guest memory
- to be pre-allocated (e.g., for performance reason), we can add option
- ``-mem-prealloc`` when starting QEMU. Or, we can lock all memory at vhost
- side which will force memory to be allocated when mmap at vhost side;
- option --mlockall in ovs-dpdk is an example in hand.
+ For non-async data path guest memory pre-allocation is not a
+ must but can help save memory. To do this we can add option
+ ``-mem-prealloc`` when starting QEMU, or we can lock all memory at vhost
+ side which will force memory to be allocated when it calls mmap
+ (option --mlockall in ovs-dpdk is an example in hand).
+
For async data path, we force the VM memory to be pre-allocated at vhost
lib when mapping the guest memory; and also we need to lock the memory to
@@ -375,8 +375,8 @@ Guest memory requirement
* Memory sharing
- Make sure ``share=on`` QEMU option is given. vhost-user will not work with
- a QEMU version without shared memory mapping.
+ Make sure ``share=on`` QEMU option is given. The vhost-user will not work with
+ a QEMU instance without shared memory mapping.
Vhost supported vSwitch reference
---------------------------------
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:53.984474236 +0100
+++ 0012-doc-fix-readability-in-vhost-guide.patch 2022-07-06 21:07:53.543518707 +0100
@@ -1 +1 @@
-From c8a3ee49c94d72d03e2de5814bca01f7fd7d79d1 Mon Sep 17 00:00:00 2001
+From a3ff1d7e9ce4d3f5b2dbb2b4fda74cb20ad76781 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit c8a3ee49c94d72d03e2de5814bca01f7fd7d79d1 ]
+
@@ -9 +10,0 @@
-Cc: stable@dpdk.org
@@ -18 +19 @@
-index a4ffed9fa1..bad4d819e1 100644
+index 76f5d303c9..8959568d8f 100644
@@ -21 +22 @@
-@@ -351,7 +351,7 @@ vhost-user implementation has two options:
+@@ -331,7 +331,7 @@ vhost-user implementation has two options:
@@ -30 +31 @@
-@@ -382,12 +382,12 @@ Guest memory requirement
+@@ -362,12 +362,12 @@ Guest memory requirement
@@ -49 +50 @@
-@@ -395,8 +395,8 @@ Guest memory requirement
+@@ -375,8 +375,8 @@ Guest memory requirement
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/vhost: fix deadlock on vring state change' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (10 preceding siblings ...)
2022-07-06 20:34 ` patch 'doc: fix readability in vhost guide' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'vdpa/sfc: fix sync between QEMU and vhost-user' " luca.boccassi
` (17 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Yuan Wang; +Cc: Chenbo Xia, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/5991d25b7489739b2b8d7c9af1c264f6a7f2988d
Thanks.
Luca Boccassi
---
From 5991d25b7489739b2b8d7c9af1c264f6a7f2988d Mon Sep 17 00:00:00 2001
From: Yuan Wang <yuanx.wang@intel.com>
Date: Mon, 27 Jun 2022 13:51:25 +0800
Subject: [PATCH] net/vhost: fix deadlock on vring state change
[ upstream commit 193edd75a94fe8d0d633d1702109779fd7b7d6a0 ]
If vring state changes after pmd starts working, the locked vring
notifies pmd, thus calling update_queuing_status(), the latter
will wait for pmd to finish accessing vring, while pmd is also
waiting for vring to be unlocked, thus causing deadlock.
Actually, update_queuing_status() only needs to wait while
destroy/stopping the device, but not in other cases.
This patch adds a flag for whether or not to wait to fix this issue.
Fixes: 1ce3c7fe149f ("net/vhost: emulate device start/stop behavior")
Signed-off-by: Yuan Wang <yuanx.wang@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
---
drivers/net/vhost/rte_eth_vhost.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/vhost/rte_eth_vhost.c b/drivers/net/vhost/rte_eth_vhost.c
index a248a65df4..a280e788fb 100644
--- a/drivers/net/vhost/rte_eth_vhost.c
+++ b/drivers/net/vhost/rte_eth_vhost.c
@@ -716,7 +716,7 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)
}
static void
-update_queuing_status(struct rte_eth_dev *dev)
+update_queuing_status(struct rte_eth_dev *dev, bool wait_queuing)
{
struct pmd_internal *internal = dev->data->dev_private;
struct vhost_queue *vq;
@@ -742,7 +742,7 @@ update_queuing_status(struct rte_eth_dev *dev)
rte_atomic32_set(&vq->allow_queuing, 1);
else
rte_atomic32_set(&vq->allow_queuing, 0);
- while (rte_atomic32_read(&vq->while_queuing))
+ while (wait_queuing && rte_atomic32_read(&vq->while_queuing))
rte_pause();
}
@@ -754,7 +754,7 @@ update_queuing_status(struct rte_eth_dev *dev)
rte_atomic32_set(&vq->allow_queuing, 1);
else
rte_atomic32_set(&vq->allow_queuing, 0);
- while (rte_atomic32_read(&vq->while_queuing))
+ while (wait_queuing && rte_atomic32_read(&vq->while_queuing))
rte_pause();
}
}
@@ -836,7 +836,7 @@ new_device(int vid)
eth_dev->data->dev_link.link_status = RTE_ETH_LINK_UP;
rte_atomic32_set(&internal->dev_attached, 1);
- update_queuing_status(eth_dev);
+ update_queuing_status(eth_dev, false);
VHOST_LOG(INFO, "Vhost device %d created\n", vid);
@@ -866,7 +866,7 @@ destroy_device(int vid)
internal = eth_dev->data->dev_private;
rte_atomic32_set(&internal->dev_attached, 0);
- update_queuing_status(eth_dev);
+ update_queuing_status(eth_dev, true);
eth_dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
@@ -976,7 +976,7 @@ vring_state_changed(int vid, uint16_t vring, int enable)
state->max_vring = RTE_MAX(vring, state->max_vring);
rte_spinlock_unlock(&state->lock);
- update_queuing_status(eth_dev);
+ update_queuing_status(eth_dev, false);
VHOST_LOG(INFO, "vring%u is %s\n",
vring, enable ? "enabled" : "disabled");
@@ -1163,7 +1163,7 @@ eth_dev_start(struct rte_eth_dev *eth_dev)
}
rte_atomic32_set(&internal->started, 1);
- update_queuing_status(eth_dev);
+ update_queuing_status(eth_dev, false);
return 0;
}
@@ -1175,7 +1175,7 @@ eth_dev_stop(struct rte_eth_dev *dev)
dev->data->dev_started = 0;
rte_atomic32_set(&internal->started, 0);
- update_queuing_status(dev);
+ update_queuing_status(dev, true);
return 0;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.015964700 +0100
+++ 0013-net-vhost-fix-deadlock-on-vring-state-change.patch 2022-07-06 21:07:53.543518707 +0100
@@ -1 +1 @@
-From 193edd75a94fe8d0d633d1702109779fd7b7d6a0 Mon Sep 17 00:00:00 2001
+From 5991d25b7489739b2b8d7c9af1c264f6a7f2988d Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 193edd75a94fe8d0d633d1702109779fd7b7d6a0 ]
+
@@ -17 +18,0 @@
-Cc: stable@dpdk.org
@@ -26 +27 @@
-index d75d256040..7e512d94bf 100644
+index a248a65df4..a280e788fb 100644
@@ -29 +30 @@
-@@ -741,7 +741,7 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)
+@@ -716,7 +716,7 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)
@@ -38 +39 @@
-@@ -767,7 +767,7 @@ update_queuing_status(struct rte_eth_dev *dev)
+@@ -742,7 +742,7 @@ update_queuing_status(struct rte_eth_dev *dev)
@@ -47 +48 @@
-@@ -779,7 +779,7 @@ update_queuing_status(struct rte_eth_dev *dev)
+@@ -754,7 +754,7 @@ update_queuing_status(struct rte_eth_dev *dev)
@@ -56,2 +57,2 @@
-@@ -868,7 +868,7 @@ new_device(int vid)
- vhost_dev_csum_configure(eth_dev);
+@@ -836,7 +836,7 @@ new_device(int vid)
+ eth_dev->data->dev_link.link_status = RTE_ETH_LINK_UP;
@@ -65 +66 @@
-@@ -898,7 +898,7 @@ destroy_device(int vid)
+@@ -866,7 +866,7 @@ destroy_device(int vid)
@@ -74 +75 @@
-@@ -1008,7 +1008,7 @@ vring_state_changed(int vid, uint16_t vring, int enable)
+@@ -976,7 +976,7 @@ vring_state_changed(int vid, uint16_t vring, int enable)
@@ -83 +84 @@
-@@ -1197,7 +1197,7 @@ eth_dev_start(struct rte_eth_dev *eth_dev)
+@@ -1163,7 +1163,7 @@ eth_dev_start(struct rte_eth_dev *eth_dev)
@@ -92 +93 @@
-@@ -1209,7 +1209,7 @@ eth_dev_stop(struct rte_eth_dev *dev)
+@@ -1175,7 +1175,7 @@ eth_dev_stop(struct rte_eth_dev *dev)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'vdpa/sfc: fix sync between QEMU and vhost-user' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (11 preceding siblings ...)
2022-07-06 20:34 ` patch 'net/vhost: fix deadlock on vring state change' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'vhost: add some trailing newline in log messages' " luca.boccassi
` (16 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Abhimanyu Saini
Cc: Vijay Kumar Srivastava, Andrew Rybchenko, Maxime Coquelin, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/4ef6a79d4a99f3f5be2d5671e6affbc402eb81a0
Thanks.
Luca Boccassi
---
From 4ef6a79d4a99f3f5be2d5671e6affbc402eb81a0 Mon Sep 17 00:00:00 2001
From: Abhimanyu Saini <absaini@amd.com>
Date: Tue, 28 Jun 2022 10:59:26 +0530
Subject: [PATCH] vdpa/sfc: fix sync between QEMU and vhost-user
[ upstream commit 2eb13ddea3847fe57653d1ffef1e8e3d9e3cc84c ]
When DPDK app is running in the VF, it sometimes rings the doorbell
before dev_config has had a chance to complete and hence it misses
the event. As workaround, ring the doorbell when vDPA reports the
notify_area to QEMU.
Fixes: 630be406dcbf ("vdpa/sfc: get queue notify area info")
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Signed-off-by: Abhimanyu Saini <absaini@amd.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/vdpa/sfc/sfc_vdpa_ops.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/vdpa/sfc/sfc_vdpa_ops.c b/drivers/vdpa/sfc/sfc_vdpa_ops.c
index b3d9b6cd56..63aa52da49 100644
--- a/drivers/vdpa/sfc/sfc_vdpa_ops.c
+++ b/drivers/vdpa/sfc/sfc_vdpa_ops.c
@@ -794,6 +794,8 @@ sfc_vdpa_get_notify_area(int vid, int qid, uint64_t *offset, uint64_t *size)
int vfio_dev_fd;
efx_rc_t rc;
unsigned int bar_offset;
+ volatile void *doorbell;
+ struct rte_pci_device *pci_dev;
struct rte_vdpa_device *vdpa_dev;
struct sfc_vdpa_ops_data *ops_data;
struct vfio_region_info reg = { .argsz = sizeof(reg) };
@@ -856,6 +858,18 @@ sfc_vdpa_get_notify_area(int vid, int qid, uint64_t *offset, uint64_t *size)
sfc_vdpa_info(dev, "vDPA ops get_notify_area :: offset : 0x%" PRIx64,
*offset);
+ pci_dev = sfc_vdpa_adapter_by_dev_handle(dev)->pdev;
+ doorbell = (uint8_t *)pci_dev->mem_resource[reg.index].addr + *offset;
+
+ /*
+ * virtio-net driver in VM sends queue notifications before
+ * vDPA has a chance to setup the queues and notification area,
+ * and hence the HW misses these doorbell notifications.
+ * Since, it is safe to send duplicate doorbell, send another
+ * doorbell from vDPA driver as workaround for this timing issue.
+ */
+ rte_write16(qid, doorbell);
+
return 0;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.048666364 +0100
+++ 0014-vdpa-sfc-fix-sync-between-QEMU-and-vhost-user.patch 2022-07-06 21:07:53.543518707 +0100
@@ -1 +1 @@
-From 2eb13ddea3847fe57653d1ffef1e8e3d9e3cc84c Mon Sep 17 00:00:00 2001
+From 4ef6a79d4a99f3f5be2d5671e6affbc402eb81a0 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 2eb13ddea3847fe57653d1ffef1e8e3d9e3cc84c ]
+
@@ -12 +13,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'vhost: add some trailing newline in log messages' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (12 preceding siblings ...)
2022-07-06 20:34 ` patch 'vdpa/sfc: fix sync between QEMU and vhost-user' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'vhost: restore device information " luca.boccassi
` (15 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: David Marchand; +Cc: Chenbo Xia, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/1f963ee7a31061c864884f72b77a611a0f3e6507
Thanks.
Luca Boccassi
---
From 1f963ee7a31061c864884f72b77a611a0f3e6507 Mon Sep 17 00:00:00 2001
From: David Marchand <david.marchand@redhat.com>
Date: Fri, 1 Jul 2022 09:55:08 +0200
Subject: [PATCH] vhost: add some trailing newline in log messages
[ upstream commit 1ef468a7e9ff1a9da50b809ae04bbf60b6fbe351 ]
VHOST_LOG_* macros don't append a newline.
Add missing ones.
Fixes: e623e0c6d8a5 ("vhost: add reconnect ability")
Fixes: af1475918124 ("vhost: introduce API to start a specific driver")
Fixes: 2dfeebe26546 ("vhost: check return of mutex initialization")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
---
lib/vhost/socket.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/vhost/socket.c b/lib/vhost/socket.c
index 82963c1e6d..33f54a779b 100644
--- a/lib/vhost/socket.c
+++ b/lib/vhost/socket.c
@@ -501,7 +501,7 @@ vhost_user_reconnect_init(void)
ret = pthread_mutex_init(&reconn_list.mutex, NULL);
if (ret < 0) {
- VHOST_LOG_CONFIG(ERR, "failed to initialize mutex");
+ VHOST_LOG_CONFIG(ERR, "failed to initialize mutex\n");
return ret;
}
TAILQ_INIT(&reconn_list.head);
@@ -509,10 +509,10 @@ vhost_user_reconnect_init(void)
ret = rte_ctrl_thread_create(&reconn_tid, "vhost_reconn", NULL,
vhost_user_client_reconnect, NULL);
if (ret != 0) {
- VHOST_LOG_CONFIG(ERR, "failed to create reconnect thread");
+ VHOST_LOG_CONFIG(ERR, "failed to create reconnect thread\n");
if (pthread_mutex_destroy(&reconn_list.mutex)) {
VHOST_LOG_CONFIG(ERR,
- "failed to destroy reconnect mutex");
+ "failed to destroy reconnect mutex\n");
}
}
@@ -1147,7 +1147,7 @@ rte_vhost_driver_start(const char *path)
&vhost_user.fdset);
if (ret != 0) {
VHOST_LOG_CONFIG(ERR,
- "failed to create fdset handling thread");
+ "failed to create fdset handling thread\n");
fdset_pipe_uninit(&vhost_user.fdset);
return -1;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.080253711 +0100
+++ 0015-vhost-add-some-trailing-newline-in-log-messages.patch 2022-07-06 21:07:53.543518707 +0100
@@ -1 +1 @@
-From 1ef468a7e9ff1a9da50b809ae04bbf60b6fbe351 Mon Sep 17 00:00:00 2001
+From 1f963ee7a31061c864884f72b77a611a0f3e6507 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 1ef468a7e9ff1a9da50b809ae04bbf60b6fbe351 ]
+
@@ -12 +13,0 @@
-Cc: stable@dpdk.org
@@ -17,2 +18,2 @@
- lib/vhost/socket.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
+ lib/vhost/socket.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
@@ -21 +22 @@
-index 7a0f63af14..24d60ca149 100644
+index 82963c1e6d..33f54a779b 100644
@@ -24 +25 @@
-@@ -499,7 +499,7 @@ vhost_user_reconnect_init(void)
+@@ -501,7 +501,7 @@ vhost_user_reconnect_init(void)
@@ -28,2 +29,2 @@
-- VHOST_LOG_CONFIG(ERR, "%s: failed to initialize mutex", __func__);
-+ VHOST_LOG_CONFIG(ERR, "%s: failed to initialize mutex\n", __func__);
+- VHOST_LOG_CONFIG(ERR, "failed to initialize mutex");
++ VHOST_LOG_CONFIG(ERR, "failed to initialize mutex\n");
@@ -33 +34 @@
-@@ -507,9 +507,9 @@ vhost_user_reconnect_init(void)
+@@ -509,10 +509,10 @@ vhost_user_reconnect_init(void)
@@ -39,3 +40,5 @@
- if (pthread_mutex_destroy(&reconn_list.mutex))
-- VHOST_LOG_CONFIG(ERR, "%s: failed to destroy reconnect mutex", __func__);
-+ VHOST_LOG_CONFIG(ERR, "%s: failed to destroy reconnect mutex\n", __func__);
+ if (pthread_mutex_destroy(&reconn_list.mutex)) {
+ VHOST_LOG_CONFIG(ERR,
+- "failed to destroy reconnect mutex");
++ "failed to destroy reconnect mutex\n");
+ }
@@ -44,3 +47 @@
- return ret;
-@@ -1170,8 +1170,8 @@ rte_vhost_driver_start(const char *path)
- "vhost-events", NULL, fdset_event_dispatch,
+@@ -1147,7 +1147,7 @@ rte_vhost_driver_start(const char *path)
@@ -49,4 +50,4 @@
-- VHOST_LOG_CONFIG(ERR, "(%s) failed to create fdset handling thread", path);
--
-+ VHOST_LOG_CONFIG(ERR, "(%s) failed to create fdset handling thread\n",
-+ path);
+ VHOST_LOG_CONFIG(ERR,
+- "failed to create fdset handling thread");
++ "failed to create fdset handling thread\n");
+
@@ -55 +55,0 @@
- }
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'vhost: restore device information in log messages' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (13 preceding siblings ...)
2022-07-06 20:34 ` patch 'vhost: add some trailing newline in log messages' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'net/virtio-user: fix Rx interrupts with multi-queue' " luca.boccassi
` (14 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: David Marchand; +Cc: Chenbo Xia, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/c353b1de9ffb95000d021ab6b80e9584fa78012b
Thanks.
Luca Boccassi
---
From c353b1de9ffb95000d021ab6b80e9584fa78012b Mon Sep 17 00:00:00 2001
From: David Marchand <david.marchand@redhat.com>
Date: Fri, 1 Jul 2022 09:55:09 +0200
Subject: [PATCH] vhost: restore device information in log messages
[ upstream commit bb15129da98aa4cfa34a5a33a443436e5cdb18ea ]
device information in the log messages was dropped.
Fixes: 52ade97e3641 ("vhost: fix physical address mapping")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
---
lib/vhost/vhost_user.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/lib/vhost/vhost_user.c b/lib/vhost/vhost_user.c
index ff47247d2b..df780fd7d6 100644
--- a/lib/vhost/vhost_user.c
+++ b/lib/vhost/vhost_user.c
@@ -174,7 +174,8 @@ async_dma_map(struct virtio_net *dev, bool do_map)
return;
/* DMA mapping errors won't stop VHOST_USER_SET_MEM_TABLE. */
- VHOST_LOG_CONFIG(ERR, "DMA engine map failed\n");
+ VHOST_LOG_CONFIG(ERR, "(%s) DMA engine map failed\n",
+ dev->ifname);
}
}
@@ -190,7 +191,8 @@ async_dma_map(struct virtio_net *dev, bool do_map)
if (rte_errno == EINVAL)
return;
- VHOST_LOG_CONFIG(ERR, "DMA engine unmap failed\n");
+ VHOST_LOG_CONFIG(ERR, "(%s) DMA engine unmap failed\n",
+ dev->ifname);
}
}
}
@@ -990,7 +992,8 @@ add_one_guest_page(struct virtio_net *dev, uint64_t guest_phys_addr,
dev->max_guest_pages * sizeof(*page),
RTE_CACHE_LINE_SIZE);
if (dev->guest_pages == NULL) {
- VHOST_LOG_CONFIG(ERR, "cannot realloc guest_pages\n");
+ VHOST_LOG_CONFIG(ERR, "(%s) cannot realloc guest_pages\n",
+ dev->ifname);
rte_free(old_pages);
return -1;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.113017809 +0100
+++ 0016-vhost-restore-device-information-in-log-messages.patch 2022-07-06 21:07:53.547518784 +0100
@@ -1 +1 @@
-From bb15129da98aa4cfa34a5a33a443436e5cdb18ea Mon Sep 17 00:00:00 2001
+From c353b1de9ffb95000d021ab6b80e9584fa78012b Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit bb15129da98aa4cfa34a5a33a443436e5cdb18ea ]
+
@@ -9 +10,0 @@
-Cc: stable@dpdk.org
@@ -18 +19 @@
-index cc03f679a3..4b25512f91 100644
+index ff47247d2b..df780fd7d6 100644
@@ -21 +22 @@
-@@ -144,7 +144,8 @@ async_dma_map(struct virtio_net *dev, bool do_map)
+@@ -174,7 +174,8 @@ async_dma_map(struct virtio_net *dev, bool do_map)
@@ -31 +32 @@
-@@ -160,7 +161,8 @@ async_dma_map(struct virtio_net *dev, bool do_map)
+@@ -190,7 +191,8 @@ async_dma_map(struct virtio_net *dev, bool do_map)
@@ -41 +42 @@
-@@ -945,7 +947,8 @@ add_one_guest_page(struct virtio_net *dev, uint64_t guest_phys_addr,
+@@ -990,7 +992,8 @@ add_one_guest_page(struct virtio_net *dev, uint64_t guest_phys_addr,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/virtio-user: fix Rx interrupts with multi-queue' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (14 preceding siblings ...)
2022-07-06 20:34 ` patch 'vhost: restore device information " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'common/cnxk: fix GRE tunnel parsing' " luca.boccassi
` (13 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Yuan Wang; +Cc: David Marchand, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/36f4c8e67fd41186ea8c1b4567bc4bb684ae75ee
Thanks.
Luca Boccassi
---
From 36f4c8e67fd41186ea8c1b4567bc4bb684ae75ee Mon Sep 17 00:00:00 2001
From: Yuan Wang <yuanx.wang@intel.com>
Date: Mon, 4 Jul 2022 15:04:28 +0800
Subject: [PATCH] net/virtio-user: fix Rx interrupts with multi-queue
[ upstream commit 23ab0c59bcc8c91fe66762a10d64cd07e5acd69c ]
The callfds[] array stores eventfds sequentially for Rx and Tx vq.
Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")
Signed-off-by: Yuan Wang <yuanx.wang@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
---
drivers/net/virtio/virtio_user/virtio_user_dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/virtio/virtio_user/virtio_user_dev.c b/drivers/net/virtio/virtio_user/virtio_user_dev.c
index 35aa76b1ff..f9cada05e4 100644
--- a/drivers/net/virtio/virtio_user/virtio_user_dev.c
+++ b/drivers/net/virtio/virtio_user/virtio_user_dev.c
@@ -417,7 +417,7 @@ virtio_user_fill_intr_handle(struct virtio_user_dev *dev)
for (i = 0; i < dev->max_queue_pairs; ++i) {
if (rte_intr_efds_index_set(eth_dev->intr_handle, i,
- dev->callfds[i]))
+ dev->callfds[2 * i + VTNET_SQ_RQ_QUEUE_IDX]))
return -rte_errno;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.147174258 +0100
+++ 0017-net-virtio-user-fix-Rx-interrupts-with-multi-queue.patch 2022-07-06 21:07:53.547518784 +0100
@@ -1 +1 @@
-From 23ab0c59bcc8c91fe66762a10d64cd07e5acd69c Mon Sep 17 00:00:00 2001
+From 36f4c8e67fd41186ea8c1b4567bc4bb684ae75ee Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 23ab0c59bcc8c91fe66762a10d64cd07e5acd69c ]
+
@@ -9 +10,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'common/cnxk: fix GRE tunnel parsing' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (15 preceding siblings ...)
2022-07-06 20:34 ` patch 'net/virtio-user: fix Rx interrupts with multi-queue' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'net/iavf: fix VF reset' " luca.boccassi
` (12 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Satheesh Paul; +Cc: Kiran Kumar K, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/bbc9dcaefad10413759dd2c5e628651ba34a1b3a
Thanks.
Luca Boccassi
---
From bbc9dcaefad10413759dd2c5e628651ba34a1b3a Mon Sep 17 00:00:00 2001
From: Satheesh Paul <psatheesh@marvell.com>
Date: Thu, 23 Jun 2022 09:12:04 +0530
Subject: [PATCH] common/cnxk: fix GRE tunnel parsing
[ upstream commit 3b1a48f1ed8de5ec06e8741a68fa061e206a1427 ]
After parsing GRE tunnel, parse subsequent protocols
(for example, TCP or UDP) as tunneled versions.
Fixes: c34ea71b878 ("common/cnxk: add NPC parsing API")
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
---
drivers/common/cnxk/roc_npc_parse.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c
index 4f915f3692..9742ac90f7 100644
--- a/drivers/common/cnxk/roc_npc_parse.c
+++ b/drivers/common/cnxk/roc_npc_parse.c
@@ -535,11 +535,13 @@ npc_parse_ld(struct npc_parse_state *pst)
case ROC_NPC_ITEM_TYPE_GRE:
lt = NPC_LT_LD_GRE;
info.len = pst->pattern->size;
+ pst->tunnel = 1;
break;
case ROC_NPC_ITEM_TYPE_GRE_KEY:
lt = NPC_LT_LD_GRE;
info.len = pst->pattern->size;
info.hw_hdr_len = 4;
+ pst->tunnel = 1;
break;
case ROC_NPC_ITEM_TYPE_NVGRE:
lt = NPC_LT_LD_NVGRE;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.179501261 +0100
+++ 0018-common-cnxk-fix-GRE-tunnel-parsing.patch 2022-07-06 21:07:53.551518861 +0100
@@ -1 +1 @@
-From 3b1a48f1ed8de5ec06e8741a68fa061e206a1427 Mon Sep 17 00:00:00 2001
+From bbc9dcaefad10413759dd2c5e628651ba34a1b3a Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 3b1a48f1ed8de5ec06e8741a68fa061e206a1427 ]
+
@@ -10 +11,0 @@
-Cc: stable@dpdk.org
@@ -19 +20 @@
-index 0748646779..ff00c746d6 100644
+index 4f915f3692..9742ac90f7 100644
@@ -22 +23 @@
-@@ -699,11 +699,13 @@ npc_parse_ld(struct npc_parse_state *pst)
+@@ -535,11 +535,13 @@ npc_parse_ld(struct npc_parse_state *pst)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/iavf: fix VF reset' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (16 preceding siblings ...)
2022-07-06 20:34 ` patch 'common/cnxk: fix GRE tunnel parsing' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'net/igc: support multi-process' " luca.boccassi
` (11 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Yiding Zhou; +Cc: Qi Zhang, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/97e75c37b04de4cfb2fd7f73de1481ba7e062ae0
Thanks.
Luca Boccassi
---
From 97e75c37b04de4cfb2fd7f73de1481ba7e062ae0 Mon Sep 17 00:00:00 2001
From: Yiding Zhou <yidingx.zhou@intel.com>
Date: Mon, 27 Jun 2022 15:22:32 +0800
Subject: [PATCH] net/iavf: fix VF reset
[ upstream commit 196f35f81c962a1eae3f63bd621dfd9ebbf9a926 ]
When the VF is in closed state, the vf_reset flag can not be reverted
if the VF is reset asynchronously. This prevents all virtchnl commands
from executing, causing subsequent calls to iavf_dev_reset() to fail.
So the vf_reset flag needs to be reverted even when VF is in closed state.
Fixes: 676d986b4b86 ("net/iavf: fix crash after VF reset failure")
Signed-off-by: Yiding Zhou <yidingx.zhou@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/iavf/iavf_ethdev.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c
index c002d605b8..f835457e4f 100644
--- a/drivers/net/iavf/iavf_ethdev.c
+++ b/drivers/net/iavf/iavf_ethdev.c
@@ -2634,8 +2634,10 @@ iavf_dev_close(struct rte_eth_dev *dev)
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- if (adapter->closed)
- return 0;
+ if (adapter->closed) {
+ ret = 0;
+ goto out;
+ }
ret = iavf_dev_stop(dev);
adapter->closed = true;
@@ -2695,6 +2697,7 @@ iavf_dev_close(struct rte_eth_dev *dev)
* the bus master bit will not be disabled, and this call will have no
* effect.
*/
+out:
if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true))
vf->vf_reset = false;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.212053889 +0100
+++ 0019-net-iavf-fix-VF-reset.patch 2022-07-06 21:07:53.551518861 +0100
@@ -1 +1 @@
-From 196f35f81c962a1eae3f63bd621dfd9ebbf9a926 Mon Sep 17 00:00:00 2001
+From 97e75c37b04de4cfb2fd7f73de1481ba7e062ae0 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 196f35f81c962a1eae3f63bd621dfd9ebbf9a926 ]
+
@@ -13 +14,0 @@
-Cc: stable@dpdk.org
@@ -22 +23 @@
-index 7df0bf8118..506fcff6e3 100644
+index c002d605b8..f835457e4f 100644
@@ -25 +26 @@
-@@ -2702,8 +2702,10 @@ iavf_dev_close(struct rte_eth_dev *dev)
+@@ -2634,8 +2634,10 @@ iavf_dev_close(struct rte_eth_dev *dev)
@@ -38 +39 @@
-@@ -2763,6 +2765,7 @@ iavf_dev_close(struct rte_eth_dev *dev)
+@@ -2695,6 +2697,7 @@ iavf_dev_close(struct rte_eth_dev *dev)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/igc: support multi-process' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (17 preceding siblings ...)
2022-07-06 20:34 ` patch 'net/iavf: fix VF reset' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'service: fix lingering active status' " luca.boccassi
` (10 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Zhichao Zeng; +Cc: Qi Zhang, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/399cbc736cae28ec9707fc26d3f159791ad4d5dd
Thanks.
Luca Boccassi
---
From 399cbc736cae28ec9707fc26d3f159791ad4d5dd Mon Sep 17 00:00:00 2001
From: Zhichao Zeng <zhichaox.zeng@intel.com>
Date: Thu, 30 Jun 2022 19:03:30 +0800
Subject: [PATCH] net/igc: support multi-process
[ upstream commit e097bf80e418b03eea1b032a37b71097b4cf0a89 ]
The Rx function was not specified in the secondary process, causing the
secondary process to segfault in a multi-process environment.
This patch specify RX/TX functions in "dev_init" to support secondary
processes.
Fixes: 66fde1b943eb ("net/igc: add skeleton")
Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/igc/igc_ethdev.c | 9 ++++++++-
drivers/net/igc/igc_txrx.c | 8 ++++----
drivers/net/igc/igc_txrx.h | 6 ++++++
3 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c
index a1f1a9772b..8d8a0da424 100644
--- a/drivers/net/igc/igc_ethdev.c
+++ b/drivers/net/igc/igc_ethdev.c
@@ -1234,8 +1234,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev)
* has already done this work. Only check we don't need a different
* RX function.
*/
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ dev->rx_pkt_burst = igc_recv_pkts;
+ if (dev->data->scattered_rx)
+ dev->rx_pkt_burst = igc_recv_scattered_pkts;
+
+ dev->tx_pkt_burst = igc_xmit_pkts;
+ dev->tx_pkt_prepare = eth_igc_prep_pkts;
return 0;
+ }
rte_eth_copy_pci_info(dev, pci_dev);
dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c
index e48d5df11a..ffd219b0df 100644
--- a/drivers/net/igc/igc_txrx.c
+++ b/drivers/net/igc/igc_txrx.c
@@ -345,7 +345,7 @@ rx_desc_get_pkt_info(struct igc_rx_queue *rxq, struct rte_mbuf *rxm,
rxm->packet_type = rx_desc_pkt_info_to_pkt_type(pkt_info);
}
-static uint16_t
+uint16_t
igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
{
struct igc_rx_queue * const rxq = rx_queue;
@@ -488,7 +488,7 @@ igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
return nb_rx;
}
-static uint16_t
+uint16_t
igc_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
{
@@ -1397,7 +1397,7 @@ eth_igc_rx_queue_setup(struct rte_eth_dev *dev,
}
/* prepare packets for transmit */
-static uint16_t
+uint16_t
eth_igc_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
{
@@ -1604,7 +1604,7 @@ tx_desc_cksum_flags_to_olinfo(uint64_t ol_flags)
return tmp;
}
-static uint16_t
+uint16_t
igc_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
{
struct igc_tx_queue * const txq = tx_queue;
diff --git a/drivers/net/igc/igc_txrx.h b/drivers/net/igc/igc_txrx.h
index 535108a868..02a0a051bb 100644
--- a/drivers/net/igc/igc_txrx.h
+++ b/drivers/net/igc/igc_txrx.h
@@ -49,6 +49,12 @@ void eth_igc_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
void eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev,
uint16_t rx_queue_id, int on);
+uint16_t igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
+uint16_t igc_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts);
+uint16_t eth_igc_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts);
+uint16_t igc_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
+ uint16_t nb_pkts);
#ifdef __cplusplus
}
#endif
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.245875484 +0100
+++ 0020-net-igc-support-multi-process.patch 2022-07-06 21:07:53.555518938 +0100
@@ -1 +1 @@
-From e097bf80e418b03eea1b032a37b71097b4cf0a89 Mon Sep 17 00:00:00 2001
+From 399cbc736cae28ec9707fc26d3f159791ad4d5dd Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit e097bf80e418b03eea1b032a37b71097b4cf0a89 ]
+
@@ -13 +14,0 @@
-Cc: stable@dpdk.org
@@ -24 +25 @@
-index b9933b395d..7f221a5d34 100644
+index a1f1a9772b..8d8a0da424 100644
@@ -27 +28 @@
-@@ -1240,8 +1240,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev)
+@@ -1234,8 +1234,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'service: fix lingering active status' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (18 preceding siblings ...)
2022-07-06 20:34 ` patch 'net/igc: support multi-process' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'gro: fix identifying fragmented packets' " luca.boccassi
` (9 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Harry van Haaren; +Cc: Naga Harish K S V, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/e46eb5a8dcd55b0499638c51680b0f8b228d2b2f
Thanks.
Luca Boccassi
---
From e46eb5a8dcd55b0499638c51680b0f8b228d2b2f Mon Sep 17 00:00:00 2001
From: Harry van Haaren <harry.van.haaren@intel.com>
Date: Tue, 5 Jul 2022 13:32:07 +0000
Subject: [PATCH] service: fix lingering active status
[ upstream commit 6550113be62d1bd27b2f2dc07d7a888ad9499006 ]
This commit fixes an issue where calling rte_service_lcore_stop()
would result in a service's "active on lcore" status becoming stale.
The stale status would result in rte_service_may_be_active() always
returning "1", indicating that the service is not certainly stopped.
This is fixed by ensuring the "active on lcore" status of each service
is set to 0 when an lcore is stopped.
Fixes: e30dd31847d2 ("service: add mechanism for quiescing")
Fixes: 8929de043eb4 ("service: retrieve lcore active state")
Reported-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
---
lib/eal/common/rte_service.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
index bd8fb72e78..e76c2baffc 100644
--- a/lib/eal/common/rte_service.c
+++ b/lib/eal/common/rte_service.c
@@ -764,7 +764,9 @@ rte_service_lcore_stop(uint32_t lcore)
return -EALREADY;
uint32_t i;
- uint64_t service_mask = lcore_states[lcore].service_mask;
+ struct core_state *cs = &lcore_states[lcore];
+ uint64_t service_mask = cs->service_mask;
+
for (i = 0; i < RTE_SERVICE_NUM_MAX; i++) {
int32_t enabled = service_mask & (UINT64_C(1) << i);
int32_t service_running = rte_service_runstate_get(i);
@@ -772,6 +774,11 @@ rte_service_lcore_stop(uint32_t lcore)
__atomic_load_n(&rte_services[i].num_mapped_cores,
__ATOMIC_RELAXED));
+ /* Switch off this core for all services, to ensure that future
+ * calls to may_be_active() know this core is switched off.
+ */
+ cs->service_active_on_lcore[i] = 0;
+
/* if the core is mapped, and the service is running, and this
* is the only core that is mapped, the service would cease to
* run if this core stopped, so fail instead.
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.281402516 +0100
+++ 0021-service-fix-lingering-active-status.patch 2022-07-06 21:07:53.555518938 +0100
@@ -1 +1 @@
-From 6550113be62d1bd27b2f2dc07d7a888ad9499006 Mon Sep 17 00:00:00 2001
+From e46eb5a8dcd55b0499638c51680b0f8b228d2b2f Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 6550113be62d1bd27b2f2dc07d7a888ad9499006 ]
+
@@ -25 +27 @@
-index ef31b1f63c..d2b7275ac0 100644
+index bd8fb72e78..e76c2baffc 100644
@@ -28 +30 @@
-@@ -758,7 +758,9 @@ rte_service_lcore_stop(uint32_t lcore)
+@@ -764,7 +764,9 @@ rte_service_lcore_stop(uint32_t lcore)
@@ -39 +41 @@
-@@ -766,6 +768,11 @@ rte_service_lcore_stop(uint32_t lcore)
+@@ -772,6 +774,11 @@ rte_service_lcore_stop(uint32_t lcore)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'gro: fix identifying fragmented packets' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (19 preceding siblings ...)
2022-07-06 20:34 ` patch 'service: fix lingering active status' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'common/cnxk: allow changing PTP mode on CN10K' " luca.boccassi
` (8 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Kumara Parameshwaran; +Cc: Jiayu Hu, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/8fb51606a70960df7da40bc996b59871b7a8a040
Thanks.
Luca Boccassi
---
From 8fb51606a70960df7da40bc996b59871b7a8a040 Mon Sep 17 00:00:00 2001
From: Kumara Parameshwaran <kumaraparamesh92@gmail.com>
Date: Mon, 27 Jun 2022 16:01:14 +0530
Subject: [PATCH] gro: fix identifying fragmented packets
[ upstream commit bdf2f895a66044bc643e98a7262d70c245252927 ]
A packet with RTE_PTYPE_L4_FRAG(0x300) contains both RTE_PTYPE_L4_TCP
(0x100) & RTE_PTYPE_L4_UDP (0x200). A fragmented packet as defined in
rte_mbuf_ptype.h cannot be recognized as other L4 types and hence the
GRO layer should not use IS_IPV4_TCP_PKT or IS_IPV4_UDP_PKT for
RTE_PTYPE_L4_FRAG. Hence, if the packet type is RTE_PTYPE_L4_FRAG the
IP header should be parsed to recognize the appropriate IP type and
invoke the respective gro handler.
Fixes: 1ca5e6740852 ("gro: support UDP/IPv4")
Signed-off-by: Kumara Parameshwaran <kumaraparamesh92@gmail.com>
Reviewed-by: Jiayu Hu <jiayu.hu@intel.com>
---
lib/gro/rte_gro.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/gro/rte_gro.c b/lib/gro/rte_gro.c
index 8ca4da67e9..7a788523ad 100644
--- a/lib/gro/rte_gro.c
+++ b/lib/gro/rte_gro.c
@@ -33,6 +33,7 @@ static gro_tbl_pkt_count_fn tbl_pkt_count_fn[RTE_GRO_TYPE_MAX_NUM] = {
#define IS_IPV4_TCP_PKT(ptype) (RTE_ETH_IS_IPV4_HDR(ptype) && \
((ptype & RTE_PTYPE_L4_TCP) == RTE_PTYPE_L4_TCP) && \
+ ((ptype & RTE_PTYPE_L4_FRAG) != RTE_PTYPE_L4_FRAG) && \
(RTE_ETH_IS_TUNNEL_PKT(ptype) == 0))
#define IS_IPV4_UDP_PKT(ptype) (RTE_ETH_IS_IPV4_HDR(ptype) && \
@@ -41,6 +42,7 @@ static gro_tbl_pkt_count_fn tbl_pkt_count_fn[RTE_GRO_TYPE_MAX_NUM] = {
#define IS_IPV4_VXLAN_TCP4_PKT(ptype) (RTE_ETH_IS_IPV4_HDR(ptype) && \
((ptype & RTE_PTYPE_L4_UDP) == RTE_PTYPE_L4_UDP) && \
+ ((ptype & RTE_PTYPE_L4_FRAG) != RTE_PTYPE_L4_FRAG) && \
((ptype & RTE_PTYPE_TUNNEL_VXLAN) == \
RTE_PTYPE_TUNNEL_VXLAN) && \
((ptype & RTE_PTYPE_INNER_L4_TCP) == \
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.314534885 +0100
+++ 0022-gro-fix-identifying-fragmented-packets.patch 2022-07-06 21:07:53.555518938 +0100
@@ -1 +1 @@
-From bdf2f895a66044bc643e98a7262d70c245252927 Mon Sep 17 00:00:00 2001
+From 8fb51606a70960df7da40bc996b59871b7a8a040 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit bdf2f895a66044bc643e98a7262d70c245252927 ]
+
@@ -15 +16,0 @@
-Cc: stable@dpdk.org
@@ -24 +25 @@
-index 6f7dd4d709..e35399fd42 100644
+index 8ca4da67e9..7a788523ad 100644
@@ -27 +28 @@
-@@ -32,6 +32,7 @@ static gro_tbl_pkt_count_fn tbl_pkt_count_fn[RTE_GRO_TYPE_MAX_NUM] = {
+@@ -33,6 +33,7 @@ static gro_tbl_pkt_count_fn tbl_pkt_count_fn[RTE_GRO_TYPE_MAX_NUM] = {
@@ -35 +36 @@
-@@ -40,6 +41,7 @@ static gro_tbl_pkt_count_fn tbl_pkt_count_fn[RTE_GRO_TYPE_MAX_NUM] = {
+@@ -41,6 +42,7 @@ static gro_tbl_pkt_count_fn tbl_pkt_count_fn[RTE_GRO_TYPE_MAX_NUM] = {
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'common/cnxk: allow changing PTP mode on CN10K' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (20 preceding siblings ...)
2022-07-06 20:34 ` patch 'gro: fix identifying fragmented packets' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:34 ` patch 'common/mlx5: fix non-expandable global MR cache' " luca.boccassi
` (7 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Tomasz Duszynski; +Cc: Jerin Jacob, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/03a6a9f751fb3bc4e9df20415ac80ad5b383e884
Thanks.
Luca Boccassi
---
From 03a6a9f751fb3bc4e9df20415ac80ad5b383e884 Mon Sep 17 00:00:00 2001
From: Tomasz Duszynski <tduszynski@marvell.com>
Date: Fri, 1 Jul 2022 13:54:48 +0200
Subject: [PATCH] common/cnxk: allow changing PTP mode on CN10K
[ upstream commit 2ddf4b110cbcd7238f32780a7453aef2ecade83b ]
Since firmware has added support for toggling PTP mode on 10k platforms
userspace code should allow doing that as well.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/roc_bphy_cgx.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index c3be3c9041..0cd7dff655 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -268,9 +268,6 @@ roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
{
uint64_t scr1, scr0;
- if (roc_model_is_cn10k())
- return -ENOTSUP;
-
if (!roc_cgx)
return -EINVAL;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.346404241 +0100
+++ 0023-common-cnxk-allow-changing-PTP-mode-on-CN10K.patch 2022-07-06 21:07:53.559519014 +0100
@@ -1 +1 @@
-From 2ddf4b110cbcd7238f32780a7453aef2ecade83b Mon Sep 17 00:00:00 2001
+From 03a6a9f751fb3bc4e9df20415ac80ad5b383e884 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 2ddf4b110cbcd7238f32780a7453aef2ecade83b ]
+
@@ -9,2 +10,0 @@
-Cc: stable@dpdk.org
-
@@ -18 +18 @@
-index a5df104088..e966494e21 100644
+index c3be3c9041..0cd7dff655 100644
@@ -21 +21 @@
-@@ -285,9 +285,6 @@ roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+@@ -268,9 +268,6 @@ roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'common/mlx5: fix non-expandable global MR cache' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (21 preceding siblings ...)
2022-07-06 20:34 ` patch 'common/cnxk: allow changing PTP mode on CN10K' " luca.boccassi
@ 2022-07-06 20:34 ` luca.boccassi
2022-07-06 20:35 ` patch 'net/mlx5: reject negative integrity item configuration' " luca.boccassi
` (6 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:34 UTC (permalink / raw)
To: Dmitry Kozlyuk; +Cc: Matan Azrad, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/fa1d93b8c461f49d1e732b45fccb58ce20fc7f09
Thanks.
Luca Boccassi
---
From fa1d93b8c461f49d1e732b45fccb58ce20fc7f09 Mon Sep 17 00:00:00 2001
From: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Date: Thu, 30 Jun 2022 01:08:00 +0300
Subject: [PATCH] common/mlx5: fix non-expandable global MR cache
[ upstream commit e96d3d02d6e847307041a64aa336f86e1759b78f ]
The number of memory regions (MR) that MLX5 PMD can use
was limited by 512 per IB device, the size of the global MR cache
that was fixed at compile time.
The cache allows to search MR LKey by address efficiently,
therefore it is the last place searched on data path
(skipped is the global MR database which would be slow).
If the application logic caused the PMD to create more than 512 MRs,
which can be the case with external memory,
those MRs would never be found on data path
and later cause a HW failure.
The cache size was fixed because at the time of overflow
the EAL memory hotplug lock may be held,
prohibiting to allocate a larger cache
(it must reside in DPDK memory for multi-process support).
This patch adds logic to release the necessary locks,
extend the cache, and repeat the attempt to insert new entries.
`mlx5_mr_btree` structure had `overflow` field
that was set when a cache (not only the global one)
could not accept new entries.
However, it was only checked for the global cache,
because caches of upper layers were dynamically expandable.
With the global cache size limitation removed, this field is not needed.
Cache size was previously limited by 16-bit indices.
Use the space in the structure previously field by `overflow` field
to extend indices to 32 bits.
With this patch, it is the HW and RAM that limit the number of MRs.
Fixes: 974f1e7ef146 ("net/mlx5: add new memory region support")
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/common/mlx5/mlx5_common.c | 30 +++++
drivers/common/mlx5/mlx5_common_mr.c | 160 ++++++++++++++++++++-------
drivers/common/mlx5/mlx5_common_mr.h | 7 +-
3 files changed, 151 insertions(+), 46 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c
index 47a541f5ef..4faae6c86d 100644
--- a/drivers/common/mlx5/mlx5_common.c
+++ b/drivers/common/mlx5/mlx5_common.c
@@ -762,6 +762,7 @@ mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
uint64_t iova __rte_unused, size_t len)
{
struct mlx5_common_device *dev;
+ struct mlx5_mr_btree *bt;
struct mlx5_mr *mr;
dev = to_mlx5_device(rte_dev);
@@ -779,7 +780,36 @@ mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
rte_errno = EINVAL;
return -1;
}
+try_insert:
rte_rwlock_write_lock(&dev->mr_scache.rwlock);
+ bt = &dev->mr_scache.cache;
+ if (bt->len == bt->size) {
+ uint32_t size;
+ int ret;
+
+ size = bt->size + 1;
+ MLX5_ASSERT(size > bt->size);
+ /*
+ * Avoid deadlock (numbers show the sequence of events):
+ * mlx5_mr_create_primary():
+ * 1) take EAL memory lock
+ * 3) take MR lock
+ * this function:
+ * 2) take MR lock
+ * 4) take EAL memory lock while allocating the new cache
+ * Releasing the MR lock before step 4
+ * allows another thread to execute step 3.
+ */
+ rte_rwlock_write_unlock(&dev->mr_scache.rwlock);
+ ret = mlx5_mr_expand_cache(&dev->mr_scache, size,
+ rte_dev->numa_node);
+ if (ret < 0) {
+ mlx5_mr_free(mr, dev->mr_scache.dereg_mr_cb);
+ rte_errno = ret;
+ return -1;
+ }
+ goto try_insert;
+ }
LIST_INSERT_HEAD(&dev->mr_scache.mr_list, mr, mr);
/* Insert to the global cache table. */
mlx5_mr_insert_cache(&dev->mr_scache, mr);
diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c
index 4a5936bcdf..26fdf22386 100644
--- a/drivers/common/mlx5/mlx5_common_mr.c
+++ b/drivers/common/mlx5/mlx5_common_mr.c
@@ -78,7 +78,7 @@ mlx5_mprq_buf_free_cb(void *addr __rte_unused, void *opaque)
* 0 on success, -1 on failure.
*/
static int
-mr_btree_expand(struct mlx5_mr_btree *bt, int n)
+mr_btree_expand(struct mlx5_mr_btree *bt, uint32_t n)
{
void *mem;
int ret = 0;
@@ -123,11 +123,11 @@ mr_btree_expand(struct mlx5_mr_btree *bt, int n)
* Searched LKey on success, UINT32_MAX on no match.
*/
static uint32_t
-mr_btree_lookup(struct mlx5_mr_btree *bt, uint16_t *idx, uintptr_t addr)
+mr_btree_lookup(struct mlx5_mr_btree *bt, uint32_t *idx, uintptr_t addr)
{
struct mr_cache_entry *lkp_tbl;
- uint16_t n;
- uint16_t base = 0;
+ uint32_t n;
+ uint32_t base = 0;
MLX5_ASSERT(bt != NULL);
lkp_tbl = *bt->table;
@@ -137,7 +137,7 @@ mr_btree_lookup(struct mlx5_mr_btree *bt, uint16_t *idx, uintptr_t addr)
lkp_tbl[0].lkey == UINT32_MAX));
/* Binary search. */
do {
- register uint16_t delta = n >> 1;
+ register uint32_t delta = n >> 1;
if (addr < lkp_tbl[base + delta].start) {
n = delta;
@@ -169,7 +169,7 @@ static int
mr_btree_insert(struct mlx5_mr_btree *bt, struct mr_cache_entry *entry)
{
struct mr_cache_entry *lkp_tbl;
- uint16_t idx = 0;
+ uint32_t idx = 0;
size_t shift;
MLX5_ASSERT(bt != NULL);
@@ -185,11 +185,8 @@ mr_btree_insert(struct mlx5_mr_btree *bt, struct mr_cache_entry *entry)
/* Already exist, return. */
return 0;
}
- /* If table is full, return error. */
- if (unlikely(bt->len == bt->size)) {
- bt->overflow = 1;
- return -1;
- }
+ /* Caller must ensure that there is enough place for a new entry. */
+ MLX5_ASSERT(bt->len < bt->size);
/* Insert entry. */
++idx;
shift = (bt->len - idx) * sizeof(struct mr_cache_entry);
@@ -273,7 +270,7 @@ void
mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused)
{
#ifdef RTE_LIBRTE_MLX5_DEBUG
- int idx;
+ uint32_t idx;
struct mr_cache_entry *lkp_tbl;
if (bt == NULL)
@@ -409,13 +406,8 @@ mlx5_mr_insert_cache(struct mlx5_mr_share_cache *share_cache,
n = mr_find_next_chunk(mr, &entry, n);
if (!entry.end)
break;
- if (mr_btree_insert(&share_cache->cache, &entry) < 0) {
- /*
- * Overflowed, but the global table cannot be expanded
- * because of deadlock.
- */
+ if (mr_btree_insert(&share_cache->cache, &entry) < 0)
return -1;
- }
}
return 0;
}
@@ -477,26 +469,12 @@ static uint32_t
mlx5_mr_lookup_cache(struct mlx5_mr_share_cache *share_cache,
struct mr_cache_entry *entry, uintptr_t addr)
{
- uint16_t idx;
- uint32_t lkey = UINT32_MAX;
- struct mlx5_mr *mr;
+ uint32_t idx;
+ uint32_t lkey;
- /*
- * If the global cache has overflowed since it failed to expand the
- * B-tree table, it can't have all the existing MRs. Then, the address
- * has to be searched by traversing the original MR list instead, which
- * is very slow path. Otherwise, the global cache is all inclusive.
- */
- if (!unlikely(share_cache->cache.overflow)) {
- lkey = mr_btree_lookup(&share_cache->cache, &idx, addr);
- if (lkey != UINT32_MAX)
- *entry = (*share_cache->cache.table)[idx];
- } else {
- /* Falling back to the slowest path. */
- mr = mlx5_mr_lookup_list(share_cache, entry, addr);
- if (mr != NULL)
- lkey = entry->lkey;
- }
+ lkey = mr_btree_lookup(&share_cache->cache, &idx, addr);
+ if (lkey != UINT32_MAX)
+ *entry = (*share_cache->cache.table)[idx];
MLX5_ASSERT(lkey == UINT32_MAX || (addr >= entry->start &&
addr < entry->end));
return lkey;
@@ -529,7 +507,6 @@ mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache)
DRV_LOG(DEBUG, "Rebuild dev cache[] %p", (void *)share_cache);
/* Flush cache to rebuild. */
share_cache->cache.len = 1;
- share_cache->cache.overflow = 0;
/* Iterate all the existing MRs. */
LIST_FOREACH(mr, &share_cache->mr_list, mr)
if (mlx5_mr_insert_cache(share_cache, mr) < 0)
@@ -585,6 +562,74 @@ mr_find_contig_memsegs_cb(const struct rte_memseg_list *msl,
return 1;
}
+/**
+ * Get the number of virtually-contiguous chunks in the MR.
+ * HW MR does not need to be already created to use this function.
+ *
+ * @param mr
+ * Pointer to the MR.
+ *
+ * @return
+ * Number of chunks.
+ */
+static uint32_t
+mr_get_chunk_count(const struct mlx5_mr *mr)
+{
+ uint32_t i, count = 0;
+ bool was_in_chunk = false;
+ bool is_in_chunk;
+
+ /* There is only one chunk in case of external memory. */
+ if (mr->msl == NULL)
+ return 1;
+ for (i = 0; i < mr->ms_bmp_n; i++) {
+ is_in_chunk = rte_bitmap_get(mr->ms_bmp, i);
+ if (!was_in_chunk && is_in_chunk)
+ count++;
+ was_in_chunk = is_in_chunk;
+ }
+ return count;
+}
+
+/**
+ * Thread-safely expand the global MR cache to at least @p new_size slots.
+ *
+ * @param share_cache
+ * Shared MR cache for locking.
+ * @param new_size
+ * Desired cache size.
+ * @param socket
+ * NUMA node.
+ *
+ * @return
+ * 0 in success, negative on failure and rte_errno is set.
+ */
+int
+mlx5_mr_expand_cache(struct mlx5_mr_share_cache *share_cache,
+ uint32_t size, int socket)
+{
+ struct mlx5_mr_btree cache = {0};
+ struct mlx5_mr_btree *bt;
+ struct mr_cache_entry *lkp_tbl;
+ int ret;
+
+ size = rte_align32pow2(size);
+ ret = mlx5_mr_btree_init(&cache, size, socket);
+ if (ret < 0)
+ return ret;
+ rte_rwlock_write_lock(&share_cache->rwlock);
+ bt = &share_cache->cache;
+ lkp_tbl = *bt->table;
+ if (cache.size > bt->size) {
+ rte_memcpy(cache.table, lkp_tbl, bt->len * sizeof(lkp_tbl[0]));
+ RTE_SWAP(*bt, cache);
+ DRV_LOG(DEBUG, "Global MR cache expanded to %u slots", size);
+ }
+ rte_rwlock_write_unlock(&share_cache->rwlock);
+ mlx5_mr_btree_free(&cache);
+ return 0;
+}
+
/**
* Create a new global Memory Region (MR) for a missing virtual address.
* This API should be called on a secondary process, then a request is sent to
@@ -660,12 +705,14 @@ mlx5_mr_create_primary(void *pd,
struct mr_find_contig_memsegs_data data_re;
const struct rte_memseg_list *msl;
const struct rte_memseg *ms;
+ struct mlx5_mr_btree *bt;
struct mlx5_mr *mr = NULL;
int ms_idx_shift = -1;
uint32_t bmp_size;
void *bmp_mem;
uint32_t ms_n;
uint32_t n;
+ uint32_t chunks_n;
size_t len;
DRV_LOG(DEBUG, "Creating a MR using address (%p)", (void *)addr);
@@ -677,6 +724,7 @@ mlx5_mr_create_primary(void *pd,
* is quite opportunistic.
*/
mlx5_mr_garbage_collect(share_cache);
+find_range:
/*
* If enabled, find out a contiguous virtual address chunk in use, to
* which the given address belongs, in order to register maximum range.
@@ -828,6 +876,33 @@ alloc_resources:
len = data.end - data.start;
mr->ms_bmp_n = len / msl->page_sz;
MLX5_ASSERT(ms_idx_shift + mr->ms_bmp_n <= ms_n);
+ /*
+ * It is now known how many entries will be used in the global cache.
+ * If there is not enough, expand the cache.
+ * This cannot be done while holding the memory hotplug lock.
+ * While it is released, memory layout may change,
+ * so the process must be repeated from the beginning.
+ */
+ bt = &share_cache->cache;
+ chunks_n = mr_get_chunk_count(mr);
+ if (bt->len + chunks_n > bt->size) {
+ struct mlx5_common_device *cdev;
+ uint32_t size;
+
+ size = bt->size + chunks_n;
+ MLX5_ASSERT(size > bt->size);
+ cdev = container_of(share_cache, struct mlx5_common_device,
+ mr_scache);
+ rte_rwlock_write_unlock(&share_cache->rwlock);
+ rte_mcfg_mem_read_unlock();
+ if (mlx5_mr_expand_cache(share_cache, size,
+ cdev->dev->numa_node) < 0) {
+ DRV_LOG(ERR, "Failed to expand global MR cache to %u slots",
+ size);
+ goto err_nolock;
+ }
+ goto find_range;
+ }
/*
* Finally create an MR for the memory chunk. Verbs: ibv_reg_mr() can
* be called with holding the memory lock because it doesn't use
@@ -938,7 +1013,7 @@ mr_lookup_caches(struct mlx5_mr_ctrl *mr_ctrl,
container_of(share_cache, struct mlx5_common_device, mr_scache);
struct mlx5_mr_btree *bt = &mr_ctrl->cache_bh;
uint32_t lkey;
- uint16_t idx;
+ uint32_t idx;
/* If local cache table is full, try to double it. */
if (unlikely(bt->len == bt->size))
@@ -989,7 +1064,7 @@ static uint32_t
mlx5_mr_addr2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, uintptr_t addr)
{
uint32_t lkey;
- uint16_t bh_idx = 0;
+ uint32_t bh_idx = 0;
/* Victim in top-half cache to replace with new entry. */
struct mr_cache_entry *repl = &mr_ctrl->cache[mr_ctrl->head];
@@ -1086,7 +1161,6 @@ mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl)
memset(mr_ctrl->cache, 0, sizeof(mr_ctrl->cache));
/* Reset the B-tree table. */
mr_ctrl->cache_bh.len = 1;
- mr_ctrl->cache_bh.overflow = 0;
/* Update the generation number. */
mr_ctrl->cur_gen = *mr_ctrl->dev_gen_ptr;
DRV_LOG(DEBUG, "mr_ctrl(%p): flushed, cur_gen=%d",
@@ -1934,7 +2008,7 @@ mlx5_mr_mempool_populate_cache(struct mlx5_mr_ctrl *mr_ctrl,
struct mlx5_mempool_mr *mr = &mpr->mrs[i];
struct mr_cache_entry entry;
uint32_t lkey;
- uint16_t idx;
+ uint32_t idx;
lkey = mr_btree_lookup(bt, &idx, (uintptr_t)mr->pmd_mr.addr);
if (lkey != UINT32_MAX)
@@ -1972,7 +2046,7 @@ mlx5_mr_mempool2mr_bh(struct mlx5_mr_ctrl *mr_ctrl,
{
struct mr_cache_entry *repl = &mr_ctrl->cache[mr_ctrl->head];
uint32_t lkey;
- uint16_t bh_idx = 0;
+ uint32_t bh_idx = 0;
/* Binary-search MR translation table. */
lkey = mr_btree_lookup(&mr_ctrl->cache_bh, &bh_idx, addr);
diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h
index cf384b6748..213f5427cb 100644
--- a/drivers/common/mlx5/mlx5_common_mr.h
+++ b/drivers/common/mlx5/mlx5_common_mr.h
@@ -56,9 +56,8 @@ struct mr_cache_entry {
/* MR Cache table for Binary search. */
struct mlx5_mr_btree {
- uint16_t len; /* Number of entries. */
- uint16_t size; /* Total number of entries. */
- int overflow; /* Mark failure of table expansion. */
+ uint32_t len; /* Number of entries. */
+ uint32_t size; /* Total number of entries. */
struct mr_cache_entry (*table)[];
} __rte_packed;
@@ -218,6 +217,8 @@ void mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused);
__rte_internal
uint32_t mlx5_mr_mempool2mr_bh(struct mlx5_mr_ctrl *mr_ctrl,
struct rte_mempool *mp, uintptr_t addr);
+int mlx5_mr_expand_cache(struct mlx5_mr_share_cache *share_cache,
+ uint32_t new_size, int socket);
void mlx5_mr_release_cache(struct mlx5_mr_share_cache *mr_cache);
int mlx5_mr_create_cache(struct mlx5_mr_share_cache *share_cache, int socket);
void mlx5_mr_dump_cache(struct mlx5_mr_share_cache *share_cache __rte_unused);
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.378097682 +0100
+++ 0024-common-mlx5-fix-non-expandable-global-MR-cache.patch 2022-07-06 21:07:53.559519014 +0100
@@ -1 +1 @@
-From e96d3d02d6e847307041a64aa336f86e1759b78f Mon Sep 17 00:00:00 2001
+From fa1d93b8c461f49d1e732b45fccb58ce20fc7f09 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit e96d3d02d6e847307041a64aa336f86e1759b78f ]
+
@@ -36 +37,0 @@
-Cc: stable@dpdk.org
@@ -47 +48 @@
-index ef1604d223..89fef2b535 100644
+index 47a541f5ef..4faae6c86d 100644
@@ -50 +51 @@
-@@ -1082,6 +1082,7 @@ mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
+@@ -762,6 +762,7 @@ mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
@@ -58 +59 @@
-@@ -1099,7 +1100,36 @@ mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
+@@ -779,7 +780,36 @@ mlx5_common_dev_dma_map(struct rte_device *rte_dev, void *addr,
@@ -96 +97 @@
-index 06e4c8f187..8d8bec99a9 100644
+index 4a5936bcdf..26fdf22386 100644
@@ -211 +212 @@
-@@ -528,7 +506,6 @@ mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache)
+@@ -529,7 +507,6 @@ mlx5_mr_rebuild_cache(struct mlx5_mr_share_cache *share_cache)
@@ -219 +220 @@
-@@ -584,6 +561,74 @@ mr_find_contig_memsegs_cb(const struct rte_memseg_list *msl,
+@@ -585,6 +562,74 @@ mr_find_contig_memsegs_cb(const struct rte_memseg_list *msl,
@@ -294 +295 @@
-@@ -659,12 +704,14 @@ mlx5_mr_create_primary(void *pd,
+@@ -660,12 +705,14 @@ mlx5_mr_create_primary(void *pd,
@@ -309 +310 @@
-@@ -676,6 +723,7 @@ mlx5_mr_create_primary(void *pd,
+@@ -677,6 +724,7 @@ mlx5_mr_create_primary(void *pd,
@@ -317 +318 @@
-@@ -827,6 +875,33 @@ alloc_resources:
+@@ -828,6 +876,33 @@ alloc_resources:
@@ -351 +352 @@
-@@ -937,7 +1012,7 @@ mr_lookup_caches(struct mlx5_mr_ctrl *mr_ctrl,
+@@ -938,7 +1013,7 @@ mr_lookup_caches(struct mlx5_mr_ctrl *mr_ctrl,
@@ -360 +361 @@
-@@ -988,7 +1063,7 @@ static uint32_t
+@@ -989,7 +1064,7 @@ static uint32_t
@@ -369 +370 @@
-@@ -1085,7 +1160,6 @@ mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl)
+@@ -1086,7 +1161,6 @@ mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl)
@@ -377 +378 @@
-@@ -1933,7 +2007,7 @@ mlx5_mr_mempool_populate_cache(struct mlx5_mr_ctrl *mr_ctrl,
+@@ -1934,7 +2008,7 @@ mlx5_mr_mempool_populate_cache(struct mlx5_mr_ctrl *mr_ctrl,
@@ -386 +387 @@
-@@ -1971,7 +2045,7 @@ mlx5_mr_mempool2mr_bh(struct mlx5_mr_ctrl *mr_ctrl,
+@@ -1972,7 +2046,7 @@ mlx5_mr_mempool2mr_bh(struct mlx5_mr_ctrl *mr_ctrl,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/mlx5: reject negative integrity item configuration' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (22 preceding siblings ...)
2022-07-06 20:34 ` patch 'common/mlx5: fix non-expandable global MR cache' " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-06 20:35 ` patch 'dma/idxd: fix memory leak in PCI close' " luca.boccassi
` (5 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Raja Zidane
Cc: Gregory Etelson, Matan Azrad, Viacheslav Ovsiienko, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/008e1abc82b60306cb1d297150e8da423d67b857
Thanks.
Luca Boccassi
---
From 008e1abc82b60306cb1d297150e8da423d67b857 Mon Sep 17 00:00:00 2001
From: Raja Zidane <rzidane@nvidia.com>
Date: Mon, 4 Jul 2022 13:11:39 +0300
Subject: [PATCH] net/mlx5: reject negative integrity item configuration
[ upstream commit 5ddb9038245ef74ea91e921012acb647dc8b374d ]
Negative integrity item refers to condition when the item value mask
is set, but value spec is cleared:
... integrity value mask l4_ok value spec 0 ...
ethdev library defines integrity bits `l3_ok` and `l4_ok` as accumulators
for all hardware L3 and L4 integrity verifications respectfully.
Hardware `l3_ok` and `l4_ok` integrity bits refer to L3 and L4
network headers only.
Integrity bits `l3_ok` and `l4_ok` are not compatible between
ethdev library and hardware.
PMD translations for ethdev `l3_ok` are:
IPv4: `l3_ok` and `l3_csum_ok`
IPv6: `l3_ok`
ethdev `l4_ok` is translated into PMD `l4_ok` and `l4_csum_ok` bits.
Positive IPv4 `l3_ok` flow item configuration is translated into
a single matcher that AND corresponding hardware bits.
Negative IPv4 `l3_ok` is translated into 2 hardware conditions where
each condition probes a single integrity bit:
ethdev::l3_ok is 0 => MLX5::l3_ok is 0 OR MLX5:l3_csum_ok is 0
MLX5 hardware does not do OR condition in flow rule item.
Negative IPv4 `l3_ok` must be translated into 2 flow rules.
Similarly negative ethdev `l4_ok` condition is also translated into 2
hardware rules.
Current PMD roadmap does not allow implicit flow rule split.
Bugzilla ID: 948
Suggested-by: Raja Zidane <rzidane@nvidia.com>
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
doc/guides/nics/mlx5.rst | 5 +++--
drivers/net/mlx5/mlx5_flow_dv.c | 6 ++++++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index bcbaa97dae..ce40d1cdac 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -479,14 +479,15 @@ Limitations
- Integrity offload is enabled starting from **ConnectX-6 Dx**.
- Verification bits provided by the hardware are ``l3_ok``, ``ipv4_csum_ok``, ``l4_ok``, ``l4_csum_ok``.
- ``level`` value 0 references outer headers.
+ - Negative integrity item verification is not supported.
- Multiple integrity items not supported in a single flow rule.
- Flow rule items supplied by application must explicitly specify network headers referred by integrity item.
For example, if integrity item mask sets ``l4_ok`` or ``l4_csum_ok`` bits, reference to L4 network header,
TCP or UDP, must be in the rule pattern as well::
flow create 0 ingress pattern integrity level is 0 value mask l3_ok value spec l3_ok / eth / ipv6 / end …
- or
- flow create 0 ingress pattern integrity level is 0 value mask l4_ok value spec 0 / eth / ipv4 proto is udp / end …
+
+ flow create 0 ingress pattern integrity level is 0 value mask l4_ok value spec l4_ok / eth / ipv4 proto is udp / end …
- Connection tracking:
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index dfa0dc0aad..70031d3dc9 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -6693,6 +6693,12 @@ flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
RTE_FLOW_ERROR_TYPE_ITEM,
integrity_item,
"unsupported integrity filter");
+ if ((mask->l3_ok & !spec->l3_ok) || (mask->l4_ok & !spec->l4_ok) ||
+ (mask->ipv4_csum_ok & !spec->ipv4_csum_ok) ||
+ (mask->l4_csum_ok & !spec->l4_csum_ok))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ NULL, "negative integrity flow is not supported");
if (spec->level > 1) {
if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
return rte_flow_error_set
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.412699731 +0100
+++ 0025-net-mlx5-reject-negative-integrity-item-configuratio.patch 2022-07-06 21:07:53.579519398 +0100
@@ -1 +1 @@
-From 5ddb9038245ef74ea91e921012acb647dc8b374d Mon Sep 17 00:00:00 2001
+From 008e1abc82b60306cb1d297150e8da423d67b857 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 5ddb9038245ef74ea91e921012acb647dc8b374d ]
+
@@ -35 +36,0 @@
-Cc: stable@dpdk.org
@@ -47 +48 @@
-index 9f2832e284..a7f9851d16 100644
+index bcbaa97dae..ce40d1cdac 100644
@@ -69 +70 @@
-index 09349a021b..bee9363515 100644
+index dfa0dc0aad..70031d3dc9 100644
@@ -72 +73 @@
-@@ -6779,6 +6779,12 @@ flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
+@@ -6693,6 +6693,12 @@ flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'dma/idxd: fix memory leak in PCI close' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (23 preceding siblings ...)
2022-07-06 20:35 ` patch 'net/mlx5: reject negative integrity item configuration' " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-06 20:35 ` patch 'dma/idxd: fix partial freeing " luca.boccassi
` (4 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Kevin Laatz; +Cc: Xingguang He, Bruce Richardson, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/1fd4a985e4f5869fa5c04f06d6b22c7d33f046a4
Thanks.
Luca Boccassi
---
From 1fd4a985e4f5869fa5c04f06d6b22c7d33f046a4 Mon Sep 17 00:00:00 2001
From: Kevin Laatz <kevin.laatz@intel.com>
Date: Mon, 4 Jul 2022 16:27:49 +0100
Subject: [PATCH] dma/idxd: fix memory leak in PCI close
[ upstream commit 8a6eb404c4a1e312a13d3a374b0cf3dcdc429ba7 ]
ASAN reports a memory leak for the 'pci' pointer in the 'idxd_dmadev'
struct.
This is fixed by free'ing the struct when the last queue on the PCI
device is being closed.
Fixes: 9449330a8458 ("dma/idxd: create dmadev instances on PCI probe")
Reported-by: Xingguang He <xingguang.he@intel.com>
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/dma/idxd/idxd_internal.h | 2 ++
drivers/dma/idxd/idxd_pci.c | 35 +++++++++++++++++++++++++-------
2 files changed, 30 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/idxd/idxd_internal.h b/drivers/dma/idxd/idxd_internal.h
index 3375600217..180a8587c6 100644
--- a/drivers/dma/idxd/idxd_internal.h
+++ b/drivers/dma/idxd/idxd_internal.h
@@ -7,6 +7,7 @@
#include <rte_dmadev_pmd.h>
#include <rte_spinlock.h>
+#include <rte_atomic.h>
#include "idxd_hw_defs.h"
@@ -33,6 +34,7 @@ struct idxd_pci_common {
rte_spinlock_t lk;
uint8_t wq_cfg_sz;
+ rte_atomic16_t ref_count;
volatile struct rte_idxd_bar0 *regs;
volatile uint32_t *wq_regs_base;
volatile struct rte_idxd_grpcfg *grp_regs;
diff --git a/drivers/dma/idxd/idxd_pci.c b/drivers/dma/idxd/idxd_pci.c
index 65c6bbf4c1..fb618d34b6 100644
--- a/drivers/dma/idxd/idxd_pci.c
+++ b/drivers/dma/idxd/idxd_pci.c
@@ -6,6 +6,7 @@
#include <rte_devargs.h>
#include <rte_dmadev_pmd.h>
#include <rte_malloc.h>
+#include <rte_atomic.h>
#include "idxd_internal.h"
@@ -115,20 +116,38 @@ idxd_pci_dev_close(struct rte_dma_dev *dev)
{
struct idxd_dmadev *idxd = dev->fp_obj->dev_private;
uint8_t err_code;
+ int is_last_wq;
- /* disable the device */
- err_code = idxd_pci_dev_command(idxd, idxd_disable_dev);
- if (err_code) {
- IDXD_PMD_ERR("Error disabling device: code %#x", err_code);
- return err_code;
+ if (idxd_is_wq_enabled(idxd)) {
+ /* disable the wq */
+ err_code = idxd_pci_dev_command(idxd, idxd_disable_wq);
+ if (err_code) {
+ IDXD_PMD_ERR("Error disabling wq: code %#x", err_code);
+ return err_code;
+ }
+ IDXD_PMD_DEBUG("IDXD WQ disabled OK");
}
- IDXD_PMD_DEBUG("IDXD Device disabled OK");
/* free device memory */
IDXD_PMD_DEBUG("Freeing device driver memory");
rte_free(idxd->batch_idx_ring);
rte_free(idxd->desc_ring);
+ /* if this is the last WQ on the device, disable the device and free
+ * the PCI struct
+ */
+ is_last_wq = rte_atomic16_dec_and_test(&idxd->u.pci->ref_count);
+ if (is_last_wq) {
+ /* disable the device */
+ err_code = idxd_pci_dev_command(idxd, idxd_disable_dev);
+ if (err_code) {
+ IDXD_PMD_ERR("Error disabling device: code %#x", err_code);
+ return err_code;
+ }
+ IDXD_PMD_DEBUG("IDXD device disabled OK");
+ rte_free(idxd->u.pci);
+ }
+
return 0;
}
@@ -159,12 +178,13 @@ init_pci_device(struct rte_pci_device *dev, struct idxd_dmadev *idxd,
uint8_t lg2_max_batch, lg2_max_copy_size;
unsigned int i, err_code;
- pci = malloc(sizeof(*pci));
+ pci = rte_malloc(NULL, sizeof(*pci), 0);
if (pci == NULL) {
IDXD_PMD_ERR("%s: Can't allocate memory", __func__);
err_code = -1;
goto err;
}
+ memset(pci, 0, sizeof(*pci));
rte_spinlock_init(&pci->lk);
/* assign the bar registers, and then configure device */
@@ -330,6 +350,7 @@ idxd_dmadev_probe_pci(struct rte_pci_driver *drv, struct rte_pci_device *dev)
free(idxd.u.pci);
return ret;
}
+ rte_atomic16_inc(&idxd.u.pci->ref_count);
}
return 0;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.462911627 +0100
+++ 0026-dma-idxd-fix-memory-leak-in-PCI-close.patch 2022-07-06 21:07:53.579519398 +0100
@@ -1 +1 @@
-From 8a6eb404c4a1e312a13d3a374b0cf3dcdc429ba7 Mon Sep 17 00:00:00 2001
+From 1fd4a985e4f5869fa5c04f06d6b22c7d33f046a4 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 8a6eb404c4a1e312a13d3a374b0cf3dcdc429ba7 ]
+
@@ -13 +14,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'dma/idxd: fix partial freeing in PCI close' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (24 preceding siblings ...)
2022-07-06 20:35 ` patch 'dma/idxd: fix memory leak in PCI close' " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-06 20:35 ` patch 'dma/idxd: fix null dereference in PCI remove' " luca.boccassi
` (3 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Kevin Laatz; +Cc: Bruce Richardson, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/5b7a2b5672104ae8d70e4dd403c48bfbba8dd703
Thanks.
Luca Boccassi
---
From 5b7a2b5672104ae8d70e4dd403c48bfbba8dd703 Mon Sep 17 00:00:00 2001
From: Kevin Laatz <kevin.laatz@intel.com>
Date: Mon, 4 Jul 2022 16:27:50 +0100
Subject: [PATCH] dma/idxd: fix partial freeing in PCI close
[ upstream commit 1a57c8d553a022a282cc466712bf7f4ce6de20a4 ]
During PCI device close, any allocated memory needs to be free'd.
Currently, one of the free's is being called on an incorrect idxd_dmadev
struct member, namely 'batch_idx_ring'.
At device creation, memory is allocated for both 'batch_comp_ring' and
'batch_idx_ring' simultaneously. Calling free only on 'batch_idx_ring'
meant the first half of this memory was not being free'd, leading to the
memleak.
This patch fixes this memleak by calling free on 'batch_comp_ring' which
will free the memory for both rings.
Fixes: 9449330a8458 ("dma/idxd: create dmadev instances on PCI probe")
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/dma/idxd/idxd_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/idxd/idxd_pci.c b/drivers/dma/idxd/idxd_pci.c
index fb618d34b6..2c3b01cd2b 100644
--- a/drivers/dma/idxd/idxd_pci.c
+++ b/drivers/dma/idxd/idxd_pci.c
@@ -130,7 +130,7 @@ idxd_pci_dev_close(struct rte_dma_dev *dev)
/* free device memory */
IDXD_PMD_DEBUG("Freeing device driver memory");
- rte_free(idxd->batch_idx_ring);
+ rte_free(idxd->batch_comp_ring);
rte_free(idxd->desc_ring);
/* if this is the last WQ on the device, disable the device and free
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.494889492 +0100
+++ 0027-dma-idxd-fix-partial-freeing-in-PCI-close.patch 2022-07-06 21:07:53.579519398 +0100
@@ -1 +1 @@
-From 1a57c8d553a022a282cc466712bf7f4ce6de20a4 Mon Sep 17 00:00:00 2001
+From 5b7a2b5672104ae8d70e4dd403c48bfbba8dd703 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 1a57c8d553a022a282cc466712bf7f4ce6de20a4 ]
+
@@ -19 +20,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'dma/idxd: fix null dereference in PCI remove' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (25 preceding siblings ...)
2022-07-06 20:35 ` patch 'dma/idxd: fix partial freeing " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-06 20:35 ` patch 'app/regex: avoid division by zero' " luca.boccassi
` (2 subsequent siblings)
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Kevin Laatz; +Cc: Bruce Richardson, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/e1c3685b21e1d764026c305cb5db605b3cf9707c
Thanks.
Luca Boccassi
---
From e1c3685b21e1d764026c305cb5db605b3cf9707c Mon Sep 17 00:00:00 2001
From: Kevin Laatz <kevin.laatz@intel.com>
Date: Mon, 4 Jul 2022 16:27:51 +0100
Subject: [PATCH] dma/idxd: fix null dereference in PCI remove
[ upstream commit b29427649b6d51b3b49187cbaeaa6587ce80ce72 ]
The 'info' struct was being declared as a NULL pointer. If a NULL
pointer is passed to 'rte_dma_info_get', EINVAL is returned and the
struct is not populated. This subsequently causes a segfault when
dereferencing 'info'.
This patch fixes the issue by simply declaring 'info' on the stack and
passing its address to 'rte_dma_info_get'.
Fixes: 9449330a8458 ("dma/idxd: create dmadev instances on PCI probe")
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/dma/idxd/idxd_pci.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/idxd/idxd_pci.c b/drivers/dma/idxd/idxd_pci.c
index 2c3b01cd2b..2f8ec06d9e 100644
--- a/drivers/dma/idxd/idxd_pci.c
+++ b/drivers/dma/idxd/idxd_pci.c
@@ -380,10 +380,10 @@ idxd_dmadev_remove_pci(struct rte_pci_device *dev)
IDXD_PMD_INFO("Closing %s on NUMA node %d", name, dev->device.numa_node);
RTE_DMA_FOREACH_DEV(i) {
- struct rte_dma_info *info = {0};
- rte_dma_info_get(i, info);
- if (strncmp(name, info->dev_name, strlen(name)) == 0)
- idxd_dmadev_destroy(info->dev_name);
+ struct rte_dma_info info;
+ rte_dma_info_get(i, &info);
+ if (strncmp(name, info.dev_name, strlen(name)) == 0)
+ idxd_dmadev_destroy(info.dev_name);
}
return 0;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.526572965 +0100
+++ 0028-dma-idxd-fix-null-dereference-in-PCI-remove.patch 2022-07-06 21:07:53.579519398 +0100
@@ -1 +1 @@
-From b29427649b6d51b3b49187cbaeaa6587ce80ce72 Mon Sep 17 00:00:00 2001
+From e1c3685b21e1d764026c305cb5db605b3cf9707c Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit b29427649b6d51b3b49187cbaeaa6587ce80ce72 ]
+
@@ -15 +16,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'app/regex: avoid division by zero' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (26 preceding siblings ...)
2022-07-06 20:35 ` patch 'dma/idxd: fix null dereference in PCI remove' " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-06 20:35 ` patch 'app/regex: fix mbuf size for multi-segment buffer' " luca.boccassi
2022-07-06 20:35 ` patch 'avoid AltiVec keyword vector' " luca.boccassi
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Thierry Herbelot; +Cc: dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/81a0919f6a161209071407bc1e8b774308094ab5
Thanks.
Luca Boccassi
---
From 81a0919f6a161209071407bc1e8b774308094ab5 Mon Sep 17 00:00:00 2001
From: Thierry Herbelot <thierry.herbelot@6wind.com>
Date: Mon, 24 May 2021 10:57:00 +0200
Subject: [PATCH] app/regex: avoid division by zero
[ upstream commit 1afdf9edc8f7122cdaf8dae78e29fe8642c21484 ]
Check that nb_jobs is not zero before using it for a division.
Fixes: f5cffb7eb7fb6 ("app/regex: read data file once at startup")
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
---
app/test-regex/main.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/app/test-regex/main.c b/app/test-regex/main.c
index 756726f8db..564025bceb 100644
--- a/app/test-regex/main.c
+++ b/app/test-regex/main.c
@@ -732,6 +732,8 @@ main(int argc, char **argv)
rte_exit(EXIT_FAILURE, "Number of QPs must be greater than 0\n");
if (nb_lcores == 0)
rte_exit(EXIT_FAILURE, "Number of lcores must be greater than 0\n");
+ if (nb_jobs == 0)
+ rte_exit(EXIT_FAILURE, "Number of jobs must be greater than 0\n");
if (distribute_qps_to_lcores(nb_lcores, nb_qps, &qps_per_lcore) < 0)
rte_exit(EXIT_FAILURE, "Failed to distribute queues to lcores!\n");
ret = init_port(&nb_max_payload, rules_file,
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.557995572 +0100
+++ 0029-app-regex-avoid-division-by-zero.patch 2022-07-06 21:07:53.579519398 +0100
@@ -1 +1 @@
-From 1afdf9edc8f7122cdaf8dae78e29fe8642c21484 Mon Sep 17 00:00:00 2001
+From 81a0919f6a161209071407bc1e8b774308094ab5 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 1afdf9edc8f7122cdaf8dae78e29fe8642c21484 ]
+
@@ -9 +10,0 @@
-Cc: stable@dpdk.org
@@ -17 +18 @@
-index 7c014b2210..fe90e11313 100644
+index 756726f8db..564025bceb 100644
@@ -20 +21 @@
-@@ -728,6 +728,8 @@ main(int argc, char **argv)
+@@ -732,6 +732,8 @@ main(int argc, char **argv)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'app/regex: fix mbuf size for multi-segment buffer' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (27 preceding siblings ...)
2022-07-06 20:35 ` patch 'app/regex: avoid division by zero' " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-06 20:35 ` patch 'avoid AltiVec keyword vector' " luca.boccassi
29 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Raslan Darawsheh; +Cc: Ori Kam, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/20ee5fbe91aa81bbd72fbb6014cd5d1bcfbf5941
Thanks.
Luca Boccassi
---
From 20ee5fbe91aa81bbd72fbb6014cd5d1bcfbf5941 Mon Sep 17 00:00:00 2001
From: Raslan Darawsheh <rasland@nvidia.com>
Date: Tue, 5 Jul 2022 11:09:16 +0300
Subject: [PATCH] app/regex: fix mbuf size for multi-segment buffer
[ upstream commit a442ca2d230209e1bbc9262abc7c871ff33ef627 ]
When allocating multi segmented buffers, and in case there is
a remainder in total buf len, the actual job len might be more
than expected job_len.
This adds additional space in the mbuf in the multi seg case,
to allow the remaining memory to be stored in one segment.
Fixes: c1d1b94eec58 ("app/regex: fix number of matches")
Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
app/test-regex/main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/app/test-regex/main.c b/app/test-regex/main.c
index 564025bceb..ca0b0a5d6a 100644
--- a/app/test-regex/main.c
+++ b/app/test-regex/main.c
@@ -415,8 +415,8 @@ run_regex(void *args)
mbuf_mp = rte_pktmbuf_pool_create(mbuf_pool,
rte_align32pow2(nb_jobs * nb_qps * nb_segs),
0, 0, (nb_segs == 1) ? MBUF_SIZE :
- (rte_align32pow2(job_len) / nb_segs +
- RTE_PKTMBUF_HEADROOM),
+ (rte_align32pow2(job_len + (data_len % nb_jobs)) /
+ nb_segs + RTE_PKTMBUF_HEADROOM),
rte_socket_id());
if (mbuf_mp == NULL) {
printf("Error, can't create memory pool\n");
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-06 21:07:54.589976634 +0100
+++ 0030-app-regex-fix-mbuf-size-for-multi-segment-buffer.patch 2022-07-06 21:07:53.583519475 +0100
@@ -1 +1 @@
-From a442ca2d230209e1bbc9262abc7c871ff33ef627 Mon Sep 17 00:00:00 2001
+From 20ee5fbe91aa81bbd72fbb6014cd5d1bcfbf5941 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit a442ca2d230209e1bbc9262abc7c871ff33ef627 ]
+
@@ -14 +15,0 @@
-Cc: stable@dpdk.org
@@ -23 +24 @@
-index fe90e11313..351c36a879 100644
+index 564025bceb..ca0b0a5d6a 100644
@@ -26 +27 @@
-@@ -412,8 +412,8 @@ run_regex(void *args)
+@@ -415,8 +415,8 @@ run_regex(void *args)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'avoid AltiVec keyword vector' has been queued to stable release 21.11.2
2022-07-06 20:34 ` patch 'test/crypto: fix authentication IV for ZUC SGL' " luca.boccassi
` (28 preceding siblings ...)
2022-07-06 20:35 ` patch 'app/regex: fix mbuf size for multi-segment buffer' " luca.boccassi
@ 2022-07-06 20:35 ` luca.boccassi
2022-07-12 19:23 ` patch 'examples/link_status_interrupt: fix stats refresh rate' " luca.boccassi
29 siblings, 1 reply; 67+ messages in thread
From: luca.boccassi @ 2022-07-06 20:35 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: David Christensen, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/08/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/f169902058297cf770ab28be4c92e9ea5f385178
Thanks.
Luca Boccassi
---
From f169902058297cf770ab28be4c92e9ea5f385178 Mon Sep 17 00:00:00 2001
From: Thomas Monjalon <thomas@monjalon.net>
Date: Tue, 3 May 2022 14:03:21 +0200
Subject: [PATCH] avoid AltiVec keyword vector
[ backported from upstream commit 64fcadeac0f70c8c9c215196a3d580b4ad37dcdc ]
The AltiVec header file is defining "vector", except in C++ build.
The keyword "vector" may conflict easily.
As a rule, it is better to use the alternative keyword "__vector",
so we will be able to #undef vector after including AltiVec header.
Later it may become possible to #undef vector in rte_altivec.h
with a compatibility breakage.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
---
drivers/net/i40e/i40e_rxtx_vec_altivec.c | 214 ++--
drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 1078 ++++++++---------
.../net/virtio/virtio_rxtx_simple_altivec.c | 70 +-
examples/l3fwd/l3fwd_altivec.h | 87 +-
examples/l3fwd/l3fwd_lpm_altivec.h | 14 +-
lib/acl/acl_run_altivec.h | 36 +-
lib/eal/ppc/include/rte_vect.h | 2 +-
lib/lpm/rte_lpm_altivec.h | 6 +-
8 files changed, 754 insertions(+), 753 deletions(-)
diff --git a/drivers/net/i40e/i40e_rxtx_vec_altivec.c b/drivers/net/i40e/i40e_rxtx_vec_altivec.c
index f78ba994f7..00a015013e 100644
--- a/drivers/net/i40e/i40e_rxtx_vec_altivec.c
+++ b/drivers/net/i40e/i40e_rxtx_vec_altivec.c
@@ -27,10 +27,10 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
struct i40e_rx_entry *rxep = &rxq->sw_ring[rxq->rxrearm_start];
struct rte_mbuf *mb0, *mb1;
- vector unsigned long hdr_room = (vector unsigned long){
+ __vector unsigned long hdr_room = (__vector unsigned long){
RTE_PKTMBUF_HEADROOM,
RTE_PKTMBUF_HEADROOM};
- vector unsigned long dma_addr0, dma_addr1;
+ __vector unsigned long dma_addr0, dma_addr1;
rxdp = rxq->rx_ring + rxq->rxrearm_start;
@@ -40,11 +40,11 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
RTE_I40E_RXQ_REARM_THRESH) < 0) {
if (rxq->rxrearm_nb + RTE_I40E_RXQ_REARM_THRESH >=
rxq->nb_rx_desc) {
- dma_addr0 = (vector unsigned long){};
+ dma_addr0 = (__vector unsigned long){};
for (i = 0; i < RTE_I40E_DESCS_PER_LOOP; i++) {
rxep[i].mbuf = &rxq->fake_mbuf;
vec_st(dma_addr0, 0,
- (vector unsigned long *)&rxdp[i].read);
+ (__vector unsigned long *)&rxdp[i].read);
}
}
rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
@@ -54,7 +54,7 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
/* Initialize the mbufs in vector, process 2 mbufs in one loop */
for (i = 0; i < RTE_I40E_RXQ_REARM_THRESH; i += 2, rxep += 2) {
- vector unsigned long vaddr0, vaddr1;
+ __vector unsigned long vaddr0, vaddr1;
uintptr_t p0, p1;
mb0 = rxep[0].mbuf;
@@ -72,8 +72,8 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
*(uint64_t *)p1 = rxq->mbuf_initializer;
/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */
- vaddr0 = vec_ld(0, (vector unsigned long *)&mb0->buf_addr);
- vaddr1 = vec_ld(0, (vector unsigned long *)&mb1->buf_addr);
+ vaddr0 = vec_ld(0, (__vector unsigned long *)&mb0->buf_addr);
+ vaddr1 = vec_ld(0, (__vector unsigned long *)&mb1->buf_addr);
/* convert pa to dma_addr hdr/data */
dma_addr0 = vec_mergel(vaddr0, vaddr0);
@@ -84,8 +84,8 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
dma_addr1 = vec_add(dma_addr1, hdr_room);
/* flush desc with pa dma_addr */
- vec_st(dma_addr0, 0, (vector unsigned long *)&rxdp++->read);
- vec_st(dma_addr1, 0, (vector unsigned long *)&rxdp++->read);
+ vec_st(dma_addr0, 0, (__vector unsigned long *)&rxdp++->read);
+ vec_st(dma_addr1, 0, (__vector unsigned long *)&rxdp++->read);
}
rxq->rxrearm_start += RTE_I40E_RXQ_REARM_THRESH;
@@ -102,32 +102,32 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)
}
static inline void
-desc_to_olflags_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts)
+desc_to_olflags_v(__vector unsigned long descs[4], struct rte_mbuf **rx_pkts)
{
- vector unsigned int vlan0, vlan1, rss, l3_l4e;
+ __vector unsigned int vlan0, vlan1, rss, l3_l4e;
/* mask everything except RSS, flow director and VLAN flags
* bit2 is for VLAN tag, bit11 for flow director indication
* bit13:12 for RSS indication.
*/
- const vector unsigned int rss_vlan_msk = (vector unsigned int){
+ const __vector unsigned int rss_vlan_msk = (__vector unsigned int){
(int32_t)0x1c03804, (int32_t)0x1c03804,
(int32_t)0x1c03804, (int32_t)0x1c03804};
/* map rss and vlan type to rss hash and vlan flag */
- const vector unsigned char vlan_flags = (vector unsigned char){
+ const __vector unsigned char vlan_flags = (__vector unsigned char){
0, 0, 0, 0,
RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0};
- const vector unsigned char rss_flags = (vector unsigned char){
+ const __vector unsigned char rss_flags = (__vector unsigned char){
0, RTE_MBUF_F_RX_FDIR, 0, 0,
0, 0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH | RTE_MBUF_F_RX_FDIR,
0, 0, 0, 0,
0, 0, 0, 0};
- const vector unsigned char l3_l4e_flags = (vector unsigned char){
+ const __vector unsigned char l3_l4e_flags = (__vector unsigned char){
0,
RTE_MBUF_F_RX_IP_CKSUM_BAD,
RTE_MBUF_F_RX_L4_CKSUM_BAD,
@@ -139,23 +139,23 @@ desc_to_olflags_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts)
| RTE_MBUF_F_RX_IP_CKSUM_BAD,
0, 0, 0, 0, 0, 0, 0, 0};
- vlan0 = (vector unsigned int)vec_mergel(descs[0], descs[1]);
- vlan1 = (vector unsigned int)vec_mergel(descs[2], descs[3]);
- vlan0 = (vector unsigned int)vec_mergeh(vlan0, vlan1);
+ vlan0 = (__vector unsigned int)vec_mergel(descs[0], descs[1]);
+ vlan1 = (__vector unsigned int)vec_mergel(descs[2], descs[3]);
+ vlan0 = (__vector unsigned int)vec_mergeh(vlan0, vlan1);
vlan1 = vec_and(vlan0, rss_vlan_msk);
- vlan0 = (vector unsigned int)vec_perm(vlan_flags,
- (vector unsigned char){},
- *(vector unsigned char *)&vlan1);
+ vlan0 = (__vector unsigned int)vec_perm(vlan_flags,
+ (__vector unsigned char){},
+ *(__vector unsigned char *)&vlan1);
- rss = vec_sr(vlan1, (vector unsigned int){11, 11, 11, 11});
- rss = (vector unsigned int)vec_perm(rss_flags, (vector unsigned char){},
- *(vector unsigned char *)&rss);
+ rss = vec_sr(vlan1, (__vector unsigned int){11, 11, 11, 11});
+ rss = (__vector unsigned int)vec_perm(rss_flags, (__vector unsigned char){},
+ *(__vector unsigned char *)&rss);
- l3_l4e = vec_sr(vlan1, (vector unsigned int){22, 22, 22, 22});
- l3_l4e = (vector unsigned int)vec_perm(l3_l4e_flags,
- (vector unsigned char){},
- *(vector unsigned char *)&l3_l4e);
+ l3_l4e = vec_sr(vlan1, (__vector unsigned int){22, 22, 22, 22});
+ l3_l4e = (__vector unsigned int)vec_perm(l3_l4e_flags,
+ (__vector unsigned char){},
+ *(__vector unsigned char *)&l3_l4e);
vlan0 = vec_or(vlan0, rss);
vlan0 = vec_or(vlan0, l3_l4e);
@@ -169,23 +169,23 @@ desc_to_olflags_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts)
#define PKTLEN_SHIFT 10
static inline void
-desc_to_ptype_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts,
+desc_to_ptype_v(__vector unsigned long descs[4], struct rte_mbuf **rx_pkts,
uint32_t *ptype_tbl)
{
- vector unsigned long ptype0 = vec_mergel(descs[0], descs[1]);
- vector unsigned long ptype1 = vec_mergel(descs[2], descs[3]);
+ __vector unsigned long ptype0 = vec_mergel(descs[0], descs[1]);
+ __vector unsigned long ptype1 = vec_mergel(descs[2], descs[3]);
- ptype0 = vec_sr(ptype0, (vector unsigned long){30, 30});
- ptype1 = vec_sr(ptype1, (vector unsigned long){30, 30});
+ ptype0 = vec_sr(ptype0, (__vector unsigned long){30, 30});
+ ptype1 = vec_sr(ptype1, (__vector unsigned long){30, 30});
rx_pkts[0]->packet_type =
- ptype_tbl[(*(vector unsigned char *)&ptype0)[0]];
+ ptype_tbl[(*(__vector unsigned char *)&ptype0)[0]];
rx_pkts[1]->packet_type =
- ptype_tbl[(*(vector unsigned char *)&ptype0)[8]];
+ ptype_tbl[(*(__vector unsigned char *)&ptype0)[8]];
rx_pkts[2]->packet_type =
- ptype_tbl[(*(vector unsigned char *)&ptype1)[0]];
+ ptype_tbl[(*(__vector unsigned char *)&ptype1)[0]];
rx_pkts[3]->packet_type =
- ptype_tbl[(*(vector unsigned char *)&ptype1)[8]];
+ ptype_tbl[(*(__vector unsigned char *)&ptype1)[8]];
}
/**
@@ -204,17 +204,17 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts_recd;
int pos;
uint64_t var;
- vector unsigned char shuf_msk;
+ __vector unsigned char shuf_msk;
uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;
- vector unsigned short crc_adjust = (vector unsigned short){
+ __vector unsigned short crc_adjust = (__vector unsigned short){
0, 0, /* ignore pkt_type field */
rxq->crc_len, /* sub crc on pkt_len */
0, /* ignore high-16bits of pkt_len */
rxq->crc_len, /* sub crc on data_len */
0, 0, 0 /* ignore non-length fields */
};
- vector unsigned long dd_check, eop_check;
+ __vector unsigned long dd_check, eop_check;
/* nb_pkts has to be floor-aligned to RTE_I40E_DESCS_PER_LOOP */
nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_I40E_DESCS_PER_LOOP);
@@ -240,15 +240,15 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
return 0;
/* 4 packets DD mask */
- dd_check = (vector unsigned long){0x0000000100000001ULL,
+ dd_check = (__vector unsigned long){0x0000000100000001ULL,
0x0000000100000001ULL};
/* 4 packets EOP mask */
- eop_check = (vector unsigned long){0x0000000200000002ULL,
+ eop_check = (__vector unsigned long){0x0000000200000002ULL,
0x0000000200000002ULL};
/* mask to shuffle from desc. to mbuf */
- shuf_msk = (vector unsigned char){
+ shuf_msk = (__vector unsigned char){
0xFF, 0xFF, /* pkt_type set as unknown */
0xFF, 0xFF, /* pkt_type set as unknown */
14, 15, /* octet 15~14, low 16 bits pkt_len */
@@ -274,35 +274,35 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
for (pos = 0, nb_pkts_recd = 0; pos < nb_pkts;
pos += RTE_I40E_DESCS_PER_LOOP,
rxdp += RTE_I40E_DESCS_PER_LOOP) {
- vector unsigned long descs[RTE_I40E_DESCS_PER_LOOP];
- vector unsigned char pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;
- vector unsigned short staterr, sterr_tmp1, sterr_tmp2;
- vector unsigned long mbp1, mbp2; /* two mbuf pointer
+ __vector unsigned long descs[RTE_I40E_DESCS_PER_LOOP];
+ __vector unsigned char pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;
+ __vector unsigned short staterr, sterr_tmp1, sterr_tmp2;
+ __vector unsigned long mbp1, mbp2; /* two mbuf pointer
* in one XMM reg.
*/
/* B.1 load 2 mbuf point */
- mbp1 = *(vector unsigned long *)&sw_ring[pos];
+ mbp1 = *(__vector unsigned long *)&sw_ring[pos];
/* Read desc statuses backwards to avoid race condition */
/* A.1 load desc[3] */
- descs[3] = *(vector unsigned long *)(rxdp + 3);
+ descs[3] = *(__vector unsigned long *)(rxdp + 3);
rte_compiler_barrier();
/* B.2 copy 2 mbuf point into rx_pkts */
- *(vector unsigned long *)&rx_pkts[pos] = mbp1;
+ *(__vector unsigned long *)&rx_pkts[pos] = mbp1;
/* B.1 load 2 mbuf point */
- mbp2 = *(vector unsigned long *)&sw_ring[pos + 2];
+ mbp2 = *(__vector unsigned long *)&sw_ring[pos + 2];
/* A.1 load desc[2-0] */
- descs[2] = *(vector unsigned long *)(rxdp + 2);
+ descs[2] = *(__vector unsigned long *)(rxdp + 2);
rte_compiler_barrier();
- descs[1] = *(vector unsigned long *)(rxdp + 1);
+ descs[1] = *(__vector unsigned long *)(rxdp + 1);
rte_compiler_barrier();
- descs[0] = *(vector unsigned long *)(rxdp);
+ descs[0] = *(__vector unsigned long *)(rxdp);
/* B.2 copy 2 mbuf point into rx_pkts */
- *(vector unsigned long *)&rx_pkts[pos + 2] = mbp2;
+ *(__vector unsigned long *)&rx_pkts[pos + 2] = mbp2;
if (split_packet) {
rte_mbuf_prefetch_part2(rx_pkts[pos]);
@@ -315,78 +315,78 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
rte_compiler_barrier();
/* pkt 3,4 shift the pktlen field to be 16-bit aligned*/
- const vector unsigned int len3 = vec_sl(
- vec_ld(0, (vector unsigned int *)&descs[3]),
- (vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
+ const __vector unsigned int len3 = vec_sl(
+ vec_ld(0, (__vector unsigned int *)&descs[3]),
+ (__vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
- const vector unsigned int len2 = vec_sl(
- vec_ld(0, (vector unsigned int *)&descs[2]),
- (vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
+ const __vector unsigned int len2 = vec_sl(
+ vec_ld(0, (__vector unsigned int *)&descs[2]),
+ (__vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
/* merge the now-aligned packet length fields back in */
- descs[3] = (vector unsigned long)len3;
- descs[2] = (vector unsigned long)len2;
+ descs[3] = (__vector unsigned long)len3;
+ descs[2] = (__vector unsigned long)len2;
/* D.1 pkt 3,4 convert format from desc to pktmbuf */
- pkt_mb4 = vec_perm((vector unsigned char)descs[3],
- (vector unsigned char){}, shuf_msk);
- pkt_mb3 = vec_perm((vector unsigned char)descs[2],
- (vector unsigned char){}, shuf_msk);
+ pkt_mb4 = vec_perm((__vector unsigned char)descs[3],
+ (__vector unsigned char){}, shuf_msk);
+ pkt_mb3 = vec_perm((__vector unsigned char)descs[2],
+ (__vector unsigned char){}, shuf_msk);
/* C.1 4=>2 filter staterr info only */
- sterr_tmp2 = vec_mergel((vector unsigned short)descs[3],
- (vector unsigned short)descs[2]);
+ sterr_tmp2 = vec_mergel((__vector unsigned short)descs[3],
+ (__vector unsigned short)descs[2]);
/* C.1 4=>2 filter staterr info only */
- sterr_tmp1 = vec_mergel((vector unsigned short)descs[1],
- (vector unsigned short)descs[0]);
+ sterr_tmp1 = vec_mergel((__vector unsigned short)descs[1],
+ (__vector unsigned short)descs[0]);
/* D.2 pkt 3,4 set in_port/nb_seg and remove crc */
- pkt_mb4 = (vector unsigned char)vec_sub(
- (vector unsigned short)pkt_mb4, crc_adjust);
- pkt_mb3 = (vector unsigned char)vec_sub(
- (vector unsigned short)pkt_mb3, crc_adjust);
+ pkt_mb4 = (__vector unsigned char)vec_sub(
+ (__vector unsigned short)pkt_mb4, crc_adjust);
+ pkt_mb3 = (__vector unsigned char)vec_sub(
+ (__vector unsigned short)pkt_mb3, crc_adjust);
/* pkt 1,2 shift the pktlen field to be 16-bit aligned*/
- const vector unsigned int len1 = vec_sl(
- vec_ld(0, (vector unsigned int *)&descs[1]),
- (vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
- const vector unsigned int len0 = vec_sl(
- vec_ld(0, (vector unsigned int *)&descs[0]),
- (vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
+ const __vector unsigned int len1 = vec_sl(
+ vec_ld(0, (__vector unsigned int *)&descs[1]),
+ (__vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
+ const __vector unsigned int len0 = vec_sl(
+ vec_ld(0, (__vector unsigned int *)&descs[0]),
+ (__vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
/* merge the now-aligned packet length fields back in */
- descs[1] = (vector unsigned long)len1;
- descs[0] = (vector unsigned long)len0;
+ descs[1] = (__vector unsigned long)len1;
+ descs[0] = (__vector unsigned long)len0;
/* D.1 pkt 1,2 convert format from desc to pktmbuf */
- pkt_mb2 = vec_perm((vector unsigned char)descs[1],
- (vector unsigned char){}, shuf_msk);
- pkt_mb1 = vec_perm((vector unsigned char)descs[0],
- (vector unsigned char){}, shuf_msk);
+ pkt_mb2 = vec_perm((__vector unsigned char)descs[1],
+ (__vector unsigned char){}, shuf_msk);
+ pkt_mb1 = vec_perm((__vector unsigned char)descs[0],
+ (__vector unsigned char){}, shuf_msk);
/* C.2 get 4 pkts staterr value */
- staterr = (vector unsigned short)vec_mergeh(
+ staterr = (__vector unsigned short)vec_mergeh(
sterr_tmp1, sterr_tmp2);
/* D.3 copy final 3,4 data to rx_pkts */
vec_st(pkt_mb4, 0,
- (vector unsigned char *)&rx_pkts[pos + 3]
+ (__vector unsigned char *)&rx_pkts[pos + 3]
->rx_descriptor_fields1
);
vec_st(pkt_mb3, 0,
- (vector unsigned char *)&rx_pkts[pos + 2]
+ (__vector unsigned char *)&rx_pkts[pos + 2]
->rx_descriptor_fields1
);
/* D.2 pkt 1,2 set in_port/nb_seg and remove crc */
- pkt_mb2 = (vector unsigned char)vec_sub(
- (vector unsigned short)pkt_mb2, crc_adjust);
- pkt_mb1 = (vector unsigned char)vec_sub(
- (vector unsigned short)pkt_mb1, crc_adjust);
+ pkt_mb2 = (__vector unsigned char)vec_sub(
+ (__vector unsigned short)pkt_mb2, crc_adjust);
+ pkt_mb1 = (__vector unsigned char)vec_sub(
+ (__vector unsigned short)pkt_mb1, crc_adjust);
/* C* extract and record EOP bit */
if (split_packet) {
- vector unsigned char eop_shuf_mask =
- (vector unsigned char){
+ __vector unsigned char eop_shuf_mask =
+ (__vector unsigned char){
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF,
@@ -394,19 +394,19 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
};
/* and with mask to extract bits, flipping 1-0 */
- vector unsigned char eop_bits = vec_and(
- (vector unsigned char)vec_nor(staterr, staterr),
- (vector unsigned char)eop_check);
+ __vector unsigned char eop_bits = vec_and(
+ (__vector unsigned char)vec_nor(staterr, staterr),
+ (__vector unsigned char)eop_check);
/* the staterr values are not in order, as the count
* of dd bits doesn't care. However, for end of
* packet tracking, we do care, so shuffle. This also
* compresses the 32-bit values to 8-bit
*/
- eop_bits = vec_perm(eop_bits, (vector unsigned char){},
+ eop_bits = vec_perm(eop_bits, (__vector unsigned char){},
eop_shuf_mask);
/* store the resulting 32-bit value */
*split_packet = (vec_ld(0,
- (vector unsigned int *)&eop_bits))[0];
+ (__vector unsigned int *)&eop_bits))[0];
split_packet += RTE_I40E_DESCS_PER_LOOP;
/* zero-out next pointers */
@@ -417,22 +417,22 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
}
/* C.3 calc available number of desc */
- staterr = vec_and(staterr, (vector unsigned short)dd_check);
+ staterr = vec_and(staterr, (__vector unsigned short)dd_check);
/* D.3 copy final 1,2 data to rx_pkts */
vec_st(pkt_mb2, 0,
- (vector unsigned char *)&rx_pkts[pos + 1]
+ (__vector unsigned char *)&rx_pkts[pos + 1]
->rx_descriptor_fields1
);
vec_st(pkt_mb1, 0,
- (vector unsigned char *)&rx_pkts[pos]->rx_descriptor_fields1
+ (__vector unsigned char *)&rx_pkts[pos]->rx_descriptor_fields1
);
desc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);
desc_to_olflags_v(descs, &rx_pkts[pos]);
/* C.4 calc available number of desc */
var = __builtin_popcountll((vec_ld(0,
- (vector unsigned long *)&staterr)[0]));
+ (__vector unsigned long *)&staterr)[0]));
nb_pkts_recd += var;
if (likely(var != RTE_I40E_DESCS_PER_LOOP))
break;
@@ -533,9 +533,9 @@ vtx1(volatile struct i40e_tx_desc *txdp,
((uint64_t)flags << I40E_TXD_QW1_CMD_SHIFT) |
((uint64_t)pkt->data_len << I40E_TXD_QW1_TX_BUF_SZ_SHIFT));
- vector unsigned long descriptor = (vector unsigned long){
+ __vector unsigned long descriptor = (__vector unsigned long){
pkt->buf_iova + pkt->data_off, high_qw};
- *(vector unsigned long *)txdp = descriptor;
+ *(__vector unsigned long *)txdp = descriptor;
}
static inline void
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
index f6e434c165..683a8f9a6c 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
@@ -47,11 +47,11 @@ rxq_copy_mbuf_v(struct rte_mbuf **elts, struct rte_mbuf **pkts, uint16_t n)
uint16_t p = n & -2;
for (pos = 0; pos < p; pos += 2) {
- vector unsigned char mbp;
+ __vector unsigned char mbp;
- mbp = (vector unsigned char)vec_vsx_ld(0,
+ mbp = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&elts[pos]);
- *(vector unsigned char *)&pkts[pos] = mbp;
+ *(__vector unsigned char *)&pkts[pos] = mbp;
}
if (n & 1)
pkts[pos] = elts[pos];
@@ -78,15 +78,15 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
{
volatile struct mlx5_mini_cqe8 *mcq = (void *)&(cq + 1)->pkt_info;
struct rte_mbuf *t_pkt = elts[0]; /* Title packet is pre-built. */
- const vector unsigned char zero = (vector unsigned char){0};
+ const __vector unsigned char zero = (__vector unsigned char){0};
/* Mask to shuffle from extracted mini CQE to mbuf. */
- const vector unsigned char shuf_mask1 = (vector unsigned char){
+ const __vector unsigned char shuf_mask1 = (__vector unsigned char){
-1, -1, -1, -1, /* skip packet_type */
7, 6, -1, -1, /* bswap16, pkt_len */
7, 6, /* bswap16, data_len */
-1, -1, /* skip vlan_tci */
3, 2, 1, 0}; /* bswap32, rss */
- const vector unsigned char shuf_mask2 = (vector unsigned char){
+ const __vector unsigned char shuf_mask2 = (__vector unsigned char){
-1, -1, -1, -1, /* skip packet_type */
15, 14, -1, -1, /* bswap16, pkt_len */
15, 14, /* data_len, bswap16 */
@@ -95,30 +95,30 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
/* Restore the compressed count. Must be 16 bits. */
const uint16_t mcqe_n = t_pkt->data_len +
(rxq->crc_present * RTE_ETHER_CRC_LEN);
- const vector unsigned char rearm =
- (vector unsigned char)vec_vsx_ld(0,
+ const __vector unsigned char rearm =
+ (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&t_pkt->rearm_data);
- const vector unsigned char rxdf =
- (vector unsigned char)vec_vsx_ld(0,
+ const __vector unsigned char rxdf =
+ (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&t_pkt->rx_descriptor_fields1);
- const vector unsigned char crc_adj =
- (vector unsigned char)(vector unsigned short){
+ const __vector unsigned char crc_adj =
+ (__vector unsigned char)(__vector unsigned short){
0, 0, rxq->crc_present * RTE_ETHER_CRC_LEN, 0,
rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0};
- const vector unsigned short rxdf_sel_mask =
- (vector unsigned short){
+ const __vector unsigned short rxdf_sel_mask =
+ (__vector unsigned short){
0xffff, 0xffff, 0, 0, 0, 0xffff, 0, 0};
- vector unsigned char ol_flags = (vector unsigned char){0};
- vector unsigned char ol_flags_mask = (vector unsigned char){0};
+ __vector unsigned char ol_flags = (__vector unsigned char){0};
+ __vector unsigned char ol_flags_mask = (__vector unsigned char){0};
unsigned int pos;
unsigned int i;
unsigned int inv = 0;
#ifdef MLX5_PMD_SOFT_COUNTERS
- const vector unsigned char ones = vec_splat_u8(-1);
+ const __vector unsigned char ones = vec_splat_u8(-1);
uint32_t rcvd_byte = 0;
/* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */
- const vector unsigned char len_shuf_mask = (vector unsigned char){
+ const __vector unsigned char len_shuf_mask = (__vector unsigned char){
3, 2, 11, 10,
7, 6, 15, 14,
-1, -1, -1, -1,
@@ -133,125 +133,125 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
* E. store flow tag (rte_flow mark).
*/
for (pos = 0; pos < mcqe_n; ) {
- vector unsigned char mcqe1, mcqe2;
- vector unsigned char rxdf1, rxdf2;
+ __vector unsigned char mcqe1, mcqe2;
+ __vector unsigned char rxdf1, rxdf2;
#ifdef MLX5_PMD_SOFT_COUNTERS
- const vector unsigned short mcqe_sel_mask =
- (vector unsigned short){0, 0, 0xffff, 0xffff,
+ const __vector unsigned short mcqe_sel_mask =
+ (__vector unsigned short){0, 0, 0xffff, 0xffff,
0, 0, 0xfff, 0xffff};
- const vector unsigned char lower_half = {
+ const __vector unsigned char lower_half = {
0, 1, 4, 5, 8, 9, 12, 13, 16,
17, 20, 21, 24, 25, 28, 29};
- const vector unsigned char upper_half = {
+ const __vector unsigned char upper_half = {
2, 3, 6, 7, 10, 11, 14, 15,
18, 19, 22, 23, 26, 27, 30, 31};
- vector unsigned short left, right;
- vector unsigned char byte_cnt, invalid_mask;
- vector unsigned long lshift;
+ __vector unsigned short left, right;
+ __vector unsigned char byte_cnt, invalid_mask;
+ __vector unsigned long lshift;
__attribute__((altivec(vector__)))
__attribute__((altivec(bool__)))
unsigned long long shmask;
- const vector unsigned long shmax = {64, 64};
+ const __vector unsigned long shmax = {64, 64};
#endif
for (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i)
if (likely(pos + i < mcqe_n))
rte_prefetch0((void *)(cq + pos + i));
/* A.1 load mCQEs into a 128bit register. */
- mcqe1 = (vector unsigned char)vec_vsx_ld(0,
+ mcqe1 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&mcq[pos % 8]);
- mcqe2 = (vector unsigned char)vec_vsx_ld(0,
+ mcqe2 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&mcq[pos % 8 + 2]);
/* B.1 store rearm data to mbuf. */
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos]->rearm_data = rearm;
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos + 1]->rearm_data = rearm;
/* C.1 combine data from mCQEs with rx_descriptor_fields1. */
rxdf1 = vec_perm(mcqe1, zero, shuf_mask1);
rxdf2 = vec_perm(mcqe1, zero, shuf_mask2);
- rxdf1 = (vector unsigned char)
- ((vector unsigned short)rxdf1 -
- (vector unsigned short)crc_adj);
- rxdf2 = (vector unsigned char)
- ((vector unsigned short)rxdf2 -
- (vector unsigned short)crc_adj);
- rxdf1 = (vector unsigned char)
- vec_sel((vector unsigned short)rxdf1,
- (vector unsigned short)rxdf, rxdf_sel_mask);
- rxdf2 = (vector unsigned char)
- vec_sel((vector unsigned short)rxdf2,
- (vector unsigned short)rxdf, rxdf_sel_mask);
+ rxdf1 = (__vector unsigned char)
+ ((__vector unsigned short)rxdf1 -
+ (__vector unsigned short)crc_adj);
+ rxdf2 = (__vector unsigned char)
+ ((__vector unsigned short)rxdf2 -
+ (__vector unsigned short)crc_adj);
+ rxdf1 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)rxdf1,
+ (__vector unsigned short)rxdf, rxdf_sel_mask);
+ rxdf2 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)rxdf2,
+ (__vector unsigned short)rxdf, rxdf_sel_mask);
/* D.1 store rx_descriptor_fields1. */
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos]->rx_descriptor_fields1 = rxdf1;
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos + 1]->rx_descriptor_fields1 = rxdf2;
/* B.1 store rearm data to mbuf. */
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos + 2]->rearm_data = rearm;
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos + 3]->rearm_data = rearm;
/* C.1 combine data from mCQEs with rx_descriptor_fields1. */
rxdf1 = vec_perm(mcqe2, zero, shuf_mask1);
rxdf2 = vec_perm(mcqe2, zero, shuf_mask2);
- rxdf1 = (vector unsigned char)
- ((vector unsigned short)rxdf1 -
- (vector unsigned short)crc_adj);
- rxdf2 = (vector unsigned char)
- ((vector unsigned short)rxdf2 -
- (vector unsigned short)crc_adj);
- rxdf1 = (vector unsigned char)
- vec_sel((vector unsigned short)rxdf1,
- (vector unsigned short)rxdf, rxdf_sel_mask);
- rxdf2 = (vector unsigned char)
- vec_sel((vector unsigned short)rxdf2,
- (vector unsigned short)rxdf, rxdf_sel_mask);
+ rxdf1 = (__vector unsigned char)
+ ((__vector unsigned short)rxdf1 -
+ (__vector unsigned short)crc_adj);
+ rxdf2 = (__vector unsigned char)
+ ((__vector unsigned short)rxdf2 -
+ (__vector unsigned short)crc_adj);
+ rxdf1 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)rxdf1,
+ (__vector unsigned short)rxdf, rxdf_sel_mask);
+ rxdf2 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)rxdf2,
+ (__vector unsigned short)rxdf, rxdf_sel_mask);
/* D.1 store rx_descriptor_fields1. */
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos + 2]->rx_descriptor_fields1 = rxdf1;
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&elts[pos + 3]->rx_descriptor_fields1 = rxdf2;
#ifdef MLX5_PMD_SOFT_COUNTERS
- invalid_mask = (vector unsigned char)(vector unsigned long){
+ invalid_mask = (__vector unsigned char)(__vector unsigned long){
(mcqe_n - pos) * sizeof(uint16_t) * 8, 0};
lshift =
- vec_splat((vector unsigned long)invalid_mask, 0);
+ vec_splat((__vector unsigned long)invalid_mask, 0);
shmask = vec_cmpgt(shmax, lshift);
- invalid_mask = (vector unsigned char)
- vec_sl((vector unsigned long)ones, lshift);
- invalid_mask = (vector unsigned char)
- vec_sel((vector unsigned long)shmask,
- (vector unsigned long)invalid_mask, shmask);
+ invalid_mask = (__vector unsigned char)
+ vec_sl((__vector unsigned long)ones, lshift);
+ invalid_mask = (__vector unsigned char)
+ vec_sel((__vector unsigned long)shmask,
+ (__vector unsigned long)invalid_mask, shmask);
- byte_cnt = (vector unsigned char)
- vec_sel((vector unsigned short)
- vec_sro((vector unsigned short)mcqe1,
- (vector unsigned char){32}),
- (vector unsigned short)mcqe2, mcqe_sel_mask);
+ byte_cnt = (__vector unsigned char)
+ vec_sel((__vector unsigned short)
+ vec_sro((__vector unsigned short)mcqe1,
+ (__vector unsigned char){32}),
+ (__vector unsigned short)mcqe2, mcqe_sel_mask);
byte_cnt = vec_perm(byte_cnt, zero, len_shuf_mask);
- byte_cnt = (vector unsigned char)
- vec_andc((vector unsigned long)byte_cnt,
- (vector unsigned long)invalid_mask);
- left = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, lower_half);
- right = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, upper_half);
- byte_cnt = (vector unsigned char)vec_add(left, right);
- left = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, lower_half);
- right = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, upper_half);
- byte_cnt = (vector unsigned char)vec_add(left, right);
- rcvd_byte += ((vector unsigned long)byte_cnt)[0];
+ byte_cnt = (__vector unsigned char)
+ vec_andc((__vector unsigned long)byte_cnt,
+ (__vector unsigned long)invalid_mask);
+ left = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, lower_half);
+ right = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, upper_half);
+ byte_cnt = (__vector unsigned char)vec_add(left, right);
+ left = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, lower_half);
+ right = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, upper_half);
+ byte_cnt = (__vector unsigned char)vec_add(left, right);
+ rcvd_byte += ((__vector unsigned long)byte_cnt)[0];
#endif
if (rxq->mark) {
@@ -265,99 +265,99 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
elts[pos + 2]->hash.fdir.hi = flow_tag;
elts[pos + 3]->hash.fdir.hi = flow_tag;
} else {
- const vector unsigned char flow_mark_adj =
- (vector unsigned char)
- (vector unsigned int){
+ const __vector unsigned char flow_mark_adj =
+ (__vector unsigned char)
+ (__vector unsigned int){
-1, -1, -1, -1};
- const vector unsigned char flow_mark_shuf =
- (vector unsigned char){
+ const __vector unsigned char flow_mark_shuf =
+ (__vector unsigned char){
-1, -1, -1, -1,
-1, -1, -1, -1,
12, 8, 9, -1,
4, 0, 1, -1};
- const vector unsigned char ft_mask =
- (vector unsigned char)
- (vector unsigned int){
+ const __vector unsigned char ft_mask =
+ (__vector unsigned char)
+ (__vector unsigned int){
0xffffff00, 0xffffff00,
0xffffff00, 0xffffff00};
- const vector unsigned char fdir_flags =
- (vector unsigned char)
- (vector unsigned int){
+ const __vector unsigned char fdir_flags =
+ (__vector unsigned char)
+ (__vector unsigned int){
RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR,
RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR};
- const vector unsigned char fdir_all_flags =
- (vector unsigned char)
- (vector unsigned int){
+ const __vector unsigned char fdir_all_flags =
+ (__vector unsigned char)
+ (__vector unsigned int){
RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID,
RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID,
RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID,
RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID};
- vector unsigned char fdir_id_flags =
- (vector unsigned char)
- (vector unsigned int){
+ __vector unsigned char fdir_id_flags =
+ (__vector unsigned char)
+ (__vector unsigned int){
RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID,
RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID};
/* Extract flow_tag field. */
- vector unsigned char ftag0 = vec_perm(mcqe1,
+ __vector unsigned char ftag0 = vec_perm(mcqe1,
zero, flow_mark_shuf);
- vector unsigned char ftag1 = vec_perm(mcqe2,
+ __vector unsigned char ftag1 = vec_perm(mcqe2,
zero, flow_mark_shuf);
- vector unsigned char ftag =
- (vector unsigned char)
- vec_mergel((vector unsigned int)ftag0,
- (vector unsigned int)ftag1);
- vector unsigned char invalid_mask =
- (vector unsigned char)
- vec_cmpeq((vector unsigned int)ftag,
- (vector unsigned int)zero);
+ __vector unsigned char ftag =
+ (__vector unsigned char)
+ vec_mergel((__vector unsigned int)ftag0,
+ (__vector unsigned int)ftag1);
+ __vector unsigned char invalid_mask =
+ (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)ftag,
+ (__vector unsigned int)zero);
- ol_flags_mask = (vector unsigned char)
- vec_or((vector unsigned long)
+ ol_flags_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)
ol_flags_mask,
- (vector unsigned long)fdir_all_flags);
+ (__vector unsigned long)fdir_all_flags);
/* Set RTE_MBUF_F_RX_FDIR if flow tag is non-zero. */
- invalid_mask = (vector unsigned char)
- vec_cmpeq((vector unsigned int)ftag,
- (vector unsigned int)zero);
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)
- vec_andc((vector unsigned long)
+ invalid_mask = (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)ftag,
+ (__vector unsigned int)zero);
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)
+ vec_andc((__vector unsigned long)
fdir_flags,
- (vector unsigned long)invalid_mask));
- ol_flags_mask = (vector unsigned char)
- vec_or((vector unsigned long)
+ (__vector unsigned long)invalid_mask));
+ ol_flags_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)
ol_flags_mask,
- (vector unsigned long)fdir_flags);
+ (__vector unsigned long)fdir_flags);
/* Mask out invalid entries. */
- fdir_id_flags = (vector unsigned char)
- vec_andc((vector unsigned long)
+ fdir_id_flags = (__vector unsigned char)
+ vec_andc((__vector unsigned long)
fdir_id_flags,
- (vector unsigned long)invalid_mask);
+ (__vector unsigned long)invalid_mask);
/* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)
- vec_andc((vector unsigned long)
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)
+ vec_andc((__vector unsigned long)
fdir_id_flags,
- (vector unsigned long)
- vec_cmpeq((vector unsigned int)ftag,
- (vector unsigned int)ft_mask)));
+ (__vector unsigned long)
+ vec_cmpeq((__vector unsigned int)ftag,
+ (__vector unsigned int)ft_mask)));
- ftag = (vector unsigned char)
- ((vector unsigned int)ftag +
- (vector unsigned int)flow_mark_adj);
+ ftag = (__vector unsigned char)
+ ((__vector unsigned int)ftag +
+ (__vector unsigned int)flow_mark_adj);
elts[pos]->hash.fdir.hi =
- ((vector unsigned int)ftag)[0];
+ ((__vector unsigned int)ftag)[0];
elts[pos + 1]->hash.fdir.hi =
- ((vector unsigned int)ftag)[1];
+ ((__vector unsigned int)ftag)[1];
elts[pos + 2]->hash.fdir.hi =
- ((vector unsigned int)ftag)[2];
+ ((__vector unsigned int)ftag)[2];
elts[pos + 3]->hash.fdir.hi =
- ((vector unsigned int)ftag)[3];
+ ((__vector unsigned int)ftag)[3];
}
}
if (unlikely(rxq->mcqe_format != MLX5_CQE_RESP_FORMAT_HASH)) {
@@ -373,37 +373,37 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
mcq[pos % 8 + 2].hdr_type;
const uint8_t pkt_hdr3 =
mcq[pos % 8 + 3].hdr_type;
- const vector unsigned char vlan_mask =
- (vector unsigned char)
- (vector unsigned int) {
+ const __vector unsigned char vlan_mask =
+ (__vector unsigned char)
+ (__vector unsigned int) {
(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED),
(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED),
(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED),
(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED)};
- const vector unsigned char cv_mask =
- (vector unsigned char)
- (vector unsigned int) {
+ const __vector unsigned char cv_mask =
+ (__vector unsigned char)
+ (__vector unsigned int) {
MLX5_CQE_VLAN_STRIPPED,
MLX5_CQE_VLAN_STRIPPED,
MLX5_CQE_VLAN_STRIPPED,
MLX5_CQE_VLAN_STRIPPED};
- vector unsigned char pkt_cv =
- (vector unsigned char)
- (vector unsigned int) {
+ __vector unsigned char pkt_cv =
+ (__vector unsigned char)
+ (__vector unsigned int) {
pkt_hdr0 & 0x1, pkt_hdr1 & 0x1,
pkt_hdr2 & 0x1, pkt_hdr3 & 0x1};
- ol_flags_mask = (vector unsigned char)
- vec_or((vector unsigned long)
+ ol_flags_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)
ol_flags_mask,
- (vector unsigned long)vlan_mask);
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)
- vec_and((vector unsigned long)vlan_mask,
- (vector unsigned long)
- vec_cmpeq((vector unsigned int)pkt_cv,
- (vector unsigned int)cv_mask)));
+ (__vector unsigned long)vlan_mask);
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)
+ vec_and((__vector unsigned long)vlan_mask,
+ (__vector unsigned long)
+ vec_cmpeq((__vector unsigned int)pkt_cv,
+ (__vector unsigned int)cv_mask)));
elts[pos]->packet_type =
mlx5_ptype_table[(pkt_hdr0 >> 2) |
pkt_info];
@@ -431,36 +431,36 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
pkt_info) & (1 << 6));
}
}
- const vector unsigned char hash_mask =
- (vector unsigned char)(vector unsigned int) {
+ const __vector unsigned char hash_mask =
+ (__vector unsigned char)(__vector unsigned int) {
RTE_MBUF_F_RX_RSS_HASH,
RTE_MBUF_F_RX_RSS_HASH,
RTE_MBUF_F_RX_RSS_HASH,
RTE_MBUF_F_RX_RSS_HASH};
- const vector unsigned char rearm_flags =
- (vector unsigned char)(vector unsigned int) {
+ const __vector unsigned char rearm_flags =
+ (__vector unsigned char)(__vector unsigned int) {
(uint32_t)t_pkt->ol_flags,
(uint32_t)t_pkt->ol_flags,
(uint32_t)t_pkt->ol_flags,
(uint32_t)t_pkt->ol_flags};
- ol_flags_mask = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags_mask,
- (vector unsigned long)hash_mask);
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)
- vec_andc((vector unsigned long)rearm_flags,
- (vector unsigned long)ol_flags_mask));
+ ol_flags_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags_mask,
+ (__vector unsigned long)hash_mask);
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)
+ vec_andc((__vector unsigned long)rearm_flags,
+ (__vector unsigned long)ol_flags_mask));
elts[pos]->ol_flags =
- ((vector unsigned int)ol_flags)[0];
+ ((__vector unsigned int)ol_flags)[0];
elts[pos + 1]->ol_flags =
- ((vector unsigned int)ol_flags)[1];
+ ((__vector unsigned int)ol_flags)[1];
elts[pos + 2]->ol_flags =
- ((vector unsigned int)ol_flags)[2];
+ ((__vector unsigned int)ol_flags)[2];
elts[pos + 3]->ol_flags =
- ((vector unsigned int)ol_flags)[3];
+ ((__vector unsigned int)ol_flags)[3];
elts[pos]->hash.rss = 0;
elts[pos + 1]->hash.rss = 0;
elts[pos + 2]->hash.rss = 0;
@@ -524,13 +524,13 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
*/
static inline void
rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
- vector unsigned char cqes[4], vector unsigned char op_err,
+ __vector unsigned char cqes[4], __vector unsigned char op_err,
struct rte_mbuf **pkts)
{
- vector unsigned char pinfo0, pinfo1;
- vector unsigned char pinfo, ptype;
- vector unsigned char ol_flags = (vector unsigned char)
- (vector unsigned int){
+ __vector unsigned char pinfo0, pinfo1;
+ __vector unsigned char pinfo, ptype;
+ __vector unsigned char ol_flags = (__vector unsigned char)
+ (__vector unsigned int){
rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH |
rxq->hw_timestamp * rxq->timestamp_rx_flag,
rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH |
@@ -539,25 +539,25 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
rxq->hw_timestamp * rxq->timestamp_rx_flag,
rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH |
rxq->hw_timestamp * rxq->timestamp_rx_flag};
- vector unsigned char cv_flags;
- const vector unsigned char zero = (vector unsigned char){0};
- const vector unsigned char ptype_mask =
- (vector unsigned char)(vector unsigned int){
+ __vector unsigned char cv_flags;
+ const __vector unsigned char zero = (__vector unsigned char){0};
+ const __vector unsigned char ptype_mask =
+ (__vector unsigned char)(__vector unsigned int){
0x0000fd06, 0x0000fd06, 0x0000fd06, 0x0000fd06};
- const vector unsigned char ptype_ol_mask =
- (vector unsigned char)(vector unsigned int){
+ const __vector unsigned char ptype_ol_mask =
+ (__vector unsigned char)(__vector unsigned int){
0x00000106, 0x00000106, 0x00000106, 0x00000106};
- const vector unsigned char pinfo_mask =
- (vector unsigned char)(vector unsigned int){
+ const __vector unsigned char pinfo_mask =
+ (__vector unsigned char)(__vector unsigned int){
0x00000003, 0x00000003, 0x00000003, 0x00000003};
- const vector unsigned char cv_flag_sel = (vector unsigned char){
+ const __vector unsigned char cv_flag_sel = (__vector unsigned char){
0, (uint8_t)(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED),
(uint8_t)(RTE_MBUF_F_RX_IP_CKSUM_GOOD >> 1), 0,
(uint8_t)(RTE_MBUF_F_RX_L4_CKSUM_GOOD >> 1), 0,
(uint8_t)((RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD) >> 1),
0, 0, 0, 0, 0, 0, 0, 0, 0};
- const vector unsigned char cv_mask =
- (vector unsigned char)(vector unsigned int){
+ const __vector unsigned char cv_mask =
+ (__vector unsigned char)(__vector unsigned int){
RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED,
RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
@@ -566,77 +566,77 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED,
RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED};
- const vector unsigned char mbuf_init =
- (vector unsigned char)vec_vsx_ld
- (0, (vector unsigned char *)&rxq->mbuf_initializer);
- const vector unsigned short rearm_sel_mask =
- (vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0};
- vector unsigned char rearm0, rearm1, rearm2, rearm3;
+ const __vector unsigned char mbuf_init =
+ (__vector unsigned char)vec_vsx_ld
+ (0, (__vector unsigned char *)&rxq->mbuf_initializer);
+ const __vector unsigned short rearm_sel_mask =
+ (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0};
+ __vector unsigned char rearm0, rearm1, rearm2, rearm3;
uint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3;
/* Extract pkt_info field. */
- pinfo0 = (vector unsigned char)
- vec_mergeh((vector unsigned int)cqes[0],
- (vector unsigned int)cqes[1]);
- pinfo1 = (vector unsigned char)
- vec_mergeh((vector unsigned int)cqes[2],
- (vector unsigned int)cqes[3]);
- pinfo = (vector unsigned char)
- vec_mergeh((vector unsigned long)pinfo0,
- (vector unsigned long)pinfo1);
+ pinfo0 = (__vector unsigned char)
+ vec_mergeh((__vector unsigned int)cqes[0],
+ (__vector unsigned int)cqes[1]);
+ pinfo1 = (__vector unsigned char)
+ vec_mergeh((__vector unsigned int)cqes[2],
+ (__vector unsigned int)cqes[3]);
+ pinfo = (__vector unsigned char)
+ vec_mergeh((__vector unsigned long)pinfo0,
+ (__vector unsigned long)pinfo1);
/* Extract hdr_type_etc field. */
- pinfo0 = (vector unsigned char)
- vec_mergel((vector unsigned int)cqes[0],
- (vector unsigned int)cqes[1]);
- pinfo1 = (vector unsigned char)
- vec_mergel((vector unsigned int)cqes[2],
- (vector unsigned int)cqes[3]);
- ptype = (vector unsigned char)
- vec_mergeh((vector unsigned long)pinfo0,
- (vector unsigned long)pinfo1);
+ pinfo0 = (__vector unsigned char)
+ vec_mergel((__vector unsigned int)cqes[0],
+ (__vector unsigned int)cqes[1]);
+ pinfo1 = (__vector unsigned char)
+ vec_mergel((__vector unsigned int)cqes[2],
+ (__vector unsigned int)cqes[3]);
+ ptype = (__vector unsigned char)
+ vec_mergeh((__vector unsigned long)pinfo0,
+ (__vector unsigned long)pinfo1);
if (rxq->mark) {
- const vector unsigned char pinfo_ft_mask =
- (vector unsigned char)(vector unsigned int){
+ const __vector unsigned char pinfo_ft_mask =
+ (__vector unsigned char)(__vector unsigned int){
0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00};
- const vector unsigned char fdir_flags =
- (vector unsigned char)(vector unsigned int){
+ const __vector unsigned char fdir_flags =
+ (__vector unsigned char)(__vector unsigned int){
RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR,
RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR};
- vector unsigned char fdir_id_flags =
- (vector unsigned char)(vector unsigned int){
+ __vector unsigned char fdir_id_flags =
+ (__vector unsigned char)(__vector unsigned int){
RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID,
RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID};
- vector unsigned char flow_tag, invalid_mask;
+ __vector unsigned char flow_tag, invalid_mask;
- flow_tag = (vector unsigned char)
- vec_and((vector unsigned long)pinfo,
- (vector unsigned long)pinfo_ft_mask);
+ flow_tag = (__vector unsigned char)
+ vec_and((__vector unsigned long)pinfo,
+ (__vector unsigned long)pinfo_ft_mask);
/* Check if flow tag is non-zero then set RTE_MBUF_F_RX_FDIR. */
- invalid_mask = (vector unsigned char)
- vec_cmpeq((vector unsigned int)flow_tag,
- (vector unsigned int)zero);
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)
- vec_andc((vector unsigned long)fdir_flags,
- (vector unsigned long)invalid_mask));
+ invalid_mask = (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)flow_tag,
+ (__vector unsigned int)zero);
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)
+ vec_andc((__vector unsigned long)fdir_flags,
+ (__vector unsigned long)invalid_mask));
/* Mask out invalid entries. */
- fdir_id_flags = (vector unsigned char)
- vec_andc((vector unsigned long)fdir_id_flags,
- (vector unsigned long)invalid_mask);
+ fdir_id_flags = (__vector unsigned char)
+ vec_andc((__vector unsigned long)fdir_id_flags,
+ (__vector unsigned long)invalid_mask);
/* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)
- vec_andc((vector unsigned long)fdir_id_flags,
- (vector unsigned long)
- vec_cmpeq((vector unsigned int)flow_tag,
- (vector unsigned int)pinfo_ft_mask)));
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)
+ vec_andc((__vector unsigned long)fdir_id_flags,
+ (__vector unsigned long)
+ vec_cmpeq((__vector unsigned int)flow_tag,
+ (__vector unsigned int)pinfo_ft_mask)));
}
/*
* Merge the two fields to generate the following:
@@ -649,39 +649,39 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
* bit[16] = tunneled
* bit[17] = outer_l3_type
*/
- ptype = (vector unsigned char)
- vec_and((vector unsigned long)ptype,
- (vector unsigned long)ptype_mask);
- pinfo = (vector unsigned char)
- vec_and((vector unsigned long)pinfo,
- (vector unsigned long)pinfo_mask);
- pinfo = (vector unsigned char)
- vec_sl((vector unsigned int)pinfo,
- (vector unsigned int){16, 16, 16, 16});
+ ptype = (__vector unsigned char)
+ vec_and((__vector unsigned long)ptype,
+ (__vector unsigned long)ptype_mask);
+ pinfo = (__vector unsigned char)
+ vec_and((__vector unsigned long)pinfo,
+ (__vector unsigned long)pinfo_mask);
+ pinfo = (__vector unsigned char)
+ vec_sl((__vector unsigned int)pinfo,
+ (__vector unsigned int){16, 16, 16, 16});
/* Make pinfo has merged fields for ol_flags calculation. */
- pinfo = (vector unsigned char)
- vec_or((vector unsigned long)ptype,
- (vector unsigned long)pinfo);
- ptype = (vector unsigned char)
- vec_sr((vector unsigned int)pinfo,
- (vector unsigned int){10, 10, 10, 10});
- ptype = (vector unsigned char)
- vec_packs((vector unsigned int)ptype,
- (vector unsigned int)zero);
+ pinfo = (__vector unsigned char)
+ vec_or((__vector unsigned long)ptype,
+ (__vector unsigned long)pinfo);
+ ptype = (__vector unsigned char)
+ vec_sr((__vector unsigned int)pinfo,
+ (__vector unsigned int){10, 10, 10, 10});
+ ptype = (__vector unsigned char)
+ vec_packs((__vector unsigned int)ptype,
+ (__vector unsigned int)zero);
/* Errored packets will have RTE_PTYPE_ALL_MASK. */
- op_err = (vector unsigned char)
- vec_sr((vector unsigned short)op_err,
- (vector unsigned short){8, 8, 8, 8, 8, 8, 8, 8});
- ptype = (vector unsigned char)
- vec_or((vector unsigned long)ptype,
- (vector unsigned long)op_err);
+ op_err = (__vector unsigned char)
+ vec_sr((__vector unsigned short)op_err,
+ (__vector unsigned short){8, 8, 8, 8, 8, 8, 8, 8});
+ ptype = (__vector unsigned char)
+ vec_or((__vector unsigned long)ptype,
+ (__vector unsigned long)op_err);
- pt_idx0 = (uint8_t)((vector unsigned char)ptype)[0];
- pt_idx1 = (uint8_t)((vector unsigned char)ptype)[2];
- pt_idx2 = (uint8_t)((vector unsigned char)ptype)[4];
- pt_idx3 = (uint8_t)((vector unsigned char)ptype)[6];
+ pt_idx0 = (uint8_t)((__vector unsigned char)ptype)[0];
+ pt_idx1 = (uint8_t)((__vector unsigned char)ptype)[2];
+ pt_idx2 = (uint8_t)((__vector unsigned char)ptype)[4];
+ pt_idx3 = (uint8_t)((__vector unsigned char)ptype)[6];
pkts[0]->packet_type = mlx5_ptype_table[pt_idx0] |
!!(pt_idx0 & (1 << 6)) * rxq->tunnel;
@@ -693,63 +693,63 @@ rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq,
!!(pt_idx3 & (1 << 6)) * rxq->tunnel;
/* Fill flags for checksum and VLAN. */
- pinfo = (vector unsigned char)
- vec_and((vector unsigned long)pinfo,
- (vector unsigned long)ptype_ol_mask);
+ pinfo = (__vector unsigned char)
+ vec_and((__vector unsigned long)pinfo,
+ (__vector unsigned long)ptype_ol_mask);
pinfo = vec_perm(cv_flag_sel, zero, pinfo);
/* Locate checksum flags at byte[2:1] and merge with VLAN flags. */
- cv_flags = (vector unsigned char)
- vec_sl((vector unsigned int)pinfo,
- (vector unsigned int){9, 9, 9, 9});
- cv_flags = (vector unsigned char)
- vec_or((vector unsigned long)pinfo,
- (vector unsigned long)cv_flags);
+ cv_flags = (__vector unsigned char)
+ vec_sl((__vector unsigned int)pinfo,
+ (__vector unsigned int){9, 9, 9, 9});
+ cv_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)pinfo,
+ (__vector unsigned long)cv_flags);
/* Move back flags to start from byte[0]. */
- cv_flags = (vector unsigned char)
- vec_sr((vector unsigned int)cv_flags,
- (vector unsigned int){8, 8, 8, 8});
+ cv_flags = (__vector unsigned char)
+ vec_sr((__vector unsigned int)cv_flags,
+ (__vector unsigned int){8, 8, 8, 8});
/* Mask out garbage bits. */
- cv_flags = (vector unsigned char)
- vec_and((vector unsigned long)cv_flags,
- (vector unsigned long)cv_mask);
+ cv_flags = (__vector unsigned char)
+ vec_and((__vector unsigned long)cv_flags,
+ (__vector unsigned long)cv_mask);
/* Merge to ol_flags. */
- ol_flags = (vector unsigned char)
- vec_or((vector unsigned long)ol_flags,
- (vector unsigned long)cv_flags);
+ ol_flags = (__vector unsigned char)
+ vec_or((__vector unsigned long)ol_flags,
+ (__vector unsigned long)cv_flags);
/* Merge mbuf_init and ol_flags. */
- rearm0 = (vector unsigned char)
- vec_sel((vector unsigned short)mbuf_init,
- (vector unsigned short)
- vec_slo((vector unsigned short)ol_flags,
- (vector unsigned char){64}), rearm_sel_mask);
- rearm1 = (vector unsigned char)
- vec_sel((vector unsigned short)mbuf_init,
- (vector unsigned short)
- vec_slo((vector unsigned short)ol_flags,
- (vector unsigned char){32}), rearm_sel_mask);
- rearm2 = (vector unsigned char)
- vec_sel((vector unsigned short)mbuf_init,
- (vector unsigned short)ol_flags, rearm_sel_mask);
- rearm3 = (vector unsigned char)
- vec_sel((vector unsigned short)mbuf_init,
- (vector unsigned short)
- vec_sro((vector unsigned short)ol_flags,
- (vector unsigned char){32}), rearm_sel_mask);
+ rearm0 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)mbuf_init,
+ (__vector unsigned short)
+ vec_slo((__vector unsigned short)ol_flags,
+ (__vector unsigned char){64}), rearm_sel_mask);
+ rearm1 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)mbuf_init,
+ (__vector unsigned short)
+ vec_slo((__vector unsigned short)ol_flags,
+ (__vector unsigned char){32}), rearm_sel_mask);
+ rearm2 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)mbuf_init,
+ (__vector unsigned short)ol_flags, rearm_sel_mask);
+ rearm3 = (__vector unsigned char)
+ vec_sel((__vector unsigned short)mbuf_init,
+ (__vector unsigned short)
+ vec_sro((__vector unsigned short)ol_flags,
+ (__vector unsigned char){32}), rearm_sel_mask);
/* Write 8B rearm_data and 8B ol_flags. */
vec_vsx_st(rearm0, 0,
- (vector unsigned char *)&pkts[0]->rearm_data);
+ (__vector unsigned char *)&pkts[0]->rearm_data);
vec_vsx_st(rearm1, 0,
- (vector unsigned char *)&pkts[1]->rearm_data);
+ (__vector unsigned char *)&pkts[1]->rearm_data);
vec_vsx_st(rearm2, 0,
- (vector unsigned char *)&pkts[2]->rearm_data);
+ (__vector unsigned char *)&pkts[2]->rearm_data);
vec_vsx_st(rearm3, 0,
- (vector unsigned char *)&pkts[3]->rearm_data);
+ (__vector unsigned char *)&pkts[3]->rearm_data);
}
/**
@@ -788,31 +788,31 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
uint64_t comp_idx = MLX5_VPMD_DESCS_PER_LOOP;
uint16_t nocmp_n = 0;
unsigned int ownership = !!(rxq->cq_ci & (q_mask + 1));
- const vector unsigned char zero = (vector unsigned char){0};
- const vector unsigned char ones = vec_splat_u8(-1);
- const vector unsigned char owner_check =
- (vector unsigned char)(vector unsigned long){
+ const __vector unsigned char zero = (__vector unsigned char){0};
+ const __vector unsigned char ones = vec_splat_u8(-1);
+ const __vector unsigned char owner_check =
+ (__vector unsigned char)(__vector unsigned long){
0x0100000001000000LL, 0x0100000001000000LL};
- const vector unsigned char opcode_check =
- (vector unsigned char)(vector unsigned long){
+ const __vector unsigned char opcode_check =
+ (__vector unsigned char)(__vector unsigned long){
0xf0000000f0000000LL, 0xf0000000f0000000LL};
- const vector unsigned char format_check =
- (vector unsigned char)(vector unsigned long){
+ const __vector unsigned char format_check =
+ (__vector unsigned char)(__vector unsigned long){
0x0c0000000c000000LL, 0x0c0000000c000000LL};
- const vector unsigned char resp_err_check =
- (vector unsigned char)(vector unsigned long){
+ const __vector unsigned char resp_err_check =
+ (__vector unsigned char)(__vector unsigned long){
0xe0000000e0000000LL, 0xe0000000e0000000LL};
#ifdef MLX5_PMD_SOFT_COUNTERS
uint32_t rcvd_byte = 0;
/* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */
- const vector unsigned char len_shuf_mask = (vector unsigned char){
+ const __vector unsigned char len_shuf_mask = (__vector unsigned char){
1, 0, 5, 4,
9, 8, 13, 12,
-1, -1, -1, -1,
-1, -1, -1, -1};
#endif
/* Mask to shuffle from extracted CQE to mbuf. */
- const vector unsigned char shuf_mask = (vector unsigned char){
+ const __vector unsigned char shuf_mask = (__vector unsigned char){
5, 4, /* bswap16, pkt_len */
-1, -1, /* zero out 2nd half of pkt_len */
5, 4, /* bswap16, data_len */
@@ -821,22 +821,22 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
1, 2, 3, -1}; /* fdir.hi */
/* Mask to blend from the last Qword to the first DQword. */
/* Mask to blend from the last Qword to the first DQword. */
- const vector unsigned char blend_mask = (vector unsigned char){
+ const __vector unsigned char blend_mask = (__vector unsigned char){
-1, 0, 0, 0,
0, 0, 0, 0,
-1, -1, -1, -1,
-1, -1, -1, -1};
- const vector unsigned char crc_adj =
- (vector unsigned char)(vector unsigned short){
+ const __vector unsigned char crc_adj =
+ (__vector unsigned char)(__vector unsigned short){
rxq->crc_present * RTE_ETHER_CRC_LEN, 0,
rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0, 0, 0};
- const vector unsigned char flow_mark_adj =
- (vector unsigned char)(vector unsigned int){
+ const __vector unsigned char flow_mark_adj =
+ (__vector unsigned char)(__vector unsigned int){
0, 0, 0, rxq->mark * (-1)};
- const vector unsigned short cqe_sel_mask1 =
- (vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0};
- const vector unsigned short cqe_sel_mask2 =
- (vector unsigned short){0, 0, 0xffff, 0, 0, 0, 0, 0};
+ const __vector unsigned short cqe_sel_mask1 =
+ (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0};
+ const __vector unsigned short cqe_sel_mask2 =
+ (__vector unsigned short){0, 0, 0xffff, 0, 0, 0, 0, 0};
/*
* A. load first Qword (8bytes) in one loop.
@@ -861,30 +861,30 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
for (pos = 0;
pos < pkts_n;
pos += MLX5_VPMD_DESCS_PER_LOOP) {
- vector unsigned char cqes[MLX5_VPMD_DESCS_PER_LOOP];
- vector unsigned char cqe_tmp1, cqe_tmp2;
- vector unsigned char pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3;
- vector unsigned char op_own, op_own_tmp1, op_own_tmp2;
- vector unsigned char opcode, owner_mask, invalid_mask;
- vector unsigned char comp_mask;
- vector unsigned char mask;
+ __vector unsigned char cqes[MLX5_VPMD_DESCS_PER_LOOP];
+ __vector unsigned char cqe_tmp1, cqe_tmp2;
+ __vector unsigned char pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3;
+ __vector unsigned char op_own, op_own_tmp1, op_own_tmp2;
+ __vector unsigned char opcode, owner_mask, invalid_mask;
+ __vector unsigned char comp_mask;
+ __vector unsigned char mask;
#ifdef MLX5_PMD_SOFT_COUNTERS
- const vector unsigned char lower_half = {
+ const __vector unsigned char lower_half = {
0, 1, 4, 5, 8, 9, 12, 13,
16, 17, 20, 21, 24, 25, 28, 29};
- const vector unsigned char upper_half = {
+ const __vector unsigned char upper_half = {
2, 3, 6, 7, 10, 11, 14, 15,
18, 19, 22, 23, 26, 27, 30, 31};
- const vector unsigned long shmax = {64, 64};
- vector unsigned char byte_cnt;
- vector unsigned short left, right;
- vector unsigned long lshift;
- vector __attribute__((altivec(bool__)))
+ const __vector unsigned long shmax = {64, 64};
+ __vector unsigned char byte_cnt;
+ __vector unsigned short left, right;
+ __vector unsigned long lshift;
+ __vector __attribute__((altivec(bool__)))
unsigned long shmask;
#endif
- vector unsigned char mbp1, mbp2;
- vector unsigned char p =
- (vector unsigned char)(vector unsigned short){
+ __vector unsigned char mbp1, mbp2;
+ __vector unsigned char p =
+ (__vector unsigned char)(__vector unsigned short){
0, 1, 2, 3, 0, 0, 0, 0};
unsigned int p1, p2, p3;
@@ -897,295 +897,295 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
}
/* A.0 do not cross the end of CQ. */
- mask = (vector unsigned char)(vector unsigned long){
+ mask = (__vector unsigned char)(__vector unsigned long){
(pkts_n - pos) * sizeof(uint16_t) * 8, 0};
{
- vector unsigned long lshift;
- vector __attribute__((altivec(bool__)))
+ __vector unsigned long lshift;
+ __vector __attribute__((altivec(bool__)))
unsigned long shmask;
- const vector unsigned long shmax = {64, 64};
+ const __vector unsigned long shmax = {64, 64};
- lshift = vec_splat((vector unsigned long)mask, 0);
+ lshift = vec_splat((__vector unsigned long)mask, 0);
shmask = vec_cmpgt(shmax, lshift);
- mask = (vector unsigned char)
- vec_sl((vector unsigned long)ones, lshift);
- mask = (vector unsigned char)
- vec_sel((vector unsigned long)shmask,
- (vector unsigned long)mask, shmask);
+ mask = (__vector unsigned char)
+ vec_sl((__vector unsigned long)ones, lshift);
+ mask = (__vector unsigned char)
+ vec_sel((__vector unsigned long)shmask,
+ (__vector unsigned long)mask, shmask);
}
- p = (vector unsigned char)
- vec_andc((vector unsigned long)p,
- (vector unsigned long)mask);
+ p = (__vector unsigned char)
+ vec_andc((__vector unsigned long)p,
+ (__vector unsigned long)mask);
/* A.1 load cqes. */
- p3 = (unsigned int)((vector unsigned short)p)[3];
- cqes[3] = (vector unsigned char)(vector unsigned long){
+ p3 = (unsigned int)((__vector unsigned short)p)[3];
+ cqes[3] = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos + p3].sop_drop_qpn, 0LL};
rte_compiler_barrier();
- p2 = (unsigned int)((vector unsigned short)p)[2];
- cqes[2] = (vector unsigned char)(vector unsigned long){
+ p2 = (unsigned int)((__vector unsigned short)p)[2];
+ cqes[2] = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos + p2].sop_drop_qpn, 0LL};
rte_compiler_barrier();
/* B.1 load mbuf pointers. */
- mbp1 = (vector unsigned char)vec_vsx_ld(0,
+ mbp1 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&elts[pos]);
- mbp2 = (vector unsigned char)vec_vsx_ld(0,
+ mbp2 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&elts[pos + 2]);
/* A.1 load a block having op_own. */
- p1 = (unsigned int)((vector unsigned short)p)[1];
- cqes[1] = (vector unsigned char)(vector unsigned long){
+ p1 = (unsigned int)((__vector unsigned short)p)[1];
+ cqes[1] = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos + p1].sop_drop_qpn, 0LL};
rte_compiler_barrier();
- cqes[0] = (vector unsigned char)(vector unsigned long){
+ cqes[0] = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos].sop_drop_qpn, 0LL};
rte_compiler_barrier();
/* B.2 copy mbuf pointers. */
- *(vector unsigned char *)&pkts[pos] = mbp1;
- *(vector unsigned char *)&pkts[pos + 2] = mbp2;
+ *(__vector unsigned char *)&pkts[pos] = mbp1;
+ *(__vector unsigned char *)&pkts[pos + 2] = mbp2;
rte_io_rmb();
/* C.1 load remaining CQE data and extract necessary fields. */
- cqe_tmp2 = *(vector unsigned char *)
+ cqe_tmp2 = *(__vector unsigned char *)
&cq[pos + p3].pkt_info;
- cqe_tmp1 = *(vector unsigned char *)
+ cqe_tmp1 = *(__vector unsigned char *)
&cq[pos + p2].pkt_info;
cqes[3] = vec_sel(cqes[3], cqe_tmp2, blend_mask);
cqes[2] = vec_sel(cqes[2], cqe_tmp1, blend_mask);
- cqe_tmp2 = (vector unsigned char)vec_vsx_ld(0,
+ cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&cq[pos + p3].csum);
- cqe_tmp1 = (vector unsigned char)vec_vsx_ld(0,
+ cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&cq[pos + p2].csum);
- cqes[3] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[3],
- (vector unsigned short)cqe_tmp2, cqe_sel_mask1);
- cqes[2] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[2],
- (vector unsigned short)cqe_tmp1, cqe_sel_mask1);
- cqe_tmp2 = (vector unsigned char)(vector unsigned long){
+ cqes[3] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[3],
+ (__vector unsigned short)cqe_tmp2, cqe_sel_mask1);
+ cqes[2] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[2],
+ (__vector unsigned short)cqe_tmp1, cqe_sel_mask1);
+ cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos + p3].rsvd4[2], 0LL};
- cqe_tmp1 = (vector unsigned char)(vector unsigned long){
+ cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos + p2].rsvd4[2], 0LL};
- cqes[3] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[3],
- (vector unsigned short)cqe_tmp2,
- (vector unsigned short)cqe_sel_mask2);
- cqes[2] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[2],
- (vector unsigned short)cqe_tmp1,
- (vector unsigned short)cqe_sel_mask2);
+ cqes[3] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[3],
+ (__vector unsigned short)cqe_tmp2,
+ (__vector unsigned short)cqe_sel_mask2);
+ cqes[2] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[2],
+ (__vector unsigned short)cqe_tmp1,
+ (__vector unsigned short)cqe_sel_mask2);
/* C.2 generate final structure for mbuf with swapping bytes. */
pkt_mb3 = vec_perm(cqes[3], zero, shuf_mask);
pkt_mb2 = vec_perm(cqes[2], zero, shuf_mask);
/* C.3 adjust CRC length. */
- pkt_mb3 = (vector unsigned char)
- ((vector unsigned short)pkt_mb3 -
- (vector unsigned short)crc_adj);
- pkt_mb2 = (vector unsigned char)
- ((vector unsigned short)pkt_mb2 -
- (vector unsigned short)crc_adj);
+ pkt_mb3 = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb3 -
+ (__vector unsigned short)crc_adj);
+ pkt_mb2 = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb2 -
+ (__vector unsigned short)crc_adj);
/* C.4 adjust flow mark. */
- pkt_mb3 = (vector unsigned char)
- ((vector unsigned int)pkt_mb3 +
- (vector unsigned int)flow_mark_adj);
- pkt_mb2 = (vector unsigned char)
- ((vector unsigned int)pkt_mb2 +
- (vector unsigned int)flow_mark_adj);
+ pkt_mb3 = (__vector unsigned char)
+ ((__vector unsigned int)pkt_mb3 +
+ (__vector unsigned int)flow_mark_adj);
+ pkt_mb2 = (__vector unsigned char)
+ ((__vector unsigned int)pkt_mb2 +
+ (__vector unsigned int)flow_mark_adj);
/* D.1 fill in mbuf - rx_descriptor_fields1. */
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&pkts[pos + 3]->pkt_len = pkt_mb3;
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&pkts[pos + 2]->pkt_len = pkt_mb2;
/* E.1 extract op_own field. */
- op_own_tmp2 = (vector unsigned char)
- vec_mergeh((vector unsigned int)cqes[2],
- (vector unsigned int)cqes[3]);
+ op_own_tmp2 = (__vector unsigned char)
+ vec_mergeh((__vector unsigned int)cqes[2],
+ (__vector unsigned int)cqes[3]);
/* C.1 load remaining CQE data and extract necessary fields. */
- cqe_tmp2 = *(vector unsigned char *)
+ cqe_tmp2 = *(__vector unsigned char *)
&cq[pos + p1].pkt_info;
- cqe_tmp1 = *(vector unsigned char *)
+ cqe_tmp1 = *(__vector unsigned char *)
&cq[pos].pkt_info;
cqes[1] = vec_sel(cqes[1], cqe_tmp2, blend_mask);
cqes[0] = vec_sel(cqes[0], cqe_tmp2, blend_mask);
- cqe_tmp2 = (vector unsigned char)vec_vsx_ld(0,
+ cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&cq[pos + p1].csum);
- cqe_tmp1 = (vector unsigned char)vec_vsx_ld(0,
+ cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0,
(signed int const *)&cq[pos].csum);
- cqes[1] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[1],
- (vector unsigned short)cqe_tmp2, cqe_sel_mask1);
- cqes[0] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[0],
- (vector unsigned short)cqe_tmp1, cqe_sel_mask1);
- cqe_tmp2 = (vector unsigned char)(vector unsigned long){
+ cqes[1] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[1],
+ (__vector unsigned short)cqe_tmp2, cqe_sel_mask1);
+ cqes[0] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[0],
+ (__vector unsigned short)cqe_tmp1, cqe_sel_mask1);
+ cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos + p1].rsvd4[2], 0LL};
- cqe_tmp1 = (vector unsigned char)(vector unsigned long){
+ cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){
*(__rte_aligned(8) unsigned long *)
&cq[pos].rsvd4[2], 0LL};
- cqes[1] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[1],
- (vector unsigned short)cqe_tmp2, cqe_sel_mask2);
- cqes[0] = (vector unsigned char)
- vec_sel((vector unsigned short)cqes[0],
- (vector unsigned short)cqe_tmp1, cqe_sel_mask2);
+ cqes[1] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[1],
+ (__vector unsigned short)cqe_tmp2, cqe_sel_mask2);
+ cqes[0] = (__vector unsigned char)
+ vec_sel((__vector unsigned short)cqes[0],
+ (__vector unsigned short)cqe_tmp1, cqe_sel_mask2);
/* C.2 generate final structure for mbuf with swapping bytes. */
pkt_mb1 = vec_perm(cqes[1], zero, shuf_mask);
pkt_mb0 = vec_perm(cqes[0], zero, shuf_mask);
/* C.3 adjust CRC length. */
- pkt_mb1 = (vector unsigned char)
- ((vector unsigned short)pkt_mb1 -
- (vector unsigned short)crc_adj);
- pkt_mb0 = (vector unsigned char)
- ((vector unsigned short)pkt_mb0 -
- (vector unsigned short)crc_adj);
+ pkt_mb1 = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb1 -
+ (__vector unsigned short)crc_adj);
+ pkt_mb0 = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb0 -
+ (__vector unsigned short)crc_adj);
/* C.4 adjust flow mark. */
- pkt_mb1 = (vector unsigned char)
- ((vector unsigned int)pkt_mb1 +
- (vector unsigned int)flow_mark_adj);
- pkt_mb0 = (vector unsigned char)
- ((vector unsigned int)pkt_mb0 +
- (vector unsigned int)flow_mark_adj);
+ pkt_mb1 = (__vector unsigned char)
+ ((__vector unsigned int)pkt_mb1 +
+ (__vector unsigned int)flow_mark_adj);
+ pkt_mb0 = (__vector unsigned char)
+ ((__vector unsigned int)pkt_mb0 +
+ (__vector unsigned int)flow_mark_adj);
/* E.1 extract op_own byte. */
- op_own_tmp1 = (vector unsigned char)
- vec_mergeh((vector unsigned int)cqes[0],
- (vector unsigned int)cqes[1]);
- op_own = (vector unsigned char)
- vec_mergel((vector unsigned long)op_own_tmp1,
- (vector unsigned long)op_own_tmp2);
+ op_own_tmp1 = (__vector unsigned char)
+ vec_mergeh((__vector unsigned int)cqes[0],
+ (__vector unsigned int)cqes[1]);
+ op_own = (__vector unsigned char)
+ vec_mergel((__vector unsigned long)op_own_tmp1,
+ (__vector unsigned long)op_own_tmp2);
/* D.1 fill in mbuf - rx_descriptor_fields1. */
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&pkts[pos + 1]->pkt_len = pkt_mb1;
- *(vector unsigned char *)
+ *(__vector unsigned char *)
&pkts[pos]->pkt_len = pkt_mb0;
/* E.2 flip owner bit to mark CQEs from last round. */
- owner_mask = (vector unsigned char)
- vec_and((vector unsigned long)op_own,
- (vector unsigned long)owner_check);
+ owner_mask = (__vector unsigned char)
+ vec_and((__vector unsigned long)op_own,
+ (__vector unsigned long)owner_check);
if (ownership)
- owner_mask = (vector unsigned char)
- vec_xor((vector unsigned long)owner_mask,
- (vector unsigned long)owner_check);
- owner_mask = (vector unsigned char)
- vec_cmpeq((vector unsigned int)owner_mask,
- (vector unsigned int)owner_check);
- owner_mask = (vector unsigned char)
- vec_packs((vector unsigned int)owner_mask,
- (vector unsigned int)zero);
+ owner_mask = (__vector unsigned char)
+ vec_xor((__vector unsigned long)owner_mask,
+ (__vector unsigned long)owner_check);
+ owner_mask = (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)owner_mask,
+ (__vector unsigned int)owner_check);
+ owner_mask = (__vector unsigned char)
+ vec_packs((__vector unsigned int)owner_mask,
+ (__vector unsigned int)zero);
/* E.3 get mask for invalidated CQEs. */
- opcode = (vector unsigned char)
- vec_and((vector unsigned long)op_own,
- (vector unsigned long)opcode_check);
- invalid_mask = (vector unsigned char)
- vec_cmpeq((vector unsigned int)opcode_check,
- (vector unsigned int)opcode);
- invalid_mask = (vector unsigned char)
- vec_packs((vector unsigned int)invalid_mask,
- (vector unsigned int)zero);
+ opcode = (__vector unsigned char)
+ vec_and((__vector unsigned long)op_own,
+ (__vector unsigned long)opcode_check);
+ invalid_mask = (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)opcode_check,
+ (__vector unsigned int)opcode);
+ invalid_mask = (__vector unsigned char)
+ vec_packs((__vector unsigned int)invalid_mask,
+ (__vector unsigned int)zero);
/* E.4 mask out beyond boundary. */
- invalid_mask = (vector unsigned char)
- vec_or((vector unsigned long)invalid_mask,
- (vector unsigned long)mask);
+ invalid_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)invalid_mask,
+ (__vector unsigned long)mask);
/* E.5 merge invalid_mask with invalid owner. */
- invalid_mask = (vector unsigned char)
- vec_or((vector unsigned long)invalid_mask,
- (vector unsigned long)owner_mask);
+ invalid_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)invalid_mask,
+ (__vector unsigned long)owner_mask);
/* F.1 find compressed CQE format. */
- comp_mask = (vector unsigned char)
- vec_and((vector unsigned long)op_own,
- (vector unsigned long)format_check);
- comp_mask = (vector unsigned char)
- vec_cmpeq((vector unsigned int)comp_mask,
- (vector unsigned int)format_check);
- comp_mask = (vector unsigned char)
- vec_packs((vector unsigned int)comp_mask,
- (vector unsigned int)zero);
+ comp_mask = (__vector unsigned char)
+ vec_and((__vector unsigned long)op_own,
+ (__vector unsigned long)format_check);
+ comp_mask = (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)comp_mask,
+ (__vector unsigned int)format_check);
+ comp_mask = (__vector unsigned char)
+ vec_packs((__vector unsigned int)comp_mask,
+ (__vector unsigned int)zero);
/* F.2 mask out invalid entries. */
- comp_mask = (vector unsigned char)
- vec_andc((vector unsigned long)comp_mask,
- (vector unsigned long)invalid_mask);
- comp_idx = ((vector unsigned long)comp_mask)[0];
+ comp_mask = (__vector unsigned char)
+ vec_andc((__vector unsigned long)comp_mask,
+ (__vector unsigned long)invalid_mask);
+ comp_idx = ((__vector unsigned long)comp_mask)[0];
/* F.3 get the first compressed CQE. */
comp_idx = comp_idx ? __builtin_ctzll(comp_idx) /
(sizeof(uint16_t) * 8) : MLX5_VPMD_DESCS_PER_LOOP;
/* E.6 mask out entries after the compressed CQE. */
- mask = (vector unsigned char)(vector unsigned long){
+ mask = (__vector unsigned char)(__vector unsigned long){
(comp_idx * sizeof(uint16_t) * 8), 0};
- lshift = vec_splat((vector unsigned long)mask, 0);
+ lshift = vec_splat((__vector unsigned long)mask, 0);
shmask = vec_cmpgt(shmax, lshift);
- mask = (vector unsigned char)
- vec_sl((vector unsigned long)ones, lshift);
- mask = (vector unsigned char)
- vec_sel((vector unsigned long)shmask,
- (vector unsigned long)mask, shmask);
- invalid_mask = (vector unsigned char)
- vec_or((vector unsigned long)invalid_mask,
- (vector unsigned long)mask);
+ mask = (__vector unsigned char)
+ vec_sl((__vector unsigned long)ones, lshift);
+ mask = (__vector unsigned char)
+ vec_sel((__vector unsigned long)shmask,
+ (__vector unsigned long)mask, shmask);
+ invalid_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)invalid_mask,
+ (__vector unsigned long)mask);
/* E.7 count non-compressed valid CQEs. */
- n = ((vector unsigned long)invalid_mask)[0];
+ n = ((__vector unsigned long)invalid_mask)[0];
n = n ? __builtin_ctzll(n) / (sizeof(uint16_t) * 8) :
MLX5_VPMD_DESCS_PER_LOOP;
nocmp_n += n;
/* D.2 get the final invalid mask. */
- mask = (vector unsigned char)(vector unsigned long){
+ mask = (__vector unsigned char)(__vector unsigned long){
(n * sizeof(uint16_t) * 8), 0};
- lshift = vec_splat((vector unsigned long)mask, 0);
+ lshift = vec_splat((__vector unsigned long)mask, 0);
shmask = vec_cmpgt(shmax, lshift);
- mask = (vector unsigned char)
- vec_sl((vector unsigned long)ones, lshift);
- mask = (vector unsigned char)
- vec_sel((vector unsigned long)shmask,
- (vector unsigned long)mask, shmask);
- invalid_mask = (vector unsigned char)
- vec_or((vector unsigned long)invalid_mask,
- (vector unsigned long)mask);
+ mask = (__vector unsigned char)
+ vec_sl((__vector unsigned long)ones, lshift);
+ mask = (__vector unsigned char)
+ vec_sel((__vector unsigned long)shmask,
+ (__vector unsigned long)mask, shmask);
+ invalid_mask = (__vector unsigned char)
+ vec_or((__vector unsigned long)invalid_mask,
+ (__vector unsigned long)mask);
/* D.3 check error in opcode. */
- opcode = (vector unsigned char)
- vec_cmpeq((vector unsigned int)resp_err_check,
- (vector unsigned int)opcode);
- opcode = (vector unsigned char)
- vec_packs((vector unsigned int)opcode,
- (vector unsigned int)zero);
- opcode = (vector unsigned char)
- vec_andc((vector unsigned long)opcode,
- (vector unsigned long)invalid_mask);
+ opcode = (__vector unsigned char)
+ vec_cmpeq((__vector unsigned int)resp_err_check,
+ (__vector unsigned int)opcode);
+ opcode = (__vector unsigned char)
+ vec_packs((__vector unsigned int)opcode,
+ (__vector unsigned int)zero);
+ opcode = (__vector unsigned char)
+ vec_andc((__vector unsigned long)opcode,
+ (__vector unsigned long)invalid_mask);
/* D.4 mark if any error is set */
- *err |= ((vector unsigned long)opcode)[0];
+ *err |= ((__vector unsigned long)opcode)[0];
/* D.5 fill in mbuf - rearm_data and packet_type. */
rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
@@ -1255,20 +1255,20 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
#ifdef MLX5_PMD_SOFT_COUNTERS
/* Add up received bytes count. */
byte_cnt = vec_perm(op_own, zero, len_shuf_mask);
- byte_cnt = (vector unsigned char)
- vec_andc((vector unsigned long)byte_cnt,
- (vector unsigned long)invalid_mask);
- left = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, lower_half);
- right = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, upper_half);
- byte_cnt = (vector unsigned char)vec_add(left, right);
- left = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, lower_half);
- right = vec_perm((vector unsigned short)byte_cnt,
- (vector unsigned short)zero, upper_half);
- byte_cnt = (vector unsigned char)vec_add(left, right);
- rcvd_byte += ((vector unsigned long)byte_cnt)[0];
+ byte_cnt = (__vector unsigned char)
+ vec_andc((__vector unsigned long)byte_cnt,
+ (__vector unsigned long)invalid_mask);
+ left = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, lower_half);
+ right = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, upper_half);
+ byte_cnt = (__vector unsigned char)vec_add(left, right);
+ left = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, lower_half);
+ right = vec_perm((__vector unsigned short)byte_cnt,
+ (__vector unsigned short)zero, upper_half);
+ byte_cnt = (__vector unsigned char)vec_add(left, right);
+ rcvd_byte += ((__vector unsigned long)byte_cnt)[0];
#endif
/*
diff --git a/drivers/net/virtio/virtio_rxtx_simple_altivec.c b/drivers/net/virtio/virtio_rxtx_simple_altivec.c
index 7534974ef4..e7f0ed6068 100644
--- a/drivers/net/virtio/virtio_rxtx_simple_altivec.c
+++ b/drivers/net/virtio/virtio_rxtx_simple_altivec.c
@@ -50,9 +50,9 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
struct rte_mbuf **sw_ring_end;
struct rte_mbuf **ref_rx_pkts;
uint16_t nb_pkts_received = 0;
- const vector unsigned char zero = {0};
+ const __vector unsigned char zero = {0};
- const vector unsigned char shuf_msk1 = {
+ const __vector unsigned char shuf_msk1 = {
0xFF, 0xFF, 0xFF, 0xFF, /* packet type */
4, 5, 0xFF, 0xFF, /* vlan tci */
4, 5, /* dat len */
@@ -60,7 +60,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
0xFF, 0xFF, 0xFF, 0xFF
};
- const vector unsigned char shuf_msk2 = {
+ const __vector unsigned char shuf_msk2 = {
0xFF, 0xFF, 0xFF, 0xFF, /* packet type */
12, 13, 0xFF, 0xFF, /* pkt len */
12, 13, /* dat len */
@@ -72,7 +72,7 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
* Subtract the header length.
* In which case do we need the header length in used->len ?
*/
- const vector unsigned short len_adjust = {
+ const __vector unsigned short len_adjust = {
0, 0,
(uint16_t)-vq->hw->vtnet_hdr_size, 0,
(uint16_t)-vq->hw->vtnet_hdr_size, 0,
@@ -112,68 +112,68 @@ virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
ref_rx_pkts = rx_pkts;
for (nb_pkts_received = 0;
nb_pkts_received < nb_total;) {
- vector unsigned char desc[RTE_VIRTIO_DESC_PER_LOOP / 2];
- vector unsigned char mbp[RTE_VIRTIO_DESC_PER_LOOP / 2];
- vector unsigned char pkt_mb[RTE_VIRTIO_DESC_PER_LOOP];
+ __vector unsigned char desc[RTE_VIRTIO_DESC_PER_LOOP / 2];
+ __vector unsigned char mbp[RTE_VIRTIO_DESC_PER_LOOP / 2];
+ __vector unsigned char pkt_mb[RTE_VIRTIO_DESC_PER_LOOP];
mbp[0] = vec_vsx_ld(0, (unsigned char const *)(sw_ring + 0));
desc[0] = vec_vsx_ld(0, (unsigned char const *)(rused + 0));
- *(vector unsigned char *)&rx_pkts[0] = mbp[0];
+ *(__vector unsigned char *)&rx_pkts[0] = mbp[0];
mbp[1] = vec_vsx_ld(0, (unsigned char const *)(sw_ring + 2));
desc[1] = vec_vsx_ld(0, (unsigned char const *)(rused + 2));
- *(vector unsigned char *)&rx_pkts[2] = mbp[1];
+ *(__vector unsigned char *)&rx_pkts[2] = mbp[1];
mbp[2] = vec_vsx_ld(0, (unsigned char const *)(sw_ring + 4));
desc[2] = vec_vsx_ld(0, (unsigned char const *)(rused + 4));
- *(vector unsigned char *)&rx_pkts[4] = mbp[2];
+ *(__vector unsigned char *)&rx_pkts[4] = mbp[2];
mbp[3] = vec_vsx_ld(0, (unsigned char const *)(sw_ring + 6));
desc[3] = vec_vsx_ld(0, (unsigned char const *)(rused + 6));
- *(vector unsigned char *)&rx_pkts[6] = mbp[3];
+ *(__vector unsigned char *)&rx_pkts[6] = mbp[3];
pkt_mb[0] = vec_perm(desc[0], zero, shuf_msk1);
pkt_mb[1] = vec_perm(desc[0], zero, shuf_msk2);
- pkt_mb[0] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[0] + len_adjust);
- pkt_mb[1] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[1] + len_adjust);
- *(vector unsigned char *)&rx_pkts[0]->rx_descriptor_fields1 =
+ pkt_mb[0] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[0] + len_adjust);
+ pkt_mb[1] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[1] + len_adjust);
+ *(__vector unsigned char *)&rx_pkts[0]->rx_descriptor_fields1 =
pkt_mb[0];
- *(vector unsigned char *)&rx_pkts[1]->rx_descriptor_fields1 =
+ *(__vector unsigned char *)&rx_pkts[1]->rx_descriptor_fields1 =
pkt_mb[1];
pkt_mb[2] = vec_perm(desc[1], zero, shuf_msk1);
pkt_mb[3] = vec_perm(desc[1], zero, shuf_msk2);
- pkt_mb[2] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[2] + len_adjust);
- pkt_mb[3] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[3] + len_adjust);
- *(vector unsigned char *)&rx_pkts[2]->rx_descriptor_fields1 =
+ pkt_mb[2] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[2] + len_adjust);
+ pkt_mb[3] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[3] + len_adjust);
+ *(__vector unsigned char *)&rx_pkts[2]->rx_descriptor_fields1 =
pkt_mb[2];
- *(vector unsigned char *)&rx_pkts[3]->rx_descriptor_fields1 =
+ *(__vector unsigned char *)&rx_pkts[3]->rx_descriptor_fields1 =
pkt_mb[3];
pkt_mb[4] = vec_perm(desc[2], zero, shuf_msk1);
pkt_mb[5] = vec_perm(desc[2], zero, shuf_msk2);
- pkt_mb[4] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[4] + len_adjust);
- pkt_mb[5] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[5] + len_adjust);
- *(vector unsigned char *)&rx_pkts[4]->rx_descriptor_fields1 =
+ pkt_mb[4] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[4] + len_adjust);
+ pkt_mb[5] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[5] + len_adjust);
+ *(__vector unsigned char *)&rx_pkts[4]->rx_descriptor_fields1 =
pkt_mb[4];
- *(vector unsigned char *)&rx_pkts[5]->rx_descriptor_fields1 =
+ *(__vector unsigned char *)&rx_pkts[5]->rx_descriptor_fields1 =
pkt_mb[5];
pkt_mb[6] = vec_perm(desc[3], zero, shuf_msk1);
pkt_mb[7] = vec_perm(desc[3], zero, shuf_msk2);
- pkt_mb[6] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[6] + len_adjust);
- pkt_mb[7] = (vector unsigned char)
- ((vector unsigned short)pkt_mb[7] + len_adjust);
- *(vector unsigned char *)&rx_pkts[6]->rx_descriptor_fields1 =
+ pkt_mb[6] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[6] + len_adjust);
+ pkt_mb[7] = (__vector unsigned char)
+ ((__vector unsigned short)pkt_mb[7] + len_adjust);
+ *(__vector unsigned char *)&rx_pkts[6]->rx_descriptor_fields1 =
pkt_mb[6];
- *(vector unsigned char *)&rx_pkts[7]->rx_descriptor_fields1 =
+ *(__vector unsigned char *)&rx_pkts[7]->rx_descriptor_fields1 =
pkt_mb[7];
if (unlikely(nb_used <= RTE_VIRTIO_DESC_PER_LOOP)) {
diff --git a/examples/l3fwd/l3fwd_altivec.h b/examples/l3fwd/l3fwd_altivec.h
index ed9b0b8f25..88fb41843b 100644
--- a/examples/l3fwd/l3fwd_altivec.h
+++ b/examples/l3fwd/l3fwd_altivec.h
@@ -17,50 +17,50 @@
static inline void
processx4_step3(struct rte_mbuf *pkt[FWDSTEP], uint16_t dst_port[FWDSTEP])
{
- vector unsigned int te[FWDSTEP];
- vector unsigned int ve[FWDSTEP];
- vector unsigned int *p[FWDSTEP];
+ __vector unsigned int te[FWDSTEP];
+ __vector unsigned int ve[FWDSTEP];
+ __vector unsigned int *p[FWDSTEP];
- p[0] = rte_pktmbuf_mtod(pkt[0], vector unsigned int *);
- p[1] = rte_pktmbuf_mtod(pkt[1], vector unsigned int *);
- p[2] = rte_pktmbuf_mtod(pkt[2], vector unsigned int *);
- p[3] = rte_pktmbuf_mtod(pkt[3], vector unsigned int *);
+ p[0] = rte_pktmbuf_mtod(pkt[0], __vector unsigned int *);
+ p[1] = rte_pktmbuf_mtod(pkt[1], __vector unsigned int *);
+ p[2] = rte_pktmbuf_mtod(pkt[2], __vector unsigned int *);
+ p[3] = rte_pktmbuf_mtod(pkt[3], __vector unsigned int *);
- ve[0] = (vector unsigned int)val_eth[dst_port[0]];
+ ve[0] = (__vector unsigned int)val_eth[dst_port[0]];
te[0] = *p[0];
- ve[1] = (vector unsigned int)val_eth[dst_port[1]];
+ ve[1] = (__vector unsigned int)val_eth[dst_port[1]];
te[1] = *p[1];
- ve[2] = (vector unsigned int)val_eth[dst_port[2]];
+ ve[2] = (__vector unsigned int)val_eth[dst_port[2]];
te[2] = *p[2];
- ve[3] = (vector unsigned int)val_eth[dst_port[3]];
+ ve[3] = (__vector unsigned int)val_eth[dst_port[3]];
te[3] = *p[3];
/* Update first 12 bytes, keep rest bytes intact. */
- te[0] = (vector unsigned int)vec_sel(
- (vector unsigned short)ve[0],
- (vector unsigned short)te[0],
- (vector unsigned short) {0, 0, 0, 0,
+ te[0] = (__vector unsigned int)vec_sel(
+ (__vector unsigned short)ve[0],
+ (__vector unsigned short)te[0],
+ (__vector unsigned short) {0, 0, 0, 0,
0, 0, 0xffff, 0xffff});
- te[1] = (vector unsigned int)vec_sel(
- (vector unsigned short)ve[1],
- (vector unsigned short)te[1],
- (vector unsigned short) {0, 0, 0, 0,
+ te[1] = (__vector unsigned int)vec_sel(
+ (__vector unsigned short)ve[1],
+ (__vector unsigned short)te[1],
+ (__vector unsigned short) {0, 0, 0, 0,
0, 0, 0xffff, 0xffff});
- te[2] = (vector unsigned int)vec_sel(
- (vector unsigned short)ve[2],
- (vector unsigned short)te[2],
- (vector unsigned short) {0, 0, 0, 0, 0,
+ te[2] = (__vector unsigned int)vec_sel(
+ (__vector unsigned short)ve[2],
+ (__vector unsigned short)te[2],
+ (__vector unsigned short) {0, 0, 0, 0, 0,
0, 0xffff, 0xffff});
- te[3] = (vector unsigned int)vec_sel(
- (vector unsigned short)ve[3],
- (vector unsigned short)te[3],
- (vector unsigned short) {0, 0, 0, 0,
+ te[3] = (__vector unsigned int)vec_sel(
+ (__vector unsigned short)ve[3],
+ (__vector unsigned short)te[3],
+ (__vector unsigned short) {0, 0, 0, 0,
0, 0, 0xffff, 0xffff});
*p[0] = te[0];
@@ -91,8 +91,9 @@ processx4_step3(struct rte_mbuf *pkt[FWDSTEP], uint16_t dst_port[FWDSTEP])
* This mask is used as an index into prebuild array of pnum values.
*/
static inline uint16_t *
-port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *lp, vector unsigned short dp1,
- vector unsigned short dp2)
+port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *lp,
+ __vector unsigned short dp1,
+ __vector unsigned short dp2)
{
union {
uint16_t u16[FWDSTEP + 1];
@@ -126,24 +127,24 @@ static inline void
process_packet(struct rte_mbuf *pkt, uint16_t *dst_port)
{
struct rte_ether_hdr *eth_hdr;
- vector unsigned int te, ve;
+ __vector unsigned int te, ve;
eth_hdr = rte_pktmbuf_mtod(pkt, struct rte_ether_hdr *);
- te = *(vector unsigned int *)eth_hdr;
- ve = (vector unsigned int)val_eth[dst_port[0]];
+ te = *(__vector unsigned int *)eth_hdr;
+ ve = (__vector unsigned int)val_eth[dst_port[0]];
rfc1812_process((struct rte_ipv4_hdr *)(eth_hdr + 1), dst_port,
pkt->packet_type);
/* dynamically vec_sel te and ve for MASK_ETH (0x3f) */
- te = (vector unsigned int)vec_sel(
- (vector unsigned short)ve,
- (vector unsigned short)te,
- (vector unsigned short){0, 0, 0, 0,
+ te = (__vector unsigned int)vec_sel(
+ (__vector unsigned short)ve,
+ (__vector unsigned short)te,
+ (__vector unsigned short){0, 0, 0, 0,
0, 0, 0xffff, 0xffff});
- *(vector unsigned int *)eth_hdr = te;
+ *(__vector unsigned int *)eth_hdr = te;
}
/**
@@ -165,7 +166,7 @@ send_packets_multi(struct lcore_conf *qconf, struct rte_mbuf **pkts_burst,
*/
k = RTE_ALIGN_FLOOR(nb_rx, FWDSTEP);
if (k != 0) {
- vector unsigned short dp1, dp2;
+ __vector unsigned short dp1, dp2;
lp = pnum;
lp[0] = 1;
@@ -173,7 +174,7 @@ send_packets_multi(struct lcore_conf *qconf, struct rte_mbuf **pkts_burst,
processx4_step3(pkts_burst, dst_port);
/* dp1: <d[0], d[1], d[2], d[3], ... > */
- dp1 = *(vector unsigned short *)dst_port;
+ dp1 = *(__vector unsigned short *)dst_port;
for (j = FWDSTEP; j != k; j += FWDSTEP) {
processx4_step3(&pkts_burst[j], &dst_port[j]);
@@ -182,7 +183,7 @@ send_packets_multi(struct lcore_conf *qconf, struct rte_mbuf **pkts_burst,
* dp2:
* <d[j-3], d[j-2], d[j-1], d[j], ... >
*/
- dp2 = *((vector unsigned short *)
+ dp2 = *((__vector unsigned short *)
&dst_port[j - FWDSTEP + 1]);
lp = port_groupx4(&pnum[j - FWDSTEP], lp, dp1, dp2);
@@ -190,7 +191,7 @@ send_packets_multi(struct lcore_conf *qconf, struct rte_mbuf **pkts_burst,
* dp1:
* <d[j], d[j+1], d[j+2], d[j+3], ... >
*/
- dp1 = vec_sro(dp2, (vector unsigned char) {
+ dp1 = vec_sro(dp2, (__vector unsigned char) {
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, (FWDSTEP - 1) * sizeof(dst_port[0])});
}
@@ -198,8 +199,8 @@ send_packets_multi(struct lcore_conf *qconf, struct rte_mbuf **pkts_burst,
/*
* dp2: <d[j-3], d[j-2], d[j-1], d[j-1], ... >
*/
- dp2 = vec_perm(dp1, (vector unsigned short){},
- (vector unsigned char){0xf9});
+ dp2 = vec_perm(dp1, (__vector unsigned short){},
+ (__vector unsigned char){0xf9});
lp = port_groupx4(&pnum[j - FWDSTEP], lp, dp1, dp2);
/*
diff --git a/examples/l3fwd/l3fwd_lpm_altivec.h b/examples/l3fwd/l3fwd_lpm_altivec.h
index 7c6814252a..0c6852a7bb 100644
--- a/examples/l3fwd/l3fwd_lpm_altivec.h
+++ b/examples/l3fwd/l3fwd_lpm_altivec.h
@@ -14,7 +14,7 @@
*/
static inline void
processx4_step1(struct rte_mbuf *pkt[FWDSTEP],
- vector unsigned int *dip,
+ __vector unsigned int *dip,
uint32_t *ipv4_flag)
{
struct rte_ipv4_hdr *ipv4_hdr;
@@ -45,7 +45,7 @@ processx4_step1(struct rte_mbuf *pkt[FWDSTEP],
ipv4_flag[0] &= pkt[3]->packet_type;
rte_compiler_barrier();
- dip[0] = (vector unsigned int){x0, x1, x2, x3};
+ dip[0] = (__vector unsigned int){x0, x1, x2, x3};
}
/*
@@ -54,22 +54,22 @@ processx4_step1(struct rte_mbuf *pkt[FWDSTEP],
*/
static inline void
processx4_step2(const struct lcore_conf *qconf,
- vector unsigned int dip,
+ __vector unsigned int dip,
uint32_t ipv4_flag,
uint8_t portid,
struct rte_mbuf *pkt[FWDSTEP],
uint16_t dprt[FWDSTEP])
{
rte_xmm_t dst;
- const vector unsigned char bswap_mask = (vector unsigned char){
+ const __vector unsigned char bswap_mask = (__vector unsigned char){
3, 2, 1, 0,
7, 6, 5, 4,
11, 10, 9, 8,
15, 14, 13, 12};
/* Byte swap 4 IPV4 addresses. */
- dip = (vector unsigned int)vec_perm(*(vector unsigned char *)&dip,
- (vector unsigned char){}, bswap_mask);
+ dip = (__vector unsigned int)vec_perm(*(__vector unsigned char *)&dip,
+ (__vector unsigned char){}, bswap_mask);
/* if all 4 packets are IPV4. */
if (likely(ipv4_flag)) {
@@ -101,7 +101,7 @@ l3fwd_lpm_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
{
int32_t j;
uint16_t dst_port[MAX_PKT_BURST];
- vector unsigned int dip[MAX_PKT_BURST / FWDSTEP];
+ __vector unsigned int dip[MAX_PKT_BURST / FWDSTEP];
uint32_t ipv4_flag[MAX_PKT_BURST / FWDSTEP];
const int32_t k = RTE_ALIGN_FLOOR(nb_rx, FWDSTEP);
diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
index 24a41eec17..4dfe7a14b4 100644
--- a/lib/acl/acl_run_altivec.h
+++ b/lib/acl/acl_run_altivec.h
@@ -41,7 +41,7 @@ resolve_priority_altivec(uint64_t transition, int n,
{
uint32_t x;
xmm_t results, priority, results1, priority1;
- vector bool int selector;
+ __vector bool int selector;
xmm_t *saved_results, *saved_priority;
for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) {
@@ -110,8 +110,8 @@ transition4(xmm_t next_input, const uint64_t *trans,
xmm_t in, node_type, r, t;
xmm_t dfa_ofs, quad_ofs;
xmm_t *index_mask, *tp;
- vector bool int dfa_msk;
- vector signed char zeroes = {};
+ __vector bool int dfa_msk;
+ __vector signed char zeroes = {};
union {
uint64_t d64[2];
uint32_t d32[4];
@@ -127,7 +127,7 @@ transition4(xmm_t next_input, const uint64_t *trans,
index_mask = (xmm_t *)&altivec_acl_const.xmm_index_mask.u32;
t = vec_xor(*index_mask, *index_mask);
in = vec_perm(next_input, (xmm_t){},
- *(vector unsigned char *)&altivec_acl_const.xmm_shuffle_input);
+ *(__vector unsigned char *)&altivec_acl_const.xmm_shuffle_input);
/* Calc node type and node addr */
node_type = vec_and(vec_nor(*index_mask, *index_mask), tr_lo);
@@ -137,30 +137,30 @@ transition4(xmm_t next_input, const uint64_t *trans,
dfa_msk = vec_cmpeq(node_type, t);
/* DFA calculations. */
- r = vec_sr(in, (vector unsigned int){30, 30, 30, 30});
+ r = vec_sr(in, (__vector unsigned int){30, 30, 30, 30});
tp = (xmm_t *)&altivec_acl_const.range_base.u32;
r = vec_add(r, *tp);
- t = vec_sr(in, (vector unsigned int){24, 24, 24, 24});
+ t = vec_sr(in, (__vector unsigned int){24, 24, 24, 24});
r = vec_perm(tr_hi, (xmm_t){(uint16_t)0 << 16},
- (vector unsigned char)r);
+ (__vector unsigned char)r);
dfa_ofs = vec_sub(t, r);
/* QUAD/SINGLE calculations. */
- t = (xmm_t)vec_cmpgt((vector signed char)in, (vector signed char)tr_hi);
+ t = (xmm_t)vec_cmpgt((__vector signed char)in, (__vector signed char)tr_hi);
t = (xmm_t)vec_sel(
vec_sel(
- (vector signed char)vec_sub(
- zeroes, (vector signed char)t),
- (vector signed char)t,
- vec_cmpgt((vector signed char)t, zeroes)),
+ (__vector signed char)vec_sub(
+ zeroes, (__vector signed char)t),
+ (__vector signed char)t,
+ vec_cmpgt((__vector signed char)t, zeroes)),
zeroes,
- vec_cmpeq((vector signed char)t, zeroes));
+ vec_cmpeq((__vector signed char)t, zeroes));
- t = (xmm_t)vec_msum((vector signed char)t,
- (vector unsigned char)t, (xmm_t){});
- quad_ofs = (xmm_t)vec_msum((vector signed short)t,
- *(vector signed short *)&altivec_acl_const.xmm_ones_16.u16,
+ t = (xmm_t)vec_msum((__vector signed char)t,
+ (__vector unsigned char)t, (xmm_t){});
+ quad_ofs = (xmm_t)vec_msum((__vector signed short)t,
+ *(__vector signed short *)&altivec_acl_const.xmm_ones_16.u16,
(xmm_t){});
/* blend DFA and QUAD/SINGLE. */
@@ -177,7 +177,7 @@ transition4(xmm_t next_input, const uint64_t *trans,
*indices2 = (xmm_t){v.d32[0], v.d32[1], v.d32[2], v.d32[3]};
return vec_sr(next_input,
- (vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
+ (__vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
}
/*
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index c1f0b0672c..a5f009b7df 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -17,7 +17,7 @@ extern "C" {
#define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_256
-typedef vector signed int xmm_t;
+typedef __vector signed int xmm_t;
#define XMM_SIZE (sizeof(xmm_t))
#define XMM_MASK (XMM_SIZE - 1)
diff --git a/lib/lpm/rte_lpm_altivec.h b/lib/lpm/rte_lpm_altivec.h
index 4fbc1b595d..bab8929495 100644
--- a/lib/lpm/rte_lpm_altivec.h
+++ b/lib/lpm/rte_lpm_altivec.h
@@ -19,14 +19,14 @@ static inline void
rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
uint32_t defv)
{
- vector signed int i24;
+ xmm_t i24;
rte_xmm_t i8;
uint32_t tbl[4];
uint64_t idx, pt, pt2;
const uint32_t *ptbl;
const uint32_t mask = UINT8_MAX;
- const vector signed int mask8 = (xmm_t){mask, mask, mask, mask};
+ const xmm_t mask8 = (xmm_t){mask, mask, mask, mask};
/*
* RTE_LPM_VALID_EXT_ENTRY_BITMASK for 2 LPM entries
@@ -46,7 +46,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
/* get 4 indexes for tbl24[]. */
i24 = vec_sr((xmm_t) ip,
- (vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
+ (__vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
/* extract values from tbl24[] */
idx = (uint32_t)i24[0];
--
2.34.1
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'examples/link_status_interrupt: fix stats refresh rate' has been queued to stable release 21.11.2
2022-07-06 20:35 ` patch 'avoid AltiVec keyword vector' " luca.boccassi
@ 2022-07-12 19:23 ` luca.boccassi
2022-07-12 19:23 ` patch 'vdpa/mlx5: fix leak on event thread creation' " luca.boccassi
` (4 more replies)
0 siblings, 5 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-12 19:23 UTC (permalink / raw)
To: Raja Zidane; +Cc: Omar Awaysa, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/14/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/9224015451386fc4e45195fd057f0a5d22fb5eba
Thanks.
Luca Boccassi
---
From 9224015451386fc4e45195fd057f0a5d22fb5eba Mon Sep 17 00:00:00 2001
From: Raja Zidane <rzidane@nvidia.com>
Date: Thu, 7 Jul 2022 08:22:34 +0000
Subject: [PATCH] examples/link_status_interrupt: fix stats refresh rate
[ upstream commit 14d460b888c290e16c00cff4ae809d14fe799aec ]
TIMER_MILLISECOND is defined as the number of CPU cycles per millisecond.
The current definition is correct only for cores with frequency of 2GHz.
Use DPDK API to get CPU frequency, and to define timer period.
Fixes: af75078fece3 ("first public release")
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Signed-off-by: Omar Awaysa <omara@nvidia.com>
---
examples/link_status_interrupt/main.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/examples/link_status_interrupt/main.c b/examples/link_status_interrupt/main.c
index 551f0524da..9699e14ce6 100644
--- a/examples/link_status_interrupt/main.c
+++ b/examples/link_status_interrupt/main.c
@@ -101,9 +101,10 @@ struct lsi_port_statistics {
struct lsi_port_statistics port_statistics[RTE_MAX_ETHPORTS];
/* A tsc-based timer responsible for triggering statistics printout */
-#define TIMER_MILLISECOND 2000000ULL /* around 1ms at 2 Ghz */
+#define TIMER_MILLISECOND (rte_get_timer_hz() / 1000)
#define MAX_TIMER_PERIOD 86400 /* 1 day max */
-static int64_t timer_period = 10 * TIMER_MILLISECOND * 1000; /* default period is 10 seconds */
+#define DEFAULT_TIMER_PERIOD 10UL /* default period is 10 seconds */
+static int64_t timer_period;
/* Print out statistics on packets dropped */
static void
@@ -370,6 +371,8 @@ lsi_parse_args(int argc, char **argv)
{NULL, 0, 0, 0}
};
+ timer_period = DEFAULT_TIMER_PERIOD * TIMER_MILLISECOND * 1000;
+
argvopt = argv;
while ((opt = getopt_long(argc, argvopt, "p:q:T:",
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-12 20:22:33.755050206 +0100
+++ 0001-examples-link_status_interrupt-fix-stats-refresh-rat.patch 2022-07-12 20:22:33.705247081 +0100
@@ -1 +1 @@
-From 14d460b888c290e16c00cff4ae809d14fe799aec Mon Sep 17 00:00:00 2001
+From 9224015451386fc4e45195fd057f0a5d22fb5eba Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 14d460b888c290e16c00cff4ae809d14fe799aec ]
+
@@ -12 +13,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'vdpa/mlx5: fix leak on event thread creation' has been queued to stable release 21.11.2
2022-07-12 19:23 ` patch 'examples/link_status_interrupt: fix stats refresh rate' " luca.boccassi
@ 2022-07-12 19:23 ` luca.boccassi
2022-07-12 19:23 ` patch 'vdpa/ifc/base: fix null pointer dereference' " luca.boccassi
` (3 subsequent siblings)
4 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-12 19:23 UTC (permalink / raw)
To: David Marchand; +Cc: Maxime Coquelin, Matan Azrad, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/14/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/dbe68f09585c4f671abb49f6ceee451a12b47c30
Thanks.
Luca Boccassi
---
From dbe68f09585c4f671abb49f6ceee451a12b47c30 Mon Sep 17 00:00:00 2001
From: David Marchand <david.marchand@redhat.com>
Date: Mon, 20 Jun 2022 15:10:44 +0200
Subject: [PATCH] vdpa/mlx5: fix leak on event thread creation
[ upstream commit ea2810fc215dbf748afdaa0e65df50427d2bc058 ]
As stated in the manual, pthread_attr_init return value should be
checked.
Besides, a pthread_attr_t should be destroyed once unused.
In practice, we may have no leak (from what I read in glibc current code),
but this may change in the future.
Stick to a correct use of the API.
Fixes: 5cf3fd3af4df ("vdpa/mlx5: add CPU core parameter to bind polling thread")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 30 +++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_event.c b/drivers/vdpa/mlx5/mlx5_vdpa_event.c
index f8d910b33f..ecad139768 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa_event.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa_event.c
@@ -460,6 +460,7 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
{
int ret;
rte_cpuset_t cpuset;
+ pthread_attr_t *attrp = NULL;
pthread_attr_t attr;
char name[16];
const struct sched_param sp = {
@@ -469,22 +470,27 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
if (!priv->eventc)
/* All virtqs are in poll mode. */
return 0;
- pthread_attr_init(&attr);
- ret = pthread_attr_setschedpolicy(&attr, SCHED_RR);
+ ret = pthread_attr_init(&attr);
+ if (ret != 0) {
+ DRV_LOG(ERR, "Failed to initialize thread attributes");
+ goto out;
+ }
+ attrp = &attr;
+ ret = pthread_attr_setschedpolicy(attrp, SCHED_RR);
if (ret) {
DRV_LOG(ERR, "Failed to set thread sched policy = RR.");
- return -1;
+ goto out;
}
- ret = pthread_attr_setschedparam(&attr, &sp);
+ ret = pthread_attr_setschedparam(attrp, &sp);
if (ret) {
DRV_LOG(ERR, "Failed to set thread priority.");
- return -1;
+ goto out;
}
- ret = pthread_create(&priv->timer_tid, &attr, mlx5_vdpa_event_handle,
+ ret = pthread_create(&priv->timer_tid, attrp, mlx5_vdpa_event_handle,
(void *)priv);
if (ret) {
DRV_LOG(ERR, "Failed to create timer thread.");
- return -1;
+ goto out;
}
CPU_ZERO(&cpuset);
if (priv->event_core != -1)
@@ -494,12 +500,16 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
ret = pthread_setaffinity_np(priv->timer_tid, sizeof(cpuset), &cpuset);
if (ret) {
DRV_LOG(ERR, "Failed to set thread affinity.");
- return -1;
+ goto out;
}
snprintf(name, sizeof(name), "vDPA-mlx5-%d", priv->vid);
- ret = rte_thread_setname(priv->timer_tid, name);
- if (ret)
+ if (rte_thread_setname(priv->timer_tid, name) != 0)
DRV_LOG(DEBUG, "Cannot set timer thread name.");
+out:
+ if (attrp != NULL)
+ pthread_attr_destroy(attrp);
+ if (ret != 0)
+ return -1;
return 0;
}
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-12 20:22:33.785142009 +0100
+++ 0002-vdpa-mlx5-fix-leak-on-event-thread-creation.patch 2022-07-12 20:22:33.709247162 +0100
@@ -1 +1 @@
-From ea2810fc215dbf748afdaa0e65df50427d2bc058 Mon Sep 17 00:00:00 2001
+From dbe68f09585c4f671abb49f6ceee451a12b47c30 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit ea2810fc215dbf748afdaa0e65df50427d2bc058 ]
+
@@ -15 +16,0 @@
-Cc: stable@dpdk.org
@@ -25 +26 @@
-index 22f0920c88..4d819763d8 100644
+index f8d910b33f..ecad139768 100644
@@ -28 +29 @@
-@@ -504,6 +504,7 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
+@@ -460,6 +460,7 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
@@ -36 +37 @@
-@@ -513,22 +514,27 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
+@@ -469,22 +470,27 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
@@ -71 +72 @@
-@@ -538,12 +544,16 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
+@@ -494,12 +500,16 @@ mlx5_vdpa_cqe_event_setup(struct mlx5_vdpa_priv *priv)
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'vdpa/ifc/base: fix null pointer dereference' has been queued to stable release 21.11.2
2022-07-12 19:23 ` patch 'examples/link_status_interrupt: fix stats refresh rate' " luca.boccassi
2022-07-12 19:23 ` patch 'vdpa/mlx5: fix leak on event thread creation' " luca.boccassi
@ 2022-07-12 19:23 ` luca.boccassi
2022-07-13 2:13 ` Pei, Andy
2022-07-12 19:23 ` patch 'vdpa/sfc: resolve race between vhost lib and device conf' " luca.boccassi
` (2 subsequent siblings)
4 siblings, 1 reply; 67+ messages in thread
From: luca.boccassi @ 2022-07-12 19:23 UTC (permalink / raw)
To: Andy Pei; +Cc: Maxime Coquelin, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/14/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/06b246ead61adaf7e92282f0b386d42469095894
Thanks.
Luca Boccassi
---
From 06b246ead61adaf7e92282f0b386d42469095894 Mon Sep 17 00:00:00 2001
From: Andy Pei <andy.pei@intel.com>
Date: Fri, 8 Jul 2022 13:57:41 +0800
Subject: [PATCH] vdpa/ifc/base: fix null pointer dereference
[ upstream commit 60600018d3c6ae9ab4c24f9acb5c213bf9a21aaf ]
Fix null pointer dereference reported in coverity scan.
Output some log information when lm_cfg is null.
Make sure lm_cfg is not null before operate on lm_cfg.
Coverity issue: 378882
Fixes: d7fe5a2861e7 ("net/ifc: support live migration")
Signed-off-by: Andy Pei <andy.pei@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/vdpa/ifc/base/ifcvf.c | 17 +++++++++++++----
drivers/vdpa/ifc/base/ifcvf_osdep.h | 1 +
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/vdpa/ifc/base/ifcvf.c b/drivers/vdpa/ifc/base/ifcvf.c
index d10c1fd6a4..f3c29f94b3 100644
--- a/drivers/vdpa/ifc/base/ifcvf.c
+++ b/drivers/vdpa/ifc/base/ifcvf.c
@@ -87,6 +87,8 @@ next:
}
hw->lm_cfg = hw->mem_resource[4].addr;
+ if (!hw->lm_cfg)
+ WARNINGOUT("HW support live migration not support!\n");
if (hw->common_cfg == NULL || hw->notify_base == NULL ||
hw->isr == NULL || hw->dev_cfg == NULL) {
@@ -218,10 +220,12 @@ ifcvf_hw_enable(struct ifcvf_hw *hw)
&cfg->queue_used_hi);
IFCVF_WRITE_REG16(hw->vring[i].size, &cfg->queue_size);
- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
- (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) =
- (u32)hw->vring[i].last_avail_idx |
- ((u32)hw->vring[i].last_used_idx << 16);
+ if (lm_cfg) {
+ *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
+ (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) =
+ (u32)hw->vring[i].last_avail_idx |
+ ((u32)hw->vring[i].last_used_idx << 16);
+ }
IFCVF_WRITE_REG16(i + 1, &cfg->queue_msix_vector);
if (IFCVF_READ_REG16(&cfg->queue_msix_vector) ==
@@ -291,6 +295,8 @@ ifcvf_enable_logging(struct ifcvf_hw *hw, u64 log_base, u64 log_size)
u8 *lm_cfg;
lm_cfg = hw->lm_cfg;
+ if (!lm_cfg)
+ return;
*(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_LOW) =
log_base & IFCVF_32_BIT_MASK;
@@ -313,6 +319,9 @@ ifcvf_disable_logging(struct ifcvf_hw *hw)
u8 *lm_cfg;
lm_cfg = hw->lm_cfg;
+ if (!lm_cfg)
+ return;
+
*(u32 *)(lm_cfg + IFCVF_LM_LOGGING_CTRL) = IFCVF_LM_DISABLE;
}
diff --git a/drivers/vdpa/ifc/base/ifcvf_osdep.h b/drivers/vdpa/ifc/base/ifcvf_osdep.h
index 6aef25ea45..3d567695cc 100644
--- a/drivers/vdpa/ifc/base/ifcvf_osdep.h
+++ b/drivers/vdpa/ifc/base/ifcvf_osdep.h
@@ -14,6 +14,7 @@
#include <rte_log.h>
#include <rte_io.h>
+#define WARNINGOUT(S, args...) RTE_LOG(WARNING, PMD, S, ##args)
#define DEBUGOUT(S, args...) RTE_LOG(DEBUG, PMD, S, ##args)
#define STATIC static
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-12 20:22:33.817657799 +0100
+++ 0003-vdpa-ifc-base-fix-null-pointer-dereference.patch 2022-07-12 20:22:33.709247162 +0100
@@ -1 +1 @@
-From 60600018d3c6ae9ab4c24f9acb5c213bf9a21aaf Mon Sep 17 00:00:00 2001
+From 06b246ead61adaf7e92282f0b386d42469095894 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 60600018d3c6ae9ab4c24f9acb5c213bf9a21aaf ]
+
@@ -12 +13,0 @@
-Cc: stable@dpdk.org
@@ -17 +18 @@
- drivers/vdpa/ifc/base/ifcvf.c | 31 +++++++++++++++++++----------
+ drivers/vdpa/ifc/base/ifcvf.c | 17 +++++++++++++----
@@ -19 +20 @@
- 2 files changed, 21 insertions(+), 11 deletions(-)
+ 2 files changed, 14 insertions(+), 4 deletions(-)
@@ -22 +23 @@
-index 0a9f71a960..f1e1474447 100644
+index d10c1fd6a4..f3c29f94b3 100644
@@ -34 +35 @@
-@@ -218,17 +220,19 @@ ifcvf_hw_enable(struct ifcvf_hw *hw)
+@@ -218,10 +220,12 @@ ifcvf_hw_enable(struct ifcvf_hw *hw)
@@ -38,11 +39,4 @@
-- if (hw->device_type == IFCVF_BLK)
-- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
-- i * IFCVF_LM_CFG_SIZE) =
-- (u32)hw->vring[i].last_avail_idx |
-- ((u32)hw->vring[i].last_used_idx << 16);
-- else
-- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
-- (i / 2) * IFCVF_LM_CFG_SIZE +
-- (i % 2) * 4) =
-- (u32)hw->vring[i].last_avail_idx |
-- ((u32)hw->vring[i].last_used_idx << 16);
+- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
+- (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) =
+- (u32)hw->vring[i].last_avail_idx |
+- ((u32)hw->vring[i].last_used_idx << 16);
@@ -50,11 +44,4 @@
-+ if (hw->device_type == IFCVF_BLK)
-+ *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
-+ i * IFCVF_LM_CFG_SIZE) =
-+ (u32)hw->vring[i].last_avail_idx |
-+ ((u32)hw->vring[i].last_used_idx << 16);
-+ else
-+ *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
-+ (i / 2) * IFCVF_LM_CFG_SIZE +
-+ (i % 2) * 4) =
-+ (u32)hw->vring[i].last_avail_idx |
-+ ((u32)hw->vring[i].last_used_idx << 16);
++ *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
++ (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) =
++ (u32)hw->vring[i].last_avail_idx |
++ ((u32)hw->vring[i].last_used_idx << 16);
@@ -65 +52 @@
-@@ -320,6 +324,8 @@ ifcvf_enable_logging(struct ifcvf_hw *hw, u64 log_base, u64 log_size)
+@@ -291,6 +295,8 @@ ifcvf_enable_logging(struct ifcvf_hw *hw, u64 log_base, u64 log_size)
@@ -74 +61 @@
-@@ -342,6 +348,9 @@ ifcvf_disable_logging(struct ifcvf_hw *hw)
+@@ -313,6 +319,9 @@ ifcvf_disable_logging(struct ifcvf_hw *hw)
^ permalink raw reply [flat|nested] 67+ messages in thread* RE: patch 'vdpa/ifc/base: fix null pointer dereference' has been queued to stable release 21.11.2
2022-07-12 19:23 ` patch 'vdpa/ifc/base: fix null pointer dereference' " luca.boccassi
@ 2022-07-13 2:13 ` Pei, Andy
0 siblings, 0 replies; 67+ messages in thread
From: Pei, Andy @ 2022-07-13 2:13 UTC (permalink / raw)
To: luca.boccassi; +Cc: Maxime Coquelin, dpdk stable
Thanks Luca.
> -----Original Message-----
> From: luca.boccassi@gmail.com <luca.boccassi@gmail.com>
> Sent: Wednesday, July 13, 2022 3:24 AM
> To: Pei, Andy <andy.pei@intel.com>
> Cc: Maxime Coquelin <maxime.coquelin@redhat.com>; dpdk stable
> <stable@dpdk.org>
> Subject: patch 'vdpa/ifc/base: fix null pointer dereference' has been queued to
> stable release 21.11.2
>
> Hi,
>
> FYI, your patch has been queued to stable release 21.11.2
>
> Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
> It will be pushed if I get no objections before 07/14/22. So please shout if
> anyone has objections.
>
> Also note that after the patch there's a diff of the upstream commit vs the patch
> applied to the branch. This will indicate if there was any rebasing needed to
> apply to the stable branch. If there were code changes for rebasing
> (ie: not only metadata diffs), please double check that the rebase was correctly
> done.
>
> Queued patches are on a temporary branch at:
> https://github.com/kevintraynor/dpdk-stable
>
> This queued commit can be viewed at:
> https://github.com/kevintraynor/dpdk-
> stable/commit/06b246ead61adaf7e92282f0b386d42469095894
>
> Thanks.
>
> Luca Boccassi
>
> ---
> From 06b246ead61adaf7e92282f0b386d42469095894 Mon Sep 17 00:00:00
> 2001
> From: Andy Pei <andy.pei@intel.com>
> Date: Fri, 8 Jul 2022 13:57:41 +0800
> Subject: [PATCH] vdpa/ifc/base: fix null pointer dereference
>
> [ upstream commit 60600018d3c6ae9ab4c24f9acb5c213bf9a21aaf ]
>
> Fix null pointer dereference reported in coverity scan.
> Output some log information when lm_cfg is null.
> Make sure lm_cfg is not null before operate on lm_cfg.
>
> Coverity issue: 378882
> Fixes: d7fe5a2861e7 ("net/ifc: support live migration")
>
> Signed-off-by: Andy Pei <andy.pei@intel.com>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> ---
> drivers/vdpa/ifc/base/ifcvf.c | 17 +++++++++++++----
> drivers/vdpa/ifc/base/ifcvf_osdep.h | 1 +
> 2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/vdpa/ifc/base/ifcvf.c b/drivers/vdpa/ifc/base/ifcvf.c index
> d10c1fd6a4..f3c29f94b3 100644
> --- a/drivers/vdpa/ifc/base/ifcvf.c
> +++ b/drivers/vdpa/ifc/base/ifcvf.c
> @@ -87,6 +87,8 @@ next:
> }
>
> hw->lm_cfg = hw->mem_resource[4].addr;
> + if (!hw->lm_cfg)
> + WARNINGOUT("HW support live migration not support!\n");
>
> if (hw->common_cfg == NULL || hw->notify_base == NULL ||
> hw->isr == NULL || hw->dev_cfg == NULL) { @@ -
> 218,10 +220,12 @@ ifcvf_hw_enable(struct ifcvf_hw *hw)
> &cfg->queue_used_hi);
> IFCVF_WRITE_REG16(hw->vring[i].size, &cfg->queue_size);
>
> - *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
> - (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) =
> - (u32)hw->vring[i].last_avail_idx |
> - ((u32)hw->vring[i].last_used_idx << 16);
> + if (lm_cfg) {
> + *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
> + (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) *
> 4) =
> + (u32)hw->vring[i].last_avail_idx |
> + ((u32)hw->vring[i].last_used_idx << 16);
> + }
>
> IFCVF_WRITE_REG16(i + 1, &cfg->queue_msix_vector);
> if (IFCVF_READ_REG16(&cfg->queue_msix_vector) == @@ -
> 291,6 +295,8 @@ ifcvf_enable_logging(struct ifcvf_hw *hw, u64 log_base, u64
> log_size)
> u8 *lm_cfg;
>
> lm_cfg = hw->lm_cfg;
> + if (!lm_cfg)
> + return;
>
> *(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_LOW) =
> log_base & IFCVF_32_BIT_MASK;
> @@ -313,6 +319,9 @@ ifcvf_disable_logging(struct ifcvf_hw *hw)
> u8 *lm_cfg;
>
> lm_cfg = hw->lm_cfg;
> + if (!lm_cfg)
> + return;
> +
> *(u32 *)(lm_cfg + IFCVF_LM_LOGGING_CTRL) = IFCVF_LM_DISABLE; }
>
> diff --git a/drivers/vdpa/ifc/base/ifcvf_osdep.h
> b/drivers/vdpa/ifc/base/ifcvf_osdep.h
> index 6aef25ea45..3d567695cc 100644
> --- a/drivers/vdpa/ifc/base/ifcvf_osdep.h
> +++ b/drivers/vdpa/ifc/base/ifcvf_osdep.h
> @@ -14,6 +14,7 @@
> #include <rte_log.h>
> #include <rte_io.h>
>
> +#define WARNINGOUT(S, args...) RTE_LOG(WARNING, PMD, S, ##args)
> #define DEBUGOUT(S, args...) RTE_LOG(DEBUG, PMD, S, ##args)
> #define STATIC static
>
> --
> 2.34.1
>
> ---
> Diff of the applied patch vs upstream commit (please double-check if non-
> empty:
> ---
> --- - 2022-07-12 20:22:33.817657799 +0100
> +++ 0003-vdpa-ifc-base-fix-null-pointer-dereference.patch 2022-07-12
> 20:22:33.709247162 +0100
> @@ -1 +1 @@
> -From 60600018d3c6ae9ab4c24f9acb5c213bf9a21aaf Mon Sep 17 00:00:00
> 2001
> +From 06b246ead61adaf7e92282f0b386d42469095894 Mon Sep 17 00:00:00
> 2001
> @@ -5,0 +6,2 @@
> +[ upstream commit 60600018d3c6ae9ab4c24f9acb5c213bf9a21aaf ]
> +
> @@ -12 +13,0 @@
> -Cc: stable@dpdk.org
> @@ -17 +18 @@
> - drivers/vdpa/ifc/base/ifcvf.c | 31 +++++++++++++++++++----------
> + drivers/vdpa/ifc/base/ifcvf.c | 17 +++++++++++++----
> @@ -19 +20 @@
> - 2 files changed, 21 insertions(+), 11 deletions(-)
> + 2 files changed, 14 insertions(+), 4 deletions(-)
> @@ -22 +23 @@
> -index 0a9f71a960..f1e1474447 100644
> +index d10c1fd6a4..f3c29f94b3 100644
> @@ -34 +35 @@
> -@@ -218,17 +220,19 @@ ifcvf_hw_enable(struct ifcvf_hw *hw)
> +@@ -218,10 +220,12 @@ ifcvf_hw_enable(struct ifcvf_hw *hw)
> @@ -38,11 +39,4 @@
> -- if (hw->device_type == IFCVF_BLK)
> -- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
> -- i * IFCVF_LM_CFG_SIZE) =
> -- (u32)hw->vring[i].last_avail_idx |
> -- ((u32)hw->vring[i].last_used_idx << 16);
> -- else
> -- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
> -- (i / 2) * IFCVF_LM_CFG_SIZE +
> -- (i % 2) * 4) =
> -- (u32)hw->vring[i].last_avail_idx |
> -- ((u32)hw->vring[i].last_used_idx << 16);
> +- *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
> +- (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) =
> +- (u32)hw->vring[i].last_avail_idx |
> +- ((u32)hw->vring[i].last_used_idx << 16);
> @@ -50,11 +44,4 @@
> -+ if (hw->device_type == IFCVF_BLK)
> -+ *(u32 *)(lm_cfg +
> IFCVF_LM_RING_STATE_OFFSET +
> -+ i * IFCVF_LM_CFG_SIZE) =
> -+ (u32)hw->vring[i].last_avail_idx |
> -+ ((u32)hw->vring[i].last_used_idx << 16);
> -+ else
> -+ *(u32 *)(lm_cfg +
> IFCVF_LM_RING_STATE_OFFSET +
> -+ (i / 2) * IFCVF_LM_CFG_SIZE +
> -+ (i % 2) * 4) =
> -+ (u32)hw->vring[i].last_avail_idx |
> -+ ((u32)hw->vring[i].last_used_idx << 16);
> ++ *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET +
> ++ (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) *
> 4) =
> ++ (u32)hw->vring[i].last_avail_idx |
> ++ ((u32)hw->vring[i].last_used_idx << 16);
> @@ -65 +52 @@
> -@@ -320,6 +324,8 @@ ifcvf_enable_logging(struct ifcvf_hw *hw, u64
> log_base, u64 log_size)
> +@@ -291,6 +295,8 @@ ifcvf_enable_logging(struct ifcvf_hw *hw, u64
> +log_base, u64 log_size)
> @@ -74 +61 @@
> -@@ -342,6 +348,9 @@ ifcvf_disable_logging(struct ifcvf_hw *hw)
> +@@ -313,6 +319,9 @@ ifcvf_disable_logging(struct ifcvf_hw *hw)
^ permalink raw reply [flat|nested] 67+ messages in thread
* patch 'vdpa/sfc: resolve race between vhost lib and device conf' has been queued to stable release 21.11.2
2022-07-12 19:23 ` patch 'examples/link_status_interrupt: fix stats refresh rate' " luca.boccassi
2022-07-12 19:23 ` patch 'vdpa/mlx5: fix leak on event thread creation' " luca.boccassi
2022-07-12 19:23 ` patch 'vdpa/ifc/base: fix null pointer dereference' " luca.boccassi
@ 2022-07-12 19:23 ` luca.boccassi
2022-07-12 19:23 ` patch 'net/iavf: fix GTP-U extension flow' " luca.boccassi
2022-07-12 19:23 ` patch 'app/testpmd: fix GTP PSC raw processing' " luca.boccassi
4 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-12 19:23 UTC (permalink / raw)
To: Abhimanyu Saini; +Cc: Maxime Coquelin, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/14/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/b11e955370a713ee418ee0f5e853364fe72132a8
Thanks.
Luca Boccassi
---
From b11e955370a713ee418ee0f5e853364fe72132a8 Mon Sep 17 00:00:00 2001
From: Abhimanyu Saini <absaini@amd.com>
Date: Wed, 6 Jul 2022 14:54:01 +0530
Subject: [PATCH] vdpa/sfc: resolve race between vhost lib and device conf
[ upstream commit d9a1ef20f0f1c6f4029f79d5eab5dc696d115c81 ]
libvhost calls dev_conf() before prosessing the
VHOST_USER_SET_VRING_CALL message for the last VQ. So
this message is processed after dev_conf() returns.
However, the dev_conf() function spawns a thread to set
rte_vhost_host_notifier_ctrl() before returning control to
libvhost. This parallel thread in turn invokes get_notify_area().
To get the notify_area, the vdpa driver needs to query the HW and
for this query it needs an enabled VQ.
But at the same time libvhost is processing the last
VHOST_USER_SET_VRING_CALL, and to do that it disables the last VQ.
Hence there is a race b/w the libvhost and the vdpa driver.
To resolve this race condition, query the HW and cache notify_area
inside dev_conf() instead of doing it the parallel thread.
Fixes: 630be406dcbf ("vdpa/sfc: get queue notify area info")
Signed-off-by: Abhimanyu Saini <absaini@amd.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/vdpa/sfc/sfc_vdpa_ops.c | 36 ++++++++++++++++-----------------
drivers/vdpa/sfc/sfc_vdpa_ops.h | 1 +
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/vdpa/sfc/sfc_vdpa_ops.c b/drivers/vdpa/sfc/sfc_vdpa_ops.c
index 63aa52da49..b84699d234 100644
--- a/drivers/vdpa/sfc/sfc_vdpa_ops.c
+++ b/drivers/vdpa/sfc/sfc_vdpa_ops.c
@@ -222,6 +222,7 @@ static int
sfc_vdpa_virtq_start(struct sfc_vdpa_ops_data *ops_data, int vq_num)
{
int rc;
+ uint32_t doorbell;
efx_virtio_vq_t *vq;
struct sfc_vdpa_vring_info vring;
efx_virtio_vq_cfg_t vq_cfg;
@@ -270,22 +271,35 @@ sfc_vdpa_virtq_start(struct sfc_vdpa_ops_data *ops_data, int vq_num)
/* Start virtqueue */
rc = efx_virtio_qstart(vq, &vq_cfg, &vq_dyncfg);
if (rc != 0) {
- /* destroy virtqueue */
sfc_vdpa_err(ops_data->dev_handle,
"virtqueue start failed: %s",
rte_strerror(rc));
- efx_virtio_qdestroy(vq);
goto fail_virtio_qstart;
}
sfc_vdpa_info(ops_data->dev_handle,
"virtqueue started successfully for vq_num %d", vq_num);
+ rc = efx_virtio_get_doorbell_offset(vq, &doorbell);
+ if (rc != 0) {
+ sfc_vdpa_err(ops_data->dev_handle,
+ "failed to get doorbell offset: %s",
+ rte_strerror(rc));
+ goto fail_doorbell;
+ }
+
+ /*
+ * Cache the bar_offset here for each VQ here, it will come
+ * in handy when sfc_vdpa_get_notify_area() is invoked.
+ */
+ ops_data->vq_cxt[vq_num].doorbell = (void *)(uintptr_t)doorbell;
ops_data->vq_cxt[vq_num].enable = B_TRUE;
return rc;
+fail_doorbell:
fail_virtio_qstart:
+ efx_virtio_qdestroy(vq);
fail_vring_info:
return rc;
}
@@ -792,8 +806,6 @@ sfc_vdpa_get_notify_area(int vid, int qid, uint64_t *offset, uint64_t *size)
int ret;
efx_nic_t *nic;
int vfio_dev_fd;
- efx_rc_t rc;
- unsigned int bar_offset;
volatile void *doorbell;
struct rte_pci_device *pci_dev;
struct rte_vdpa_device *vdpa_dev;
@@ -824,19 +836,6 @@ sfc_vdpa_get_notify_area(int vid, int qid, uint64_t *offset, uint64_t *size)
return -1;
}
- if (ops_data->vq_cxt[qid].enable != B_TRUE) {
- sfc_vdpa_err(dev, "vq is not enabled");
- return -1;
- }
-
- rc = efx_virtio_get_doorbell_offset(ops_data->vq_cxt[qid].vq,
- &bar_offset);
- if (rc != 0) {
- sfc_vdpa_err(dev, "failed to get doorbell offset: %s",
- rte_strerror(rc));
- return rc;
- }
-
reg.index = sfc_vdpa_adapter_by_dev_handle(dev)->mem_bar.esb_rid;
ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®);
if (ret != 0) {
@@ -845,7 +844,8 @@ sfc_vdpa_get_notify_area(int vid, int qid, uint64_t *offset, uint64_t *size)
return ret;
}
- *offset = reg.offset + bar_offset;
+ /* Use bar_offset that was cached during sfc_vdpa_virtq_start() */
+ *offset = reg.offset + (uint64_t)ops_data->vq_cxt[qid].doorbell;
len = (1U << encp->enc_vi_window_shift) / 2;
if (len >= sysconf(_SC_PAGESIZE)) {
diff --git a/drivers/vdpa/sfc/sfc_vdpa_ops.h b/drivers/vdpa/sfc/sfc_vdpa_ops.h
index 6d790fd8be..9dbd5b84dd 100644
--- a/drivers/vdpa/sfc/sfc_vdpa_ops.h
+++ b/drivers/vdpa/sfc/sfc_vdpa_ops.h
@@ -35,6 +35,7 @@ struct sfc_vdpa_vring_info {
};
typedef struct sfc_vdpa_vq_context_s {
+ volatile void *doorbell;
uint8_t enable;
uint32_t pidx;
uint32_t cidx;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-12 20:22:33.849529911 +0100
+++ 0004-vdpa-sfc-resolve-race-between-vhost-lib-and-device-c.patch 2022-07-12 20:22:33.713247244 +0100
@@ -1 +1 @@
-From d9a1ef20f0f1c6f4029f79d5eab5dc696d115c81 Mon Sep 17 00:00:00 2001
+From b11e955370a713ee418ee0f5e853364fe72132a8 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit d9a1ef20f0f1c6f4029f79d5eab5dc696d115c81 ]
+
@@ -25 +26,0 @@
-Cc: stable@dpdk.org
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'net/iavf: fix GTP-U extension flow' has been queued to stable release 21.11.2
2022-07-12 19:23 ` patch 'examples/link_status_interrupt: fix stats refresh rate' " luca.boccassi
` (2 preceding siblings ...)
2022-07-12 19:23 ` patch 'vdpa/sfc: resolve race between vhost lib and device conf' " luca.boccassi
@ 2022-07-12 19:23 ` luca.boccassi
2022-07-12 19:23 ` patch 'app/testpmd: fix GTP PSC raw processing' " luca.boccassi
4 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-12 19:23 UTC (permalink / raw)
To: Wenxuan Wu; +Cc: Zhimin Huang, Qiming Yang, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/14/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/9e7d93ae2f99123324b90aae18dd5eb152c3a9b8
Thanks.
Luca Boccassi
---
From 9e7d93ae2f99123324b90aae18dd5eb152c3a9b8 Mon Sep 17 00:00:00 2001
From: Wenxuan Wu <wenxuanx.wu@intel.com>
Date: Wed, 6 Jul 2022 10:56:26 +0800
Subject: [PATCH] net/iavf: fix GTP-U extension flow
[ upstream commit 755fd7b22da9115fc6682c2cf9e9268bb26bfb38 ]
Due to the change of struct rte_gtp_psc_generic_hdr, kernel driver can
not handle gtp_psc properly, we introduce a new structure to fix this
gap between kernel driver and struct rte_gtp_psc_generic_hdr.
Fixes: d5eb3e600d9e ("net/iavf: support flow director basic rule")
Signed-off-by: Wenxuan Wu <wenxuanx.wu@intel.com>
Tested-by: Zhimin Huang <zhiminx.huang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
drivers/net/iavf/iavf_fdir.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c
index b63aaca91d..6b847894d8 100644
--- a/drivers/net/iavf/iavf_fdir.c
+++ b/drivers/net/iavf/iavf_fdir.c
@@ -1185,8 +1185,22 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
GTPU_DWN, QFI);
}
- rte_memcpy(hdr->buffer, gtp_psc_spec,
- sizeof(*gtp_psc_spec));
+ /*
+ * New structure to fix gap between kernel driver and
+ * rte_gtp_psc_generic_hdr.
+ */
+ struct iavf_gtp_psc_spec_hdr {
+ uint8_t len;
+ uint8_t qfi:6;
+ uint8_t type:4;
+ uint8_t next;
+ } psc;
+ psc.len = gtp_psc_spec->hdr.ext_hdr_len;
+ psc.qfi = gtp_psc_spec->hdr.qfi;
+ psc.type = gtp_psc_spec->hdr.type;
+ psc.next = 0;
+ rte_memcpy(hdr->buffer, &psc,
+ sizeof(struct iavf_gtp_psc_spec_hdr));
}
hdrs->count = ++layer;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-12 20:22:33.883126609 +0100
+++ 0005-net-iavf-fix-GTP-U-extension-flow.patch 2022-07-12 20:22:33.713247244 +0100
@@ -1 +1 @@
-From 755fd7b22da9115fc6682c2cf9e9268bb26bfb38 Mon Sep 17 00:00:00 2001
+From 9e7d93ae2f99123324b90aae18dd5eb152c3a9b8 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 755fd7b22da9115fc6682c2cf9e9268bb26bfb38 ]
+
@@ -11 +12,0 @@
-Cc: stable@dpdk.org
@@ -21 +22 @@
-index f236260502..4789d46ab2 100644
+index b63aaca91d..6b847894d8 100644
@@ -24 +25 @@
-@@ -1300,8 +1300,22 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
+@@ -1185,8 +1185,22 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
^ permalink raw reply [flat|nested] 67+ messages in thread* patch 'app/testpmd: fix GTP PSC raw processing' has been queued to stable release 21.11.2
2022-07-12 19:23 ` patch 'examples/link_status_interrupt: fix stats refresh rate' " luca.boccassi
` (3 preceding siblings ...)
2022-07-12 19:23 ` patch 'net/iavf: fix GTP-U extension flow' " luca.boccassi
@ 2022-07-12 19:23 ` luca.boccassi
4 siblings, 0 replies; 67+ messages in thread
From: luca.boccassi @ 2022-07-12 19:23 UTC (permalink / raw)
To: Gregory Etelson; +Cc: Aman Singh, Andrew Rybchenko, dpdk stable
Hi,
FYI, your patch has been queued to stable release 21.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/14/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/84b2018842a8d34406f277e586dcda56a5b017ab
Thanks.
Luca Boccassi
---
From 84b2018842a8d34406f277e586dcda56a5b017ab Mon Sep 17 00:00:00 2001
From: Gregory Etelson <getelson@nvidia.com>
Date: Wed, 6 Jul 2022 19:11:50 +0300
Subject: [PATCH] app/testpmd: fix GTP PSC raw processing
[ upstream commit a942222d56faf55b770a66be177590ed2d96584f ]
Fix GTP PSP extension size initialization.
Clear input buffer.
Fixes: c65282c9aa31 ("app/testpmd: fix GTP PSC raw processing")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Aman Singh <aman.deep.singh@intel.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
---
app/test-pmd/cmdline_flow.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index e21e0326d9..5c4544a753 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -9210,10 +9210,12 @@ cmd_set_raw_parsed(const struct buffer *in)
const struct rte_flow_item_gtp_psc
*opt = item->spec;
struct rte_gtp_psc_generic_hdr *hdr;
-
- *total_size += RTE_ALIGN(sizeof(hdr),
+ size_t hdr_size = RTE_ALIGN(sizeof(*hdr),
sizeof(int32_t));
+
+ *total_size += hdr_size;
hdr = (typeof(hdr))(data_tail - (*total_size));
+ memset(hdr, 0, hdr_size);
*hdr = opt->hdr;
hdr->ext_hdr_len = 1;
gtp_psc = i;
--
2.34.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-07-12 20:22:33.916944453 +0100
+++ 0006-app-testpmd-fix-GTP-PSC-raw-processing.patch 2022-07-12 20:22:33.725247488 +0100
@@ -1 +1 @@
-From a942222d56faf55b770a66be177590ed2d96584f Mon Sep 17 00:00:00 2001
+From 84b2018842a8d34406f277e586dcda56a5b017ab Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit a942222d56faf55b770a66be177590ed2d96584f ]
+
@@ -10 +11,0 @@
-Cc: stable@dpdk.org
@@ -20 +21 @@
-index 6cb1173385..7f50028eb7 100644
+index e21e0326d9..5c4544a753 100644
@@ -23 +24 @@
-@@ -11030,10 +11030,12 @@ cmd_set_raw_parsed(const struct buffer *in)
+@@ -9210,10 +9210,12 @@ cmd_set_raw_parsed(const struct buffer *in)
^ permalink raw reply [flat|nested] 67+ messages in thread