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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.238) by CO1NAM11FT030.mail.protection.outlook.com (10.13.174.125) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5458.17 via Frontend Transport; Wed, 20 Jul 2022 08:26:55 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Wed, 20 Jul 2022 08:26:54 +0000 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Wed, 20 Jul 2022 01:26:53 -0700 From: Xueming Li To: Zhichao Zeng CC: , Qi Zhang , dpdk stable Subject: patch 'net/igc: support multi-process' has been queued to stable release 20.11.6 Date: Wed, 20 Jul 2022 11:21:29 +0300 Message-ID: <20220720082132.3954126-60-xuemingl@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220720082132.3954126-1-xuemingl@nvidia.com> References: <20220621080301.2315720-1-xuemingl@nvidia.com> <20220720082132.3954126-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6e943b10-1b22-4c06-942c-08da6a299b21 X-MS-TrafficTypeDiagnostic: BN8PR12MB3218:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230016)(4636009)(39860400002)(136003)(346002)(396003)(376002)(36840700001)(46966006)(40470700004)(53546011)(41300700001)(966005)(8676002)(86362001)(6286002)(6916009)(478600001)(26005)(316002)(7696005)(5660300002)(82310400005)(54906003)(55016003)(40460700003)(6666004)(8936002)(82740400003)(426003)(356005)(83380400001)(36860700001)(336012)(47076005)(81166007)(2616005)(186003)(4326008)(70586007)(2906002)(16526019)(1076003)(70206006)(40480700001)(36756003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jul 2022 08:26:55.4125 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6e943b10-1b22-4c06-942c-08da6a299b21 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT030.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3218 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 20.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 07/22/22. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/e725713af30afb2ebf24d03355ed5ceac3388995 Thanks. Xueming Li --- >From e725713af30afb2ebf24d03355ed5ceac3388995 Mon Sep 17 00:00:00 2001 From: Zhichao Zeng Date: Thu, 30 Jun 2022 19:03:30 +0800 Subject: [PATCH] net/igc: support multi-process Cc: Xueming Li [ upstream commit e097bf80e418b03eea1b032a37b71097b4cf0a89 ] The Rx function was not specified in the secondary process, causing the secondary process to segfault in a multi-process environment. This patch specify RX/TX functions in "dev_init" to support secondary processes. Fixes: 66fde1b943eb ("net/igc: add skeleton") Signed-off-by: Zhichao Zeng Acked-by: Qi Zhang --- drivers/net/igc/igc_ethdev.c | 9 ++++++++- drivers/net/igc/igc_txrx.c | 8 ++++---- drivers/net/igc/igc_txrx.h | 6 ++++++ 3 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c index 673996314b..706a847a93 100644 --- a/drivers/net/igc/igc_ethdev.c +++ b/drivers/net/igc/igc_ethdev.c @@ -1237,8 +1237,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev) * has already done this work. Only check we don't need a different * RX function. */ - if (rte_eal_process_type() != RTE_PROC_PRIMARY) + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + dev->rx_pkt_burst = igc_recv_pkts; + if (dev->data->scattered_rx) + dev->rx_pkt_burst = igc_recv_scattered_pkts; + + dev->tx_pkt_burst = igc_xmit_pkts; + dev->tx_pkt_prepare = eth_igc_prep_pkts; return 0; + } rte_eth_copy_pci_info(dev, pci_dev); dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c index b23cc2b611..6c3d207a69 100644 --- a/drivers/net/igc/igc_txrx.c +++ b/drivers/net/igc/igc_txrx.c @@ -343,7 +343,7 @@ rx_desc_get_pkt_info(struct igc_rx_queue *rxq, struct rte_mbuf *rxm, rxm->packet_type = rx_desc_pkt_info_to_pkt_type(pkt_info); } -static uint16_t +uint16_t igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) { struct igc_rx_queue * const rxq = rx_queue; @@ -486,7 +486,7 @@ igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) return nb_rx; } -static uint16_t +uint16_t igc_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) { @@ -1414,7 +1414,7 @@ eth_igc_rx_queue_setup(struct rte_eth_dev *dev, } /* prepare packets for transmit */ -static uint16_t +uint16_t eth_igc_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) { @@ -1621,7 +1621,7 @@ tx_desc_cksum_flags_to_olinfo(uint64_t ol_flags) return tmp; } -static uint16_t +uint16_t igc_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) { struct igc_tx_queue * const txq = tx_queue; diff --git a/drivers/net/igc/igc_txrx.h b/drivers/net/igc/igc_txrx.h index f2b2d75bbc..82d67e0b9d 100644 --- a/drivers/net/igc/igc_txrx.h +++ b/drivers/net/igc/igc_txrx.h @@ -52,6 +52,12 @@ void eth_igc_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); void eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t rx_queue_id, int on); +uint16_t igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); +uint16_t igc_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); +uint16_t eth_igc_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +uint16_t igc_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); #ifdef __cplusplus } #endif -- 2.35.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2022-07-20 15:01:01.550542717 +0800 +++ 0060-net-igc-support-multi-process.patch 2022-07-20 15:00:58.807667007 +0800 @@ -1 +1 @@ -From e097bf80e418b03eea1b032a37b71097b4cf0a89 Mon Sep 17 00:00:00 2001 +From e725713af30afb2ebf24d03355ed5ceac3388995 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit e097bf80e418b03eea1b032a37b71097b4cf0a89 ] @@ -13 +15,0 @@ -Cc: stable@dpdk.org @@ -24 +26 @@ -index b9933b395d..7f221a5d34 100644 +index 673996314b..706a847a93 100644 @@ -27 +29 @@ -@@ -1240,8 +1240,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev) +@@ -1237,8 +1237,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev) @@ -45 +47 @@ -index e48d5df11a..ffd219b0df 100644 +index b23cc2b611..6c3d207a69 100644 @@ -48 +50 @@ -@@ -345,7 +345,7 @@ rx_desc_get_pkt_info(struct igc_rx_queue *rxq, struct rte_mbuf *rxm, +@@ -343,7 +343,7 @@ rx_desc_get_pkt_info(struct igc_rx_queue *rxq, struct rte_mbuf *rxm, @@ -57 +59 @@ -@@ -488,7 +488,7 @@ igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) +@@ -486,7 +486,7 @@ igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) @@ -66 +68 @@ -@@ -1397,7 +1397,7 @@ eth_igc_rx_queue_setup(struct rte_eth_dev *dev, +@@ -1414,7 +1414,7 @@ eth_igc_rx_queue_setup(struct rte_eth_dev *dev, @@ -75 +77 @@ -@@ -1604,7 +1604,7 @@ tx_desc_cksum_flags_to_olinfo(uint64_t ol_flags) +@@ -1621,7 +1621,7 @@ tx_desc_cksum_flags_to_olinfo(uint64_t ol_flags) @@ -85 +87 @@ -index 535108a868..02a0a051bb 100644 +index f2b2d75bbc..82d67e0b9d 100644 @@ -88 +90 @@ -@@ -49,6 +49,12 @@ void eth_igc_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, +@@ -52,6 +52,12 @@ void eth_igc_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,