From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2B3D6A054A for ; Mon, 5 Sep 2022 11:01:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 82CF542BAB; Mon, 5 Sep 2022 11:01:22 +0200 (CEST) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 86B3942B81; Mon, 5 Sep 2022 11:01:20 +0200 (CEST) Received: from kwepemi500017.china.huawei.com (unknown [172.30.72.57]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4MLj7K6N8fzZcD1; Mon, 5 Sep 2022 16:56:45 +0800 (CST) Received: from localhost.localdomain (10.28.79.22) by kwepemi500017.china.huawei.com (7.221.188.110) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 5 Sep 2022 17:01:13 +0800 From: Dongdong Liu To: , , , , , , CC: , , , Subject: [PATCH RESEND 10/13] net/hns3: fix segment fault when secondary process access FW Date: Mon, 5 Sep 2022 16:59:36 +0800 Message-ID: <20220905085939.22236-11-liudongdong3@huawei.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20220905085939.22236-1-liudongdong3@huawei.com> References: <20220905085939.22236-1-liudongdong3@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.28.79.22] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemi500017.china.huawei.com (7.221.188.110) X-CFilter-Loop: Reflected X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org From: Chengwen Feng Currently, to prevent missing reporting of reset interrupts and quickly identify reset interrupts, the following logic is designed in the FW (firmware) command interface hns3_cmd_send: if an unprocessed interrupt exist (by checking reset registers), related reset task is scheduled. The secondary process may invoke the hns3_cmd_send interface (e.g. using proc-info query some stats). Unfortunately, the secondary process does not support reset processing, and a segment fault may occur if it schedules reset task. This patch fixes it by limit the checking and scheduling of reset under only primary process. Fixes: 2790c6464725 ("net/hns3: support device reset") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng Signed-off-by: Dongdong Liu --- drivers/net/hns3/hns3_ethdev.c | 10 +++++++++- drivers/net/hns3/hns3_ethdev_vf.c | 11 +++++++++-- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index c6c3279e0f..7cd1ff53e8 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -5602,7 +5602,15 @@ hns3_is_reset_pending(struct hns3_adapter *hns) struct hns3_hw *hw = &hns->hw; enum hns3_reset_level reset; - hns3_check_event_cause(hns, NULL); + /* + * Check the registers to confirm whether there is reset pending. + * Note: This check may lead to schedule reset task, but only primary + * process can process the reset event. Therefore, limit the + * checking under only primary process. + */ + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + hns3_check_event_cause(hns, NULL); + reset = hns3_get_reset_level(hns, &hw->reset.pending); if (reset != HNS3_NONE_RESET && hw->reset.level != HNS3_NONE_RESET && hw->reset.level < reset) { diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 86f2ba24cc..a72535eb7d 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1864,8 +1864,15 @@ hns3vf_is_reset_pending(struct hns3_adapter *hns) if (hw->reset.level == HNS3_VF_FULL_RESET) return false; - /* Check the registers to confirm whether there is reset pending */ - hns3vf_check_event_cause(hns, NULL); + /* + * Check the registers to confirm whether there is reset pending. + * Note: This check may lead to schedule reset task, but only primary + * process can process the reset event. Therefore, limit the + * checking under only primary process. + */ + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + hns3vf_check_event_cause(hns, NULL); + reset = hns3vf_get_reset_level(hw, &hw->reset.pending); if (hw->reset.level != HNS3_NONE_RESET && reset != HNS3_NONE_RESET && hw->reset.level < reset) { -- 2.22.0