From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,
maxime.coquelin@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>,
stable@dpdk.org
Subject: [PATCH v5 01/29] baseband/acc100: fix ring availability calculation
Date: Thu, 20 Oct 2022 22:20:34 -0700 [thread overview]
Message-ID: <20221021052102.107141-2-hernan.vargas@intel.com> (raw)
In-Reply-To: <20221021052102.107141-1-hernan.vargas@intel.com>
Refactor of the queue availability computation to prevent the
application to dequeue more than what may have been enqueued.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
drivers/baseband/acc/rte_acc100_pmd.c | 25 +++++++++++++------------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index e5384223d1..3b0c8e41dc 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -2861,7 +2861,7 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i;
union acc_dma_desc *desc;
int ret;
@@ -2899,7 +2899,7 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i = 0;
union acc_dma_desc *desc;
int ret, desc_idx = 0;
@@ -2949,7 +2949,7 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i, enqueued_cbs = 0;
uint8_t cbs_in_tb;
int ret;
@@ -3011,7 +3011,7 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i;
union acc_dma_desc *desc;
int ret;
@@ -3050,7 +3050,7 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i, enqueued_cbs = 0;
uint8_t cbs_in_tb;
int ret;
@@ -3083,7 +3083,7 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i;
union acc_dma_desc *desc;
int ret;
@@ -3132,7 +3132,7 @@ acc100_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc_ring_avail_enq(q);
uint16_t i, enqueued_cbs = 0;
uint8_t cbs_in_tb;
int ret;
@@ -3495,12 +3495,13 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
{
struct acc_queue *q = q_data->queue_private;
uint16_t dequeue_num;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t i, dequeued_cbs = 0;
struct rte_bbdev_enc_op *op;
int ret;
-
+ if (avail == 0)
+ return 0;
#ifdef RTE_LIBRTE_BBDEV_DEBUG
if (unlikely(ops == NULL || q == NULL)) {
rte_bbdev_log_debug("Unexpected undefined pointer");
@@ -3539,7 +3540,7 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t dequeue_num, i, dequeued_cbs = 0, dequeued_descs = 0;
int ret;
@@ -3579,7 +3580,7 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
{
struct acc_queue *q = q_data->queue_private;
uint16_t dequeue_num;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t i;
uint16_t dequeued_cbs = 0;
@@ -3623,7 +3624,7 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
{
struct acc_queue *q = q_data->queue_private;
uint16_t dequeue_num;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t i;
uint16_t dequeued_cbs = 0;
--
2.37.1
next parent reply other threads:[~2022-10-20 21:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221021052102.107141-1-hernan.vargas@intel.com>
2022-10-21 5:20 ` Hernan Vargas [this message]
2022-10-21 9:04 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 02/29] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-21 9:07 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 03/29] baseband/acc100: memory leak fix Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 04/29] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 05/29] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 06/29] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 07/29] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-21 9:08 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 08/29] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-21 9:16 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 09/29] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 10/29] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 11/29] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 12/29] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 13/29] baseband/acc100: reset pointer after rte_free Hernan Vargas
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