From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,
maxime.coquelin@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>,
stable@dpdk.org
Subject: [PATCH v5 04/29] baseband/acc100: add LDPC encoder padding function
Date: Thu, 20 Oct 2022 22:20:37 -0700 [thread overview]
Message-ID: <20221021052102.107141-5-hernan.vargas@intel.com> (raw)
In-Reply-To: <20221021052102.107141-1-hernan.vargas@intel.com>
LDPC Encoder input may need to be padded to avoid small beat for ACC100.
Padding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8.
Adding protection for corner case to avoid for 5GDL occurrence of last
beat within the ACC100 fabric with <= 8B which might trigger a fabric
corner case hang issue.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc/rte_acc100_pmd.c | 28 ++++++++++++++++++++-------
1 file changed, 21 insertions(+), 7 deletions(-)
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 7500ef6eb5..577c107e9a 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -1017,14 +1017,13 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
RTE_BBDEV_TURBO_HALF_ITERATION_EVEN);
}
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
-
static inline bool
is_acc100(struct acc_queue *q)
{
return (q->d->device_variant == ACC100_VARIANT);
}
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
static inline bool
validate_op_required(struct acc_queue *q)
{
@@ -1355,12 +1354,28 @@ acc100_dma_fill_blk_type_in(struct acc_dma_req_desc *desc,
return next_triplet;
}
+/* May need to pad LDPC Encoder input to avoid small beat for ACC100. */
+static inline uint16_t
+pad_le_in(uint16_t blen, struct acc_queue *q)
+{
+ uint16_t last_beat;
+
+ if (!is_acc100(q))
+ return blen;
+
+ last_beat = blen % 64;
+ if ((last_beat > 0) && (last_beat <= 8))
+ blen += 8;
+
+ return blen;
+}
+
static inline int
acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
struct acc_dma_req_desc *desc, struct rte_mbuf **input,
struct rte_mbuf *output, uint32_t *in_offset,
uint32_t *out_offset, uint32_t *out_length,
- uint32_t *mbuf_total_left, uint32_t *seg_total_left)
+ uint32_t *mbuf_total_left, uint32_t *seg_total_left, struct acc_queue *q)
{
int next_triplet = 1; /* FCW already done */
uint16_t K, in_length_in_bits, in_length_in_bytes;
@@ -1384,8 +1399,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
}
next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
- in_length_in_bytes,
- seg_total_left, next_triplet);
+ pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet);
if (unlikely(next_triplet < 0)) {
rte_bbdev_log(ERR,
"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -2035,7 +2049,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,
acc_header_init(&desc->req);
desc->req.numCBs = num;
- in_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len;
+ in_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len, q);
out_length = (enc->cb_params.e + 7) >> 3;
desc->req.m2dlen = 1 + num;
desc->req.d2mlen = num;
@@ -2102,7 +2116,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
ret = acc100_dma_desc_le_fill(op, &desc->req, &input, output,
&in_offset, &out_offset, &out_length, &mbuf_total_left,
- &seg_total_left);
+ &seg_total_left, q);
if (unlikely(ret < 0))
return ret;
--
2.37.1
next prev parent reply other threads:[~2022-10-20 21:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221021052102.107141-1-hernan.vargas@intel.com>
2022-10-21 5:20 ` [PATCH v5 01/29] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-21 9:04 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 02/29] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-21 9:07 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 03/29] baseband/acc100: memory leak fix Hernan Vargas
2022-10-21 5:20 ` Hernan Vargas [this message]
2022-10-21 5:20 ` [PATCH v5 05/29] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 06/29] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 07/29] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-21 9:08 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 08/29] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-21 9:16 ` Maxime Coquelin
2022-10-21 5:20 ` [PATCH v5 09/29] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 10/29] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 11/29] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 12/29] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-21 5:20 ` [PATCH v5 13/29] baseband/acc100: reset pointer after rte_free Hernan Vargas
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