[PATCH v1] net/mlx5: fix incorrect match mask for meter flow

[Shun Hao <shunh@nvidia.com>]

There's an issue introduced by the change of splitting item matcher
and value translation, that the matcher mask value for color is not
set correctly in meter policy flow creation.

This patch fixes this by providing the correct color mask.

Fixes: cd4ab74206 ("net/mlx5: split flow item matcher and value translation")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7b904eeed6..0b1ff89d35 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9727,8 +9727,8 @@ flow_dv_translate_item_mpls(void *key, const struct rte_flow_item *item,
  *   Flow matcher value.
  * @param[in] reg_type
  *   Type of device metadata register
- * @param[in] value
- *   Register value
+ * @param[in] data
+ *   Register data
  * @param[in] mask
  *   Register mask
  */
@@ -17132,7 +17132,7 @@ __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
 	tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
 	if (priority < RTE_COLOR_RED)
 		flow_dv_match_meta_reg(matcher.mask.buf,
-			(enum modify_reg)color_reg_c_idx, 0, color_mask);
+			(enum modify_reg)color_reg_c_idx, color_mask, color_mask);
 	matcher.priority = priority;
 	matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
 				    matcher.mask.size);
-- 
2.20.0