From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 310C642409 for ; Wed, 18 Jan 2023 07:04:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5755042D36; Wed, 18 Jan 2023 07:04:18 +0100 (CET) Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by mails.dpdk.org (Postfix) with ESMTP id D6B3F42D16; Wed, 18 Jan 2023 07:04:14 +0100 (CET) X-QQ-mid: bizesmtp69t1674021850tl63fk71 Received: from wxdbg.localdomain.com ( [183.129.236.74]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 18 Jan 2023 14:04:09 +0800 (CST) X-QQ-SSF: 01400000000000H0X000B00A0000000 X-QQ-FEAT: Fc2LLDWeHZ8Hq5YWVDdNwz6ZNN0GkRR1n0wfqZlrbG4aa2Refq1EGjyhmAIKk AAdr/L8Eufs2VqdO71tkErntGBaG2ZSkbAdMaKdk4YpqpgBm/OnZb2oGJa617CxdAkID8Vq 2lBeJ6StcS9kdbLST2+NA4g8f+3NGgQuOgS5EL4ddj0pWlWnmaIUgPSoiG1lODFNRsP3b+L m+4RT8UdG5Qs2niWKG28EE9Q9vUrcJbztZjpss0hwfW1e9TwxQ3OdZtxVC5NhLPf0jxxVBE ZQnjD5aaXpijNd5aL3x32s672rTQ+smY3IY7sfh9xf5WzxcYHSluzbUkRX/yKnhIE1ZJIDK XntPE2/ZfZxNrod7oegE7CRfM9gmF0D5ZpbubYCD3gMqEUIv0viNCx1CfNG+lwkjCQK8ICr X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 2/8] net/txgbe: fix default signal quality value for KX/KX4 Date: Wed, 18 Jan 2023 14:00:33 +0800 Message-Id: <20230118060039.3074016-3-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20230118060039.3074016-1-jiawenwu@trustnetic.com> References: <20230118060039.3074016-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybglogicsvr:qybglogicsvr5 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org On old firmware versions, the default value of signal quality(TX_EQ) is configured by the driver. Fix it for KX/KX4 mode. Fixes: 01c3cf5c85a7 ("net/txgbe: add autoneg control read and write") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_phy.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_phy.c b/drivers/net/txgbe/base/txgbe_phy.c index 9f46d5bdb0..87935abdaa 100644 --- a/drivers/net/txgbe/base/txgbe_phy.c +++ b/drivers/net/txgbe/base/txgbe_phy.c @@ -1693,9 +1693,10 @@ txgbe_set_link_to_kx4(struct txgbe_hw *hw, bool autoneg) wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } else if (hw->fw_version <= TXGBE_FW_N_TXEQ) { value = (0x1804 & ~0x3F3F); + value |= 40 << 8; wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - value = (0x50 & ~0x7F) | 40 | (1 << 6); + value = (0x50 & ~0x7F) | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } out: @@ -1907,10 +1908,10 @@ txgbe_set_link_to_kx(struct txgbe_hw *hw, value |= hw->phy.ffe_post | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } else if (hw->fw_version <= TXGBE_FW_N_TXEQ) { - value = (0x1804 & ~0x3F3F) | (24 << 8) | 4; + value = (0x1804 & ~0x3F3F) | (40 << 8); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - value = (0x50 & ~0x7F) | 16 | (1 << 6); + value = (0x50 & ~0x7F) | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } out: -- 2.27.0