From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6C14141B89 for ; Tue, 31 Jan 2023 07:53:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 618384114A; Tue, 31 Jan 2023 07:53:20 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id A2017410F6; Tue, 31 Jan 2023 07:53:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1675147999; x=1706683999; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=3ukZ8CZ0+U+iA+aofo6NIDKlRtfbsA1gSMron1xxyKE=; b=SC0fj5WMZZWZIlldpLu5D4+Rw76sk/CpOAN/fcztgKcS3MeA2JoDzU4M uR8TpFBtuUT7kjN8tR9gfHzpGt8y1Oiv+EbafuGxsQoGOiEx6/qawjT2b 1zRKhtRxXoHET/Qcrbpn5JXDbDMQ6qQQnp59u3eDFyEd0Jm5oBrDKSO7z RNzlDKP020LaCE9/9eaBXxNlBAQTm345mnIxp2ounwVN+hhkuE5XH5AWJ tzRVtENFJ097w68be18hVRzbpoiIKZhurHDKhpzDgx3G7y2vxEDYaeQb6 KVpW+b8nCBjcVk9Ofrc7kV28a2sJt6N6sWJ8aHs3M1UO6cR5FJY66UHG8 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="329037923" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="329037923" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2023 22:53:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10606"; a="666376030" X-IronPort-AV: E=Sophos;i="5.97,259,1669104000"; d="scan'208";a="666376030" Received: from unknown (HELO npg-dpdk-simeisu-cvl-119d218.sh.intel.com) ([10.67.119.208]) by fmsmga007.fm.intel.com with ESMTP; 30 Jan 2023 22:53:15 -0800 From: Simei Su To: beilei.xing@intel.com, yuying.zhang@intel.com, david.marchand@redhat.com Cc: dev@dpdk.org, qi.z.zhang@intel.com, qiming.yang@intel.com, Simei Su , stable@dpdk.org Subject: [PATCH v2] net/i40e: rework maximum frame size configuration Date: Tue, 31 Jan 2023 14:52:29 +0800 Message-Id: <20230131065229.290041-1-simei.su@intel.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20230116105318.19412-1-simei.su@intel.com> References: <20230116105318.19412-1-simei.su@intel.com> X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org This patch removes unnecessary link status check and adds link update. Fixes: a4ba77367923 ("net/i40e: enable maximum frame size at port level") Fixes: 2184f7cdeeaa ("net/i40e: fix max frame size config at port level") Fixes: 719469f13b11 ("net/i40e: fix jumbo frame Rx with X722") Cc: stable@dpdk.org Signed-off-by: Simei Su --- v2: * Refine commit log. * Add link update. drivers/net/i40e/i40e_ethdev.c | 54 +++++++++++------------------------------- 1 file changed, 14 insertions(+), 40 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 7726a89d..a3100ec 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -387,7 +387,6 @@ static int i40e_set_default_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr); static int i40e_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); -static void i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size); static int i40e_ethertype_filter_convert( const struct rte_eth_ethertype_filter *input, @@ -2467,8 +2466,18 @@ i40e_dev_start(struct rte_eth_dev *dev) "please call hierarchy_commit() " "before starting the port"); - max_frame_size = dev->data->mtu + I40E_ETH_OVERHEAD; - i40e_set_mac_max_frame(dev, max_frame_size); + i40e_dev_link_update(dev, 1); + + max_frame_size = dev->data->mtu ? + dev->data->mtu + I40E_ETH_OVERHEAD : + I40E_FRAME_SIZE_MAX; + + /* Set the max frame size to HW*/ + ret = i40e_aq_set_mac_config(hw, max_frame_size, TRUE, false, 0, NULL); + if (ret) { + PMD_DRV_LOG(ERR, "Fail to set mac config"); + return ret; + } return I40E_SUCCESS; @@ -2809,9 +2818,6 @@ i40e_dev_set_link_down(struct rte_eth_dev *dev) return i40e_phy_conf_link(hw, abilities, speed, false); } -#define CHECK_INTERVAL 100 /* 100ms */ -#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ - static __rte_always_inline void update_link_reg(struct i40e_hw *hw, struct rte_eth_link *link) { @@ -2878,6 +2884,8 @@ static __rte_always_inline void update_link_aq(struct i40e_hw *hw, struct rte_eth_link *link, bool enable_lse, int wait_to_complete) { +#define CHECK_INTERVAL 100 /* 100ms */ +#define MAX_REPEAT_TIME 10 /* 1s (10 * 100ms) in total */ uint32_t rep_cnt = MAX_REPEAT_TIME; struct i40e_link_status link_status; int status; @@ -12123,40 +12131,6 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf) return ret; } -static void -i40e_set_mac_max_frame(struct rte_eth_dev *dev, uint16_t size) -{ - struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint32_t rep_cnt = MAX_REPEAT_TIME; - struct rte_eth_link link; - enum i40e_status_code status; - bool can_be_set = true; - - /* - * I40E_MEDIA_TYPE_BASET link up can be ignored - * I40E_MEDIA_TYPE_BASET link down that hw->phy.media_type - * is I40E_MEDIA_TYPE_UNKNOWN - */ - if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && - hw->phy.media_type != I40E_MEDIA_TYPE_UNKNOWN) { - do { - update_link_reg(hw, &link); - if (link.link_status) - break; - rte_delay_ms(CHECK_INTERVAL); - } while (--rep_cnt); - can_be_set = !!link.link_status; - } - - if (can_be_set) { - status = i40e_aq_set_mac_config(hw, size, TRUE, 0, false, NULL); - if (status != I40E_SUCCESS) - PMD_DRV_LOG(ERR, "Failed to set max frame size at port level"); - } else { - PMD_DRV_LOG(ERR, "Set max frame size at port level not applicable on link down"); - } -} - RTE_LOG_REGISTER_SUFFIX(i40e_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(i40e_logtype_driver, driver, NOTICE); #ifdef RTE_ETHDEV_DEBUG_RX -- 2.9.5