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Sun, 5 Feb 2023 07:40:06 -0800 From: Maayan Kashani To: CC: , , , , Viacheslav Ovsiienko Subject: [PATCH] net/mlx5: fix ESP item validation in Verbs interface Date: Sun, 5 Feb 2023 17:39:52 +0200 Message-ID: <20230205153955.1372-1-mkashani@nvidia.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT018:EE_|SN7PR12MB7909:EE_ X-MS-Office365-Filtering-Correlation-Id: c5420f72-667f-4616-af74-08db078f464b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: kkXMc8Onb9wO4Nkak8VxVQFfFAmLsxXRGXJ19zmQgJ0hi0tn8Iq3NREuePCVMi1HbcIxK+4U8HxdjQgSd7zbpuGX79rQOK+QsVFlyp581eyUS2jesY9PnaiBhAPD4GD1lKWlmOlMEMZSprHtia1xRA3O8v2n5wwjV6x9tLU7Ia+Y+Ud8Z2WT1ARvE2CRYePNqjD2g6LK18NEgLrFC/Uk7SpQln7tJMOt5p3Xvkqnj/Pu1cWtKcIviNDICncgJ5/79S4W9DpX7NuKYzOj+ND2pYcov56BIfWbqT8onk7Ke4fWOM50Xt5mv0DgocfhAxuayZ6W+4ZsKdvRble+n1Q6rD3zAIEs4OWTo3PCahrDYreOf1yE6S7K/Es9fSBR98uGrvdblBR093qIwAVn2mjJACYXCjzU/RrFFrAI/Cj4SZb/L0eXETQrBDe0vdr2PqbBSHbpgiTKDAk86wbF1qwziWViI/G9/ZLhufGaC0WO2DBErxwLC/VrU26J8YDs+K9RcGxCFFbYSRQr1sH71mpESCUfkvydC2m33LAdKnnDCyYWtmsucNOG73iK4grUDx+FU8mgVT14hHh7i9QrgyviBoPzD9H7O4yyuysIPTZ0pg4qz1cEF/ZPXo3eifR7CfFBoX4HRrfbRrQR257xBbE24bEUuv+vtmyI5fHek1W4155NsVqniOFaUvOAd3jA/Wwyp1rTlbUTNtTmgdylTPspJw== X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230025)(4636009)(39860400002)(136003)(396003)(346002)(376002)(451199018)(40470700004)(36840700001)(46966006)(478600001)(70206006)(2906002)(7696005)(186003)(26005)(8936002)(8676002)(6666004)(107886003)(1076003)(41300700001)(6916009)(4326008)(450100002)(70586007)(6286002)(316002)(5660300002)(54906003)(82310400005)(82740400003)(40480700001)(40460700003)(36756003)(86362001)(356005)(55016003)(426003)(47076005)(83380400001)(7636003)(36860700001)(336012)(2616005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2023 15:40:14.2734 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c5420f72-667f-4616-af74-08db078f464b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7909 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org while added ESP item support in Verbs interface, mlx5_flow_os_validate_item_esp routine in windows/mlx5_flow_os.c was changed. all changes should be in mlx5_flow_verbs.c only. If ESP is not supported in verbs, return default "Item not supported error" during item validation stage. Also, updated mlx5.rst file regarding ESP SPI match support following further debug. Fixes: c1d039e ("net/mlx5: support ESP item in Verbs interface") Cc: stable@dpdk.org Signed-off-by: Maayan Kashani Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 4 ++-- drivers/net/mlx5/mlx5_flow_verbs.c | 2 ++ drivers/net/mlx5/windows/mlx5_flow_os.c | 9 ++------- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index f137f156f9..772dfa58ef 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -599,8 +599,8 @@ Limitations - The NIC egress flow rules on representor port are not supported. -- When using DV/verbs flow engine (``dv_flow_en`` = 1/0 respectively), Match on SPI field - in ESP header for group 0 needs MLNX_OFED 5.6+. +- When using DV/verbs flow engine (``dv_flow_en`` = 1/0 respectively), + Match on SPI field in ESP header for group 0 is supported from connectX-7. Statistics diff --git a/drivers/net/mlx5/mlx5_flow_verbs.c b/drivers/net/mlx5/mlx5_flow_verbs.c index 46a6c8e16f..99c60c2096 100644 --- a/drivers/net/mlx5/mlx5_flow_verbs.c +++ b/drivers/net/mlx5/mlx5_flow_verbs.c @@ -1330,6 +1330,7 @@ flow_verbs_validate(struct rte_eth_dev *dev, int ret = 0; switch (items->type) { +#ifdef HAVE_IBV_FLOW_SPEC_ESP case RTE_FLOW_ITEM_TYPE_ESP: ret = mlx5_flow_os_validate_item_esp(items, item_flags, next_protocol, @@ -1338,6 +1339,7 @@ flow_verbs_validate(struct rte_eth_dev *dev, return ret; last_item = MLX5_FLOW_ITEM_ESP; break; +#endif case RTE_FLOW_ITEM_TYPE_VOID: break; case RTE_FLOW_ITEM_TYPE_ETH: diff --git a/drivers/net/mlx5/windows/mlx5_flow_os.c b/drivers/net/mlx5/windows/mlx5_flow_os.c index b9c767ee14..5013e9f012 100644 --- a/drivers/net/mlx5/windows/mlx5_flow_os.c +++ b/drivers/net/mlx5/windows/mlx5_flow_os.c @@ -419,8 +419,8 @@ mlx5_flow_os_set_specific_workspace(struct mlx5_flow_workspace *data) int mlx5_flow_os_validate_item_esp(const struct rte_flow_item *item, - uint64_t item_flags __rte_unused, - uint8_t target_protocol __rte_unused, + uint64_t item_flags, + uint8_t target_protocol, struct rte_flow_error *error) { const struct rte_flow_item_esp *mask = item->mask; @@ -432,11 +432,6 @@ mlx5_flow_os_validate_item_esp(const struct rte_flow_item *item, MLX5_FLOW_LAYER_OUTER_L4; int ret; -#ifndef HAVE_IBV_FLOW_SPEC_ESP - return rte_flow_error_set(error, ENOTSUP, - RTE_FLOW_ERROR_TYPE_ITEM, item, - "ESP item not supported"); -#endif if (!(item_flags & l3m)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, -- 2.21.0