From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <stable-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
	by inbox.dpdk.org (Postfix) with ESMTP id DF34641CFB
	for <public@inbox.dpdk.org>; Tue, 21 Feb 2023 08:48:34 +0100 (CET)
Received: from mails.dpdk.org (localhost [127.0.0.1])
	by mails.dpdk.org (Postfix) with ESMTP id D185843190;
	Tue, 21 Feb 2023 08:48:34 +0100 (CET)
Received: from NAM12-BN8-obe.outbound.protection.outlook.com
 (mail-bn8nam12on2045.outbound.protection.outlook.com [40.107.237.45])
 by mails.dpdk.org (Postfix) with ESMTP id F133A40E5A;
 Tue, 21 Feb 2023 08:48:32 +0100 (CET)
ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;
 b=n3mEZCtHTzbc0Al2YXRAwlYoqNMNsfP42nAh7cHc5jA4qzeX29vyWIT7+nusAYB10UeyFAtSXQhFl4Kb17JIXEPujXRRN0HYHT5DLByv/amZkyi5PAqmgtNtbdyTN7HEBTo/LtJh75jSYVft5mzl2RWRUKI83Y4gKc84HPFZj4VLMGGIr6hUgSQQy7G21K5J07QldghUk7+5yJA3YXDHytar8hL3Spp7oXmBn68hL4YUNQISR4Hw6jWVgE0IKrjklxmuZ41GS47KQvKQwLNkFyi5QdcQ9mK3mGpy+ic2RNg1/f6rSTT4ySXVoowTniakp0sltYIikoTm9jWDBHoWvg==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; 
 s=arcselector9901;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;
 bh=F4nlO/KChZv3v83dZYXEoxTi+uYE3QUlT9oM2ZPHS+w=;
 b=bMMnbGitXnlfsLWt2AmVzht0UynKDA9aWwT7OoK8FOorhi9yr5NW46+nxorFxIJY/4lvBlLTGAagUT8xqd59ryh7WCyLGSlGnM82tgKW6yYzc/sSQ5psng1vXdBSijbl2jUZ5b4oyvmFk+nwYIvjIJ3oBu/NLD9WsvjV+a2c1dB8zeOC0A3/3NmHvY6jciQqa2pIXc1Pn/qkq5Evhgbyq1rdG5LZglgWNJxDH5WGwCOaMHei/zWVZ+2pFQGLBya9c8dQ8L2b44sD/I4dEP14TLZVtix7oxCndwrLtwRjL1ei0bkxSGiYqRjtfzqgRdN9nZXwxMe37uDg99VRGdWZUQ==
ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is
 216.228.117.160) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;
 dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;
 dkim=none (message not signed); arc=none
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;
 s=selector2;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=F4nlO/KChZv3v83dZYXEoxTi+uYE3QUlT9oM2ZPHS+w=;
 b=QLzCiIT0KG5NRXqgMBhpobi6B0xiO30THbnHG1OMLWY/p8hPoCqC7NlAQnwfn0RFPHruPWx/xYEWrs20R/3s/MYa84AbnEcYvHVWzSDclYtsPfD2hayRsn7/qAXcoDXluIof/A6+C65glFfIejsjtGjyjGqd1gyy8c37eaxTh/4P3vKJMfnlDfdKt/sCQ4Xjkvk/69COpRkqlb4WjAoGUaCrH0OHx4k3cwh4BpaN8uFp0xais3nYz5suUz+w+QSQsarI2Ho3lc2s3ZxtIk+T3Gv8DvaLToobK//4MSE75nDTjTjOPUDKkbrcnUoc/PTJYGKk+KfGr0w9ZEmFny0M7g==
Received: from DM6PR06CA0087.namprd06.prod.outlook.com (2603:10b6:5:336::20)
 by PH8PR12MB6937.namprd12.prod.outlook.com (2603:10b6:510:1bc::15) with
 Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6111.20; Tue, 21 Feb
 2023 07:48:31 +0000
Received: from DM6NAM11FT081.eop-nam11.prod.protection.outlook.com
 (2603:10b6:5:336:cafe::a8) by DM6PR06CA0087.outlook.office365.com
 (2603:10b6:5:336::20) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6111.21 via Frontend
 Transport; Tue, 21 Feb 2023 07:48:31 +0000
X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160)
 smtp.mailfrom=nvidia.com;
 dkim=none (message not signed)
 header.d=none;dmarc=pass action=none header.from=nvidia.com;
Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates
 216.228.117.160 as permitted sender) receiver=protection.outlook.com;
 client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C
Received: from mail.nvidia.com (216.228.117.160) by
 DM6NAM11FT081.mail.protection.outlook.com (10.13.172.136) with Microsoft SMTP
 Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id
 15.20.6134.17 via Frontend Transport; Tue, 21 Feb 2023 07:48:31 +0000
Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com
 (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 20 Feb
 2023 23:48:24 -0800
Received: from nvidia.com (10.126.231.37) by rnnvmail201.nvidia.com
 (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 20 Feb
 2023 23:48:23 -0800
From: Gerry Gribbon <ggribbon@nvidia.com>
To: <dev@dpdk.org>
CC: <stable@dpdk.org>, Ori Kam <orika@nvidia.com>
Subject: [PATCH] regex/mlx5: utilize all available QPs
Date: Tue, 21 Feb 2023 07:47:28 +0000
Message-ID: <20230221074728.1486004-1-ggribbon@nvidia.com>
X-Mailer: git-send-email 2.25.1
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
X-Originating-IP: [10.126.231.37]
X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To
 rnnvmail201.nvidia.com (10.129.68.8)
X-EOPAttributedMessage: 0
X-MS-PublicTrafficType: Email
X-MS-TrafficTypeDiagnostic: DM6NAM11FT081:EE_|PH8PR12MB6937:EE_
X-MS-Office365-Filtering-Correlation-Id: a2e6ff94-99d8-4b41-fb82-08db13e006f0
X-MS-Exchange-SenderADCheck: 1
X-MS-Exchange-AntiSpam-Relay: 0
X-Microsoft-Antispam: BCL:0;
X-Microsoft-Antispam-Message-Info: qHqrVKBPVE5Af1qLB4LUQAufo00PX6uNGnlIE79g3+9NG/1XpSm3cCl5ranH4elcdXDRhvYHp6YV+Z4iCfCUvfZBuHUMTym7QeZWf6lC7nkSORlU0/7S0trAO2gBkbblD9g3uAa4DwVUoXLgS96zueiLO1UegYIXEJdTBrV+wqmOgD4RyLM/Y6V3ZVPi6lRWFJkEedxdnYcQayi0KBweHFdNS+Qj72huvaBK/l2/TLx2k+Zt3lnbhxCFKPfMGCmAi5H+XKob6OpmU2TridFtc4nNH2T7DGs6PgUgNWXh6YvPDmvCWGVT59NtxGA36o7n9XOAneP7l7BIrteekjuOU0qRpEi0i8bGzlZoVacps5FuFmAgvqZeNGu3fj/ynzK2dYxcZMzQLqsKcM4m1XAThdsuXHs9zK7hs8RIaE5B+T8VzbsB4KTxWS+MyZPtNDu31aZfWyJHQquAo8thoPHg4X6bUnUxsPUOpWCNN6gHH/HWwm8uFsX+t/nuV2dH3SDZenxIKykH1QkaOwv35qsy5OgX9fEcV6od9nithJz5ayp1UkSKZouVBdMmVEbqiP82HRfsoB5ialYkdCfN6exWlP5Qap3LOujaW/NUQe+VaMM7dvNdkdlwbFeuG+hZqnsKZ3p1XlK2W1RClpWmu655/hRYraGWkOZjTVcPhXXBUST2jHPRYg/X8a2qzzht/Xhv3nYCCUQBW/tstmSGrYEnT8P3zCqgc8CFbn/xXBOqmak=
X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:;
 IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;
 SFS:(13230025)(4636009)(39860400002)(136003)(376002)(396003)(346002)(451199018)(36840700001)(40470700004)(46966006)(16526019)(82740400003)(186003)(26005)(2906002)(6286002)(41300700001)(7636003)(356005)(1076003)(107886003)(5660300002)(2616005)(36860700001)(8936002)(316002)(40460700003)(478600001)(70206006)(70586007)(8676002)(86362001)(336012)(6916009)(4326008)(82310400005)(450100002)(7696005)(36756003)(426003)(47076005)(40480700001)(83380400001)(55016003)(54906003)(131093003);
 DIR:OUT; SFP:1101; 
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Feb 2023 07:48:31.1709 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: a2e6ff94-99d8-4b41-fb82-08db13e006f0
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];
 Helo=[mail.nvidia.com]
X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT081.eop-nam11.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6937
X-BeenThere: stable@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: patches for DPDK stable branches <stable.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/stable>,
 <mailto:stable-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/stable/>
List-Post: <mailto:stable@dpdk.org>
List-Help: <mailto:stable-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/stable>,
 <mailto:stable-request@dpdk.org?subject=subscribe>
Errors-To: stable-bounces@dpdk.org

Fix overflow of free QP mask.
Regex used 64 QPs and used a bitmask to select a free QP for use.
The bitmask in use was only 32 bits so did not allow half of the QPs
to be utilised.
Upgraded to 64 bit mask and using ffsll now instead of ffs.

Fixes: 270032608503 ("regex/mlx5: refactor HW queue objects")
Cc: stable@dpdk.org

Signed-off-by: Gerry Gribbon <ggribbon@nvidia.com>
---
 drivers/regex/mlx5/mlx5_regex.h          |  2 +-
 drivers/regex/mlx5/mlx5_regex_fastpath.c | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/regex/mlx5/mlx5_regex.h b/drivers/regex/mlx5/mlx5_regex.h
index b8554fd1cf..481f6fc59f 100644
--- a/drivers/regex/mlx5/mlx5_regex.h
+++ b/drivers/regex/mlx5/mlx5_regex.h
@@ -37,7 +37,7 @@ struct mlx5_regex_qp {
 	struct mlx5_regex_hw_qp *qps; /* Pointer to qp array. */
 	uint16_t nb_obj; /* Number of qp objects. */
 	struct mlx5_regex_cq cq; /* CQ struct. */
-	uint32_t free_qps;
+	uint64_t free_qps;
 	struct mlx5_regex_job *jobs;
 	struct ibv_mr *metadata;
 	struct ibv_mr *outputs;
diff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c
index 143c7d7cdf..6c87afa923 100644
--- a/drivers/regex/mlx5/mlx5_regex_fastpath.c
+++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c
@@ -417,7 +417,7 @@ mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id,
 		return 0;
 #endif
 
-	while ((hw_qpid = ffs(queue->free_qps))) {
+	while ((hw_qpid = ffsll(queue->free_qps))) {
 		hw_qpid--; /* ffs returns 1 for bit 0 */
 		qp_obj = &queue->qps[hw_qpid];
 		nb_desc = get_free(qp_obj, priv->has_umr);
@@ -426,7 +426,7 @@ mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id,
 			if (nb_desc > nb_left)
 				nb_desc = nb_left;
 			else
-				queue->free_qps &= ~(1 << hw_qpid);
+				queue->free_qps &= ~(1ULL << hw_qpid);
 			prep_regex_umr_wqe_set(priv, queue, qp_obj, ops,
 				nb_desc);
 			send_doorbell(priv, qp_obj);
@@ -456,7 +456,7 @@ mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
 		return 0;
 #endif
 
-	while ((hw_qpid = ffs(queue->free_qps))) {
+	while ((hw_qpid = ffsll(queue->free_qps))) {
 		hw_qpid--; /* ffs returns 1 for bit 0 */
 		qp_obj = &queue->qps[hw_qpid];
 		while (get_free(qp_obj, priv->has_umr)) {
@@ -470,7 +470,7 @@ mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
 				goto out;
 			}
 		}
-		queue->free_qps &= ~(1 << hw_qpid);
+		queue->free_qps &= ~(1ULL << hw_qpid);
 		send_doorbell(priv, qp_obj);
 	}
 
@@ -603,7 +603,7 @@ mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id,
 		cq->ci = (cq->ci + 1) & 0xffffff;
 		rte_wmb();
 		cq->cq_obj.db_rec[0] = rte_cpu_to_be_32(cq->ci);
-		queue->free_qps |= (1 << hw_qpid);
+		queue->free_qps |= (1ULL << hw_qpid);
 	}
 
 out:
@@ -642,7 +642,7 @@ setup_qps(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *queue)
 				     (uintptr_t)job->output);
 			wqe += 64;
 		}
-		queue->free_qps |= 1 << hw_qpid;
+		queue->free_qps |= 1ULL << hw_qpid;
 	}
 }
 
-- 
2.25.1