From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A91C1429AA for ; Fri, 21 Apr 2023 10:46:07 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 90A2242D2C; Fri, 21 Apr 2023 10:46:07 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 361F0410DD; Fri, 21 Apr 2023 10:46:03 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682066763; x=1713602763; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VQXRouaK+IKPG/RNj7a4FchRTe4L3XqOPsszmvYTy6E=; b=A1CguqfJzCp+jRynJPQeXteTTVy7/yfkAjzYRgATzN6shdy4q8cteeHI 33+XIe6CsmkRsXxL3t4ExyUdTRGDyyYCGFx+WK8sLqRXddXCzImGTUfpu gPWJlkxGfl0JwFILOsCHC5W+q+NsweY9XyLqc8nsvJUipnPrckZy4BkKq MctWQQLByWaACnGYSnEDk/zTcQ3Xddh/xitk94Ig0PZMZTgHfocDKn+e0 Ozgmg1slrEqspsSVaqtE37LlIhREuYHsQNTc6enakhaCiGNrcqSkxipxg NomdLd6R8KhF0LJksRu9CncIbaRrkh1lcqphMwf7QPGVrh/jRET3sgiuY g==; X-IronPort-AV: E=McAfee;i="6600,9927,10686"; a="334822820" X-IronPort-AV: E=Sophos;i="5.99,214,1677571200"; d="scan'208";a="334822820" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2023 01:46:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10686"; a="761501376" X-IronPort-AV: E=Sophos;i="5.99,214,1677571200"; d="scan'208";a="761501376" Received: from dpdk-wenjing-01.sh.intel.com ([10.67.118.239]) by fmsmga004.fm.intel.com with ESMTP; 21 Apr 2023 01:46:00 -0700 From: Wenjing Qiao To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, Wenjing Qiao , stable@dpdk.org, Charles Stoll Subject: [PATCH v2 02/15] common/idpf: fix ctlq message send and receive Date: Fri, 21 Apr 2023 04:40:30 -0400 Message-Id: <20230421084043.135503-3-wenjing.qiao@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230421084043.135503-1-wenjing.qiao@intel.com> References: <20230413094502.1714755-2-wenjing.qiao@intel.com> <20230421084043.135503-1-wenjing.qiao@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Fixes the ctlq send and receive functions to not cast the cookie field to a u64 before programming. By doing a cast, it can cause endianness issues as LE will swap the lower 32 and higher 32 bits whereas BE will not. By treating this field as two 32 bit values, both BE and LE will place the retval and opcode in the correct location. Since this field is now being treated as two 32 bit values, the cfg.data section must also be split into a data high and data low. Macros to easily pack and read these fields have also been added. Fixes: fb4ac04e9bfa ("common/idpf: introduce common library") Cc: stable@dpdk.org Signed-off-by: Charles Stoll Signed-off-by: Wenjing Qiao --- drivers/common/idpf/base/idpf_controlq.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index 3af81e5a64..8e4d3ee54f 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -311,18 +311,14 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq, for (i = 0; i < num_q_msg; i++) { struct idpf_ctlq_msg *msg = &q_msg[i]; - u64 msg_cookie; desc = IDPF_CTLQ_DESC(cq, cq->next_to_use); desc->opcode = CPU_TO_LE16(msg->opcode); desc->pfid_vfid = CPU_TO_LE16(msg->func_id); - msg_cookie = *(u64 *)&msg->cookie; - desc->cookie_high = - CPU_TO_LE32(IDPF_HI_DWORD(msg_cookie)); - desc->cookie_low = - CPU_TO_LE32(IDPF_LO_DWORD(msg_cookie)); + desc->cookie_high = CPU_TO_LE32(msg->cookie.mbx.chnl_opcode); + desc->cookie_low = CPU_TO_LE32(msg->cookie.mbx.chnl_retval); desc->flags = CPU_TO_LE16((msg->host_id & IDPF_HOST_ID_MASK) << IDPF_CTLQ_FLAG_HOST_ID_S); @@ -620,8 +616,6 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg, num_to_clean = *num_q_msg; for (i = 0; i < num_to_clean; i++) { - u64 msg_cookie; - /* Fetch next descriptor and check if marked as done */ desc = IDPF_CTLQ_DESC(cq, ntc); flags = LE16_TO_CPU(desc->flags); @@ -639,10 +633,8 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg, if (flags & IDPF_CTLQ_FLAG_ERR) ret_code = -EBADMSG; - msg_cookie = (u64)LE32_TO_CPU(desc->cookie_high) << 32; - msg_cookie |= (u64)LE32_TO_CPU(desc->cookie_low); - idpf_memcpy(&q_msg[i].cookie, &msg_cookie, sizeof(u64), - IDPF_NONDMA_TO_NONDMA); + q_msg[i].cookie.mbx.chnl_opcode = LE32_TO_CPU(desc->cookie_high); + q_msg[i].cookie.mbx.chnl_retval = LE32_TO_CPU(desc->cookie_low); q_msg[i].opcode = LE16_TO_CPU(desc->opcode); q_msg[i].data_len = LE16_TO_CPU(desc->datalen); -- 2.25.1