[PATCH v4 4/7] common/idpf: enhance timestamp offload feature for ACC

[Wenjing Qiao <wenjing.qiao@intel.com>]

For ACC, getting main time from MTS registers by shared memory.

Notice: it is a workaround, and it will be removed after generic
solution are provided.

Fixes: 8c6098afa075 ("common/idpf: add Rx/Tx data path")
Cc: stable@dpdk.org

Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
 drivers/common/idpf/base/idpf_osdep.h  | 48 ++++++++++++++++++++++++++
 drivers/common/idpf/idpf_common_rxtx.c | 30 +++++++++++++---
 drivers/common/idpf/meson.build        |  2 ++
 3 files changed, 76 insertions(+), 4 deletions(-)

diff --git a/drivers/common/idpf/base/idpf_osdep.h b/drivers/common/idpf/base/idpf_osdep.h
index 2a817a9807..d1668aa603 100644
--- a/drivers/common/idpf/base/idpf_osdep.h
+++ b/drivers/common/idpf/base/idpf_osdep.h
@@ -25,6 +25,13 @@
 #include <rte_io.h>
 #include <rte_compat.h>
 
+#ifdef IDPF_ACC_TIMESTAMP
+#include <stdio.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <sys/mman.h>
+#endif /* IDPF_ACC_TIMESTAMP */
+
 #define INLINE inline
 #define STATIC static
 
@@ -346,4 +353,45 @@ idpf_hweight32(u32 num)
 
 #endif
 
+#ifdef IDPF_ACC_TIMESTAMP
+#define IDPF_ACC_TIMESYNC_BASE_ADDR 0x480D500000
+#define IDPF_ACC_GLTSYN_TIME_H (IDPF_ACC_TIMESYNC_BASE_ADDR + 0x1C)
+#define IDPF_ACC_GLTSYN_TIME_L (IDPF_ACC_TIMESYNC_BASE_ADDR + 0x10)
+
+inline uint32_t
+idpf_mmap_r32(uint64_t pa)
+{
+	int fd;
+	void *bp, *vp;
+	uint32_t rval = 0xdeadbeef;
+	uint32_t ps, ml, of;
+
+	fd = open("/dev/mem", (O_RDWR | O_SYNC));
+	if (fd == -1) {
+		perror("/dev/mem");
+		return -1;
+	}
+	ml = ps = getpagesize();
+	of = (uint32_t)pa & (ps - 1);
+	if (of + (sizeof(uint32_t) * 4) > ps)
+		ml *= 2;
+	bp = mmap(NULL, ml, (PROT_READ | PROT_WRITE), MAP_SHARED, fd, pa & ~(uint64_t)(ps - 1));
+	if (bp == MAP_FAILED) {
+		perror("mmap");
+		goto done;
+	}
+
+	vp = (char *)bp + of;
+
+	rval = *(volatile uint32_t *)vp;
+	if (munmap(bp, ml) == -1)
+		perror("munmap");
+done:
+	close(fd);
+
+	return rval;
+}
+
+#endif /* IDPF_ACC_TIMESTAMP */
+
 #endif /* _IDPF_OSDEP_H_ */
diff --git a/drivers/common/idpf/idpf_common_rxtx.c b/drivers/common/idpf/idpf_common_rxtx.c
index b487c2a8a6..13e94dda43 100644
--- a/drivers/common/idpf/idpf_common_rxtx.c
+++ b/drivers/common/idpf/idpf_common_rxtx.c
@@ -354,12 +354,36 @@ idpf_qc_tx_queue_release(void *txq)
 static void
 idpf_dev_read_time_hw(void *cb_arg)
 {
-#ifdef RTE_ARCH_X86_64
 	struct idpf_adapter *ad = (struct idpf_adapter *)cb_arg;
 	uint32_t hi, lo, lo2;
 	int rc = 0;
+#ifndef IDPF_ACC_TIMESTAMP
 	struct idpf_hw *hw = &ad->hw;
+#endif /*  !IDPF_ACC_TIMESTAMP */
 
+#ifdef IDPF_ACC_TIMESTAMP
+
+	lo = idpf_mmap_r32(IDPF_ACC_GLTSYN_TIME_L);
+	hi = idpf_mmap_r32(IDPF_ACC_GLTSYN_TIME_H);
+	DRV_LOG(DEBUG, "lo : %X,", lo);
+	DRV_LOG(DEBUG, "hi : %X,", hi);
+	/*
+	 * On typical system, the delta between lo and lo2 is ~1000ns,
+	 * so 10000 seems a large-enough but not overly-big guard band.
+	 */
+	if (lo > (UINT32_MAX - IDPF_TIMESYNC_REG_WRAP_GUARD_BAND))
+		lo2 = idpf_mmap_r32(IDPF_ACC_GLTSYN_TIME_L);
+	else
+		lo2 = lo;
+
+	if (lo2 < lo) {
+		lo = idpf_mmap_r32(IDPF_ACC_GLTSYN_TIME_L);
+		hi = idpf_mmap_r32(IDPF_ACC_GLTSYN_TIME_H);
+	}
+
+	ad->time_hw = ((uint64_t)hi << 32) | lo;
+
+#else  /* !IDPF_ACC_TIMESTAMP */
 	IDPF_WRITE_REG(hw, GLTSYN_CMD_SYNC_0_0, PF_GLTSYN_CMD_SYNC_SHTIME_EN_M);
 	IDPF_WRITE_REG(hw, GLTSYN_CMD_SYNC_0_0,
 		       PF_GLTSYN_CMD_SYNC_EXEC_CMD_M | PF_GLTSYN_CMD_SYNC_SHTIME_EN_M);
@@ -380,9 +404,7 @@ idpf_dev_read_time_hw(void *cb_arg)
 	}
 
 	ad->time_hw = ((uint64_t)hi << 32) | lo;
-#else  /* !RTE_ARCH_X86_64 */
-	ad->time_hw = 0;
-#endif /* RTE_ARCH_X86_64 */
+#endif /* IDPF_ACC_TIMESTAMP */
 
 	/* re-alarm watchdog */
 	rc = rte_eal_alarm_set(1000 * 1000, &idpf_dev_read_time_hw, cb_arg);
diff --git a/drivers/common/idpf/meson.build b/drivers/common/idpf/meson.build
index 80c8906f80..11682a27d5 100644
--- a/drivers/common/idpf/meson.build
+++ b/drivers/common/idpf/meson.build
@@ -45,3 +45,5 @@ if arch_subdir == 'x86'
 endif
 
 subdir('base')
+
+ dpdk_conf.set('IDPF_ACC_TIMESTAMP', false)
-- 
2.25.1