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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CY4PEPF0000E9DA.mail.protection.outlook.com (10.167.241.79) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6652.20 via Frontend Transport; Wed, 9 Aug 2023 23:54:29 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Wed, 9 Aug 2023 16:54:15 -0700 Received: from nvidia.com (10.126.230.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Wed, 9 Aug 2023 16:54:13 -0700 From: Xueming Li To: Ruifeng Wang CC: Ali Alnubani , Viacheslav Ovsiienko , dpdk stable Subject: patch 'net/mlx5: fix risk in NEON Rx descriptor read' has been queued to stable release 22.11.3 Date: Thu, 10 Aug 2023 07:48:07 +0800 Message-ID: <20230809234930.32424-46-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230809234930.32424-1-xuemingl@nvidia.com> References: <20230625063544.11183-1-xuemingl@nvidia.com> <20230809234930.32424-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.37] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DA:EE_|DM4PR12MB6638:EE_ X-MS-Office365-Filtering-Correlation-Id: 825211aa-2f9b-4802-0243-08db9933f870 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Aug 2023 23:54:29.2435 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 825211aa-2f9b-4802-0243-08db9933f870 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6638 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 22.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/11/23. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=ce6b9b3772a3da8cc0c42712cdb90c95419d9603 Thanks. Xueming Li --- >From ce6b9b3772a3da8cc0c42712cdb90c95419d9603 Mon Sep 17 00:00:00 2001 From: Ruifeng Wang Date: Tue, 30 May 2023 13:48:04 +0800 Subject: [PATCH] net/mlx5: fix risk in NEON Rx descriptor read Cc: Xueming Li [ upstream commit 7ac7450b20d1e11a20c138707663867918b39403 ] In NEON vector PMD, vector load loads two contiguous 8B of descriptor data into vector register. Given vector load ensures no 16B atomicity, read of the word that includes op_own field could be reordered after read of other words. In this case, some words could contain invalid data. Reloaded qword0 after read barrier to update vector register. This ensures that the fetched data is correct. Testpmd single core test on N1SDP/ThunderX2 showed no performance drop. Fixes: 1742c2d9fab0 ("net/mlx5: fix synchronization on polling Rx completions") Signed-off-by: Ruifeng Wang Tested-by: Ali Alnubani Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h index 41b9cf5444..6d3c594e56 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h @@ -647,6 +647,14 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, c0 = vld1q_u64((uint64_t *)(p0 + 48)); /* Synchronize for loading the rest of blocks. */ rte_io_rmb(); + /* B.0 (CQE 3) reload lower half of the block. */ + c3 = vld1q_lane_u64((uint64_t *)(p3 + 48), c3, 0); + /* B.0 (CQE 2) reload lower half of the block. */ + c2 = vld1q_lane_u64((uint64_t *)(p2 + 48), c2, 0); + /* B.0 (CQE 1) reload lower half of the block. */ + c1 = vld1q_lane_u64((uint64_t *)(p1 + 48), c1, 0); + /* B.0 (CQE 0) reload lower half of the block. */ + c0 = vld1q_lane_u64((uint64_t *)(p0 + 48), c0, 0); /* Prefetch next 4 CQEs. */ if (pkts_n - pos >= 2 * MLX5_VPMD_DESCS_PER_LOOP) { unsigned int next = pos + MLX5_VPMD_DESCS_PER_LOOP; -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2023-08-09 21:51:19.393188200 +0800 +++ 0045-net-mlx5-fix-risk-in-NEON-Rx-descriptor-read.patch 2023-08-09 21:51:18.194352000 +0800 @@ -1 +1 @@ -From 7ac7450b20d1e11a20c138707663867918b39403 Mon Sep 17 00:00:00 2001 +From ce6b9b3772a3da8cc0c42712cdb90c95419d9603 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 7ac7450b20d1e11a20c138707663867918b39403 ] @@ -18 +20,0 @@ -Cc: stable@dpdk.org @@ -28 +30 @@ -index 91c85bec6d..3ed688191f 100644 +index 41b9cf5444..6d3c594e56 100644 @@ -31 +33 @@ -@@ -675,6 +675,14 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, +@@ -647,6 +647,14 @@ rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,