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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SA2PEPF000015C9.mail.protection.outlook.com (10.167.241.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6652.20 via Frontend Transport; Thu, 10 Aug 2023 00:12:01 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Wed, 9 Aug 2023 17:11:47 -0700 Received: from nvidia.com (10.126.231.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Wed, 9 Aug 2023 17:11:46 -0700 From: Xueming Li To: Alexander Kozyrev CC: Viacheslav Ovsiienko , dpdk stable Subject: patch 'net/mlx5: fix MPRQ stride size for headroom' has been queued to stable release 22.11.3 Date: Thu, 10 Aug 2023 08:10:31 +0800 Message-ID: <20230810001045.2662-11-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230810001045.2662-1-xuemingl@nvidia.com> References: <20230625063544.11183-1-xuemingl@nvidia.com> <20230810001045.2662-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.37] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C9:EE_|DM6PR12MB4297:EE_ X-MS-Office365-Filtering-Correlation-Id: fb4085b8-62b8-4bd0-5267-08db99366be7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2023 00:12:01.9412 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fb4085b8-62b8-4bd0-5267-08db99366be7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4297 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 22.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/11/23. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=9a2a6168fc205306b2f092d4f72ac487f87c8d4d Thanks. Xueming Li --- >From 9a2a6168fc205306b2f092d4f72ac487f87c8d4d Mon Sep 17 00:00:00 2001 From: Alexander Kozyrev Date: Wed, 31 May 2023 22:00:18 +0300 Subject: [PATCH] net/mlx5: fix MPRQ stride size for headroom Cc: Xueming Li [ upstream commit e6479f009fbd9c8e873807cc928dcf91a151aba9 ] The space for the headroom is reserved at the end of every MPRQ stride for the next packet. The Rx burst logic is to copy any overlapping packet data if there is an overlap with this reserved headroom space. But it is not possible if the headroom size is bigger than the whole stride. Adjust the stride size to make sure the stride size is greater than the headroom size. Fixes: 34776af600df ("net/mlx5: fix MPRQ stride devargs adjustment") Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5.c | 1 + drivers/net/mlx5/mlx5_rxq.c | 41 +++++++++++++++++++++++++------------ 2 files changed, 29 insertions(+), 13 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 79ccea5003..8250c94803 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -2479,6 +2479,7 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct mlx5_kvargs_ctrl *mkvlist, config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM; + config->mprq.log_stride_size = MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE; config->log_hp_size = MLX5_ARG_UNSET; config->std_delay_drop = 0; config->hp_delay_drop = 0; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index a42c70f898..6b2af87cd2 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1601,23 +1601,38 @@ mlx5_mprq_prepare(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, } else { *actual_log_stride_num = config->mprq.log_stride_num; } - if (config->mprq.log_stride_size) { - /* Checks if chosen size of stride is in supported range. */ - if (config->mprq.log_stride_size > log_max_stride_size || - config->mprq.log_stride_size < log_min_stride_size) { - *actual_log_stride_size = log_def_stride_size; + /* Checks if chosen size of stride is in supported range. */ + if (config->mprq.log_stride_size > log_max_stride_size || + config->mprq.log_stride_size < log_min_stride_size) { + *actual_log_stride_size = log_def_stride_size; + DRV_LOG(WARNING, + "Port %u Rx queue %u size of a stride for Multi-Packet RQ is out of range, setting default value (%u)", + dev->data->port_id, idx, + RTE_BIT32(log_def_stride_size)); + } else { + *actual_log_stride_size = config->mprq.log_stride_size; + } + /* Make the stride fit the mbuf size by default. */ + if (*actual_log_stride_size == MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE) { + if (min_mbuf_size <= RTE_BIT32(log_max_stride_size)) { DRV_LOG(WARNING, - "Port %u Rx queue %u size of a stride for Multi-Packet RQ is out of range, setting default value (%u)", - dev->data->port_id, idx, - RTE_BIT32(log_def_stride_size)); + "Port %u Rx queue %u size of a stride for Multi-Packet RQ is adjusted to match the mbuf size (%u)", + dev->data->port_id, idx, min_mbuf_size); + *actual_log_stride_size = log2above(min_mbuf_size); } else { - *actual_log_stride_size = config->mprq.log_stride_size; + goto unsupport; } - } else { - if (min_mbuf_size <= RTE_BIT32(log_max_stride_size)) - *actual_log_stride_size = log2above(min_mbuf_size); - else + } + /* Make sure the stride size is greater than the headroom. */ + if (RTE_BIT32(*actual_log_stride_size) < RTE_PKTMBUF_HEADROOM) { + if (RTE_BIT32(log_max_stride_size) > RTE_PKTMBUF_HEADROOM) { + DRV_LOG(WARNING, + "Port %u Rx queue %u size of a stride for Multi-Packet RQ is adjusted to accommodate the headroom (%u)", + dev->data->port_id, idx, RTE_PKTMBUF_HEADROOM); + *actual_log_stride_size = log2above(RTE_PKTMBUF_HEADROOM); + } else { goto unsupport; + } } log_stride_wqe_size = *actual_log_stride_num + *actual_log_stride_size; /* Check if WQE buffer size is supported by hardware. */ -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2023-08-09 21:51:21.062732700 +0800 +++ 0114-net-mlx5-fix-MPRQ-stride-size-for-headroom.patch 2023-08-09 21:51:18.284352000 +0800 @@ -1 +1 @@ -From e6479f009fbd9c8e873807cc928dcf91a151aba9 Mon Sep 17 00:00:00 2001 +From 9a2a6168fc205306b2f092d4f72ac487f87c8d4d Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit e6479f009fbd9c8e873807cc928dcf91a151aba9 ] @@ -14 +16,0 @@ -Cc: stable@dpdk.org @@ -24 +26 @@ -index fd9b76027d..b373306f98 100644 +index 79ccea5003..8250c94803 100644 @@ -27 +29 @@ -@@ -2603,6 +2603,7 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct mlx5_kvargs_ctrl *mkvlist, +@@ -2479,6 +2479,7 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct mlx5_kvargs_ctrl *mkvlist, @@ -36 +38 @@ -index ec713009d7..8ef7860e16 100644 +index a42c70f898..6b2af87cd2 100644 @@ -39 +41 @@ -@@ -1604,23 +1604,38 @@ mlx5_mprq_prepare(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, +@@ -1601,23 +1601,38 @@ mlx5_mprq_prepare(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,