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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DS1PEPF00017094.mail.protection.outlook.com (10.167.17.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.15 via Frontend Transport; Sun, 22 Oct 2023 14:28:15 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 22 Oct 2023 07:28:01 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 22 Oct 2023 07:27:59 -0700 From: Xueming Li To: Aakash Sasidharan CC: Anoob Joseph , dpdk stable Subject: patch 'event/cnxk: fix return values for capability API' has been queued to stable release 22.11.4 Date: Sun, 22 Oct 2023 22:21:26 +0800 Message-ID: <20231022142250.10324-58-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231022142250.10324-1-xuemingl@nvidia.com> References: <20231022142250.10324-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017094:EE_|CH3PR12MB8534:EE_ X-MS-Office365-Filtering-Correlation-Id: 96282621-3f27-4596-7e8d-08dbd30b20e3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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SFS:(13230031)(4636009)(376002)(39850400004)(136003)(396003)(346002)(230922051799003)(186009)(82310400011)(451199024)(1800799009)(64100799003)(46966006)(36840700001)(40470700004)(26005)(6286002)(4001150100001)(2906002)(55016003)(36860700001)(41300700001)(40460700003)(86362001)(5660300002)(36756003)(8676002)(8936002)(4326008)(2616005)(356005)(478600001)(7696005)(6666004)(16526019)(7636003)(1076003)(82740400003)(54906003)(316002)(70206006)(70586007)(6916009)(83380400001)(53546011)(966005)(40480700001)(426003)(336012)(47076005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2023 14:28:15.1531 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 96282621-3f27-4596-7e8d-08dbd30b20e3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017094.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8534 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 22.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/15/23. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=6e9061bd7785010b5c49c4dd70aaa3ff1caa91c3 Thanks. Xueming Li --- >From 6e9061bd7785010b5c49c4dd70aaa3ff1caa91c3 Mon Sep 17 00:00:00 2001 From: Aakash Sasidharan Date: Tue, 22 Aug 2023 18:46:47 +0530 Subject: [PATCH] event/cnxk: fix return values for capability API Cc: Xueming Li [ upstream commit bccb1d4f10e12c396058c06c3ba9e3565633390e ] When event_cnxk or crypto_cnxk PMDs are not available, return -ENOTSUP instead of -EINVAL. This would allow unit test to be skipped when the devices are not available. Fixes: 19f81cb59cb4 ("event/cnxk: add crypto adapter operations") Signed-off-by: Aakash Sasidharan Acked-by: Anoob Joseph --- drivers/event/cnxk/cn10k_eventdev.c | 16 ++++++++-------- drivers/event/cnxk/cn9k_eventdev.c | 16 ++++++++-------- drivers/event/cnxk/cnxk_eventdev.h | 4 ++-- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 30c922b5fc..77014ada00 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -1024,8 +1024,8 @@ static int cn10k_crypto_adapter_caps_get(const struct rte_eventdev *event_dev, const struct rte_cryptodev *cdev, uint32_t *caps) { - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k", ENOTSUP); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k", ENOTSUP); *caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD | RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA | @@ -1043,8 +1043,8 @@ cn10k_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); int ret; - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k", EINVAL); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k", EINVAL); dev->is_ca_internal_port = 1; cn10k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev); @@ -1059,8 +1059,8 @@ static int cn10k_crypto_adapter_qp_del(const struct rte_eventdev *event_dev, const struct rte_cryptodev *cdev, int32_t queue_pair_id) { - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k", EINVAL); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k", EINVAL); return cnxk_crypto_adapter_qp_del(cdev, queue_pair_id); } @@ -1078,8 +1078,8 @@ cn10k_crypto_adapter_vec_limits(const struct rte_eventdev *event_dev, const struct rte_cryptodev *cdev, struct rte_event_crypto_adapter_vector_limits *limits) { - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn10k", EINVAL); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn10k", EINVAL); limits->log2_sz = false; limits->min_sz = 0; diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index f5a42a86f8..4f362a8e80 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -1110,11 +1110,11 @@ cn9k_sso_tx_adapter_queue_del(uint8_t id, const struct rte_eventdev *event_dev, } static int -cn9k_crypto_adapter_caps_get(const struct rte_eventdev *event_dev, - const struct rte_cryptodev *cdev, uint32_t *caps) +cn9k_crypto_adapter_caps_get(const struct rte_eventdev *event_dev, const struct rte_cryptodev *cdev, + uint32_t *caps) { - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn9k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k", ENOTSUP); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn9k", ENOTSUP); *caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD | RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA; @@ -1131,8 +1131,8 @@ cn9k_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); int ret; - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn9k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k", EINVAL); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn9k", EINVAL); dev->is_ca_internal_port = 1; cn9k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev); @@ -1147,8 +1147,8 @@ static int cn9k_crypto_adapter_qp_del(const struct rte_eventdev *event_dev, const struct rte_cryptodev *cdev, int32_t queue_pair_id) { - CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k"); - CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn9k"); + CNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, "event_cn9k", EINVAL); + CNXK_VALID_DEV_OR_ERR_RET(cdev->device, "crypto_cn9k", EINVAL); return cnxk_crypto_adapter_qp_del(cdev, queue_pair_id); } diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h index b4e5f81f8c..44a39648e3 100644 --- a/drivers/event/cnxk/cnxk_eventdev.h +++ b/drivers/event/cnxk/cnxk_eventdev.h @@ -65,10 +65,10 @@ (min + val / ((max + cnt - 1) / cnt)) #define CNXK_SSO_FLUSH_RETRY_MAX 0xfff -#define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name) \ +#define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name, err_val) \ do { \ if (strncmp(dev->driver->name, drv_name, strlen(drv_name))) \ - return -EINVAL; \ + return -err_val; \ } while (0) typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id); -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2023-10-22 22:17:36.504530900 +0800 +++ 0057-event-cnxk-fix-return-values-for-capability-API.patch 2023-10-22 22:17:34.276723700 +0800 @@ -1 +1 @@ -From bccb1d4f10e12c396058c06c3ba9e3565633390e Mon Sep 17 00:00:00 2001 +From 6e9061bd7785010b5c49c4dd70aaa3ff1caa91c3 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit bccb1d4f10e12c396058c06c3ba9e3565633390e ] @@ -12 +14,0 @@ -Cc: stable@dpdk.org @@ -23 +25 @@ -index 499a3aace7..c5d4be0474 100644 +index 30c922b5fc..77014ada00 100644 @@ -26 +28 @@ -@@ -911,8 +911,8 @@ static int +@@ -1024,8 +1024,8 @@ static int @@ -37,2 +39,2 @@ -@@ -929,8 +929,8 @@ cn10k_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, - { +@@ -1043,8 +1043,8 @@ cn10k_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); @@ -45,0 +48 @@ + dev->is_ca_internal_port = 1; @@ -47,2 +50 @@ - -@@ -944,8 +944,8 @@ static int +@@ -1059,8 +1059,8 @@ static int @@ -59 +61 @@ -@@ -963,8 +963,8 @@ cn10k_crypto_adapter_vec_limits(const struct rte_eventdev *event_dev, +@@ -1078,8 +1078,8 @@ cn10k_crypto_adapter_vec_limits(const struct rte_eventdev *event_dev, @@ -71 +73 @@ -index 6cce5477f0..f77a9d7085 100644 +index f5a42a86f8..4f362a8e80 100644 @@ -74 +76 @@ -@@ -942,11 +942,11 @@ cn9k_sso_tx_adapter_queue_del(uint8_t id, const struct rte_eventdev *event_dev, +@@ -1110,11 +1110,11 @@ cn9k_sso_tx_adapter_queue_del(uint8_t id, const struct rte_eventdev *event_dev, @@ -90,2 +92,2 @@ -@@ -962,8 +962,8 @@ cn9k_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, - { +@@ -1131,8 +1131,8 @@ cn9k_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); @@ -98,0 +101 @@ + dev->is_ca_internal_port = 1; @@ -100,2 +103 @@ - -@@ -977,8 +977,8 @@ static int +@@ -1147,8 +1147,8 @@ static int @@ -113 +115 @@ -index 9d95092669..bd50de87c0 100644 +index b4e5f81f8c..44a39648e3 100644 @@ -116 +118 @@ -@@ -48,10 +48,10 @@ +@@ -65,10 +65,10 @@