From: Kevin Traynor <ktraynor@redhat.com>
To: Jiawei Wang <jiaweiw@nvidia.com>
Cc: Ori Kam <orika@nvidia.com>, dpdk stable <stable@dpdk.org>
Subject: patch 'net/mlx5: fix E-Switch mirror flow rule validation' has been queued to stable release 21.11.6
Date: Thu, 16 Nov 2023 13:23:14 +0000 [thread overview]
Message-ID: <20231116132348.557257-32-ktraynor@redhat.com> (raw)
In-Reply-To: <20231116132348.557257-1-ktraynor@redhat.com>
Hi,
FYI, your patch has been queued to stable release 21.11.6
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/21/23. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable/commit/986d9d2fbb4950db6b47042210f6dbcd0083f2db
Thanks.
Kevin
---
From 986d9d2fbb4950db6b47042210f6dbcd0083f2db Mon Sep 17 00:00:00 2001
From: Jiawei Wang <jiaweiw@nvidia.com>
Date: Wed, 11 Oct 2023 09:43:19 +0300
Subject: [PATCH] net/mlx5: fix E-Switch mirror flow rule validation
[ upstream commit a8697f50f50f35b2078c78b2d9ea84f78a0f325e ]
The port action and jump to flow table action are not supported
in the mirror flows (RTE_FLOW_ACTION_TYPE_SAMPLE with sample ratio=1)
in E-Switch domain (transfer attribute set) without presented encap
action.
The encap action is supported for uplink port only. So, if flow with
mirroring contains encap action application should provide encap
and uplink port actions in the mirror action list and PMD validates
this condition (to make sure we cover the hardware limitation).
This patch adds the validation for E-Switch mirror flow rule checking
and rejects as invalid.
Fixes: 6a951567c159 ("net/mlx5: support E-Switch mirroring and jump in one flow")
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
doc/guides/nics/mlx5.rst | 8 ++-
drivers/net/mlx5/mlx5_flow_dv.c | 93 +++++++++++++++++++++++++--------
2 files changed, 77 insertions(+), 24 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 593a71cf9a..e2fb45b1db 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -427,6 +427,10 @@ Limitations
- For NIC Rx flow, supports ``MARK``, ``COUNT``, ``QUEUE``, ``RSS`` in the
sample actions list.
- - For E-Switch mirroring flow, supports ``RAW ENCAP``, ``Port ID``,
- ``VXLAN ENCAP``, ``NVGRE ENCAP`` in the sample actions list.
+ - For E-Switch mirroring flow, supports ``RAW_ENCAP``, ``PORT_ID``,
+ ``VXLAN_ENCAP``, ``NVGRE_ENCAP`` in the sample actions list.
+ - For E-Switch mirroring flow with sample ratio = 1, the ``ENCAP`` action
+ supports uplink port only.
+ - For E-Switch mirroring flow with sample ratio = 1, the ``PORT`` and ``JUMP`` actions
+ are not supported without presented ``ENCAP`` action in the sample actions list.
- For ConnectX-5 trusted device, the application metadata with SET_TAG index 0
is not supported before ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action.
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 535e0ea618..a5e1beb769 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -5554,4 +5554,5 @@ flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
static int
flow_dv_validate_action_sample(uint64_t *action_flags,
+ uint64_t *sub_action_flags,
const struct rte_flow_action *action,
struct rte_eth_dev *dev,
@@ -5562,4 +5563,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
const struct rte_flow_action_count **count,
int *fdb_mirror,
+ uint16_t *sample_port_id,
struct rte_flow_error *error)
{
@@ -5567,6 +5569,6 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
struct mlx5_dev_config *dev_conf = &priv->config;
const struct rte_flow_action_sample *sample = action->conf;
+ const struct rte_flow_action_port_id *port = NULL;
const struct rte_flow_action *act;
- uint64_t sub_action_flags = 0;
uint16_t queue_index = 0xFFFF;
int actions_n = 0;
@@ -5614,5 +5616,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
case RTE_FLOW_ACTION_TYPE_QUEUE:
ret = mlx5_flow_validate_action_queue(act,
- sub_action_flags,
+ *sub_action_flags,
dev,
attr, error);
@@ -5621,5 +5623,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
queue_index = ((const struct rte_flow_action_queue *)
(act->conf))->index;
- sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
+ *sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
++actions_n;
break;
@@ -5627,5 +5629,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
*sample_rss = act->conf;
ret = mlx5_flow_validate_action_rss(act,
- sub_action_flags,
+ *sub_action_flags,
dev, attr,
item_flags,
@@ -5643,28 +5645,28 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
if (*sample_rss != NULL && (*sample_rss)->queue_num)
queue_index = (*sample_rss)->queue[0];
- sub_action_flags |= MLX5_FLOW_ACTION_RSS;
+ *sub_action_flags |= MLX5_FLOW_ACTION_RSS;
++actions_n;
break;
case RTE_FLOW_ACTION_TYPE_MARK:
ret = flow_dv_validate_action_mark(dev, act,
- sub_action_flags,
+ *sub_action_flags,
attr, error);
if (ret < 0)
return ret;
if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
- sub_action_flags |= MLX5_FLOW_ACTION_MARK |
+ *sub_action_flags |= MLX5_FLOW_ACTION_MARK |
MLX5_FLOW_ACTION_MARK_EXT;
else
- sub_action_flags |= MLX5_FLOW_ACTION_MARK;
+ *sub_action_flags |= MLX5_FLOW_ACTION_MARK;
++actions_n;
break;
case RTE_FLOW_ACTION_TYPE_COUNT:
ret = flow_dv_validate_action_count
- (dev, false, *action_flags | sub_action_flags,
+ (dev, false, *action_flags | *sub_action_flags,
attr, error);
if (ret < 0)
return ret;
*count = act->conf;
- sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
+ *sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
*action_flags |= MLX5_FLOW_ACTION_COUNT;
++actions_n;
@@ -5673,5 +5675,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
ret = flow_dv_validate_action_port_id(dev,
- sub_action_flags,
+ *sub_action_flags,
act,
attr,
@@ -5679,10 +5681,19 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
if (ret)
return ret;
- sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
+ if (act->type == RTE_FLOW_ACTION_TYPE_PORT_ID) {
+ port = (const struct rte_flow_action_port_id *)
+ act->conf;
+ *sample_port_id = port->original ?
+ dev->data->port_id : port->id;
+ } else {
+ *sample_port_id = ((const struct rte_flow_action_ethdev *)
+ act->conf)->port_id;
+ }
+ *sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
++actions_n;
break;
case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
ret = flow_dv_validate_action_raw_encap_decap
- (dev, NULL, act->conf, attr, &sub_action_flags,
+ (dev, NULL, act->conf, attr, sub_action_flags,
&actions_n, action, item_flags, error);
if (ret < 0)
@@ -5693,10 +5704,10 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
ret = flow_dv_validate_action_l2_encap(dev,
- sub_action_flags,
+ *sub_action_flags,
act, attr,
error);
if (ret < 0)
return ret;
- sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
+ *sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
++actions_n;
break;
@@ -5710,5 +5721,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
}
if (attr->ingress && !attr->transfer) {
- if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
+ if (!(*sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
MLX5_FLOW_ACTION_RSS)))
return rte_flow_error_set(error, EINVAL,
@@ -5732,15 +5743,15 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
"any optional action "
"for sampling");
- if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
+ if (*sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_ACTION,
NULL,
"unsupported action QUEUE");
- if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
+ if (*sub_action_flags & MLX5_FLOW_ACTION_RSS)
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_ACTION,
NULL,
"unsupported action QUEUE");
- if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
+ if (!(*sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION,
@@ -5751,8 +5762,8 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
}
/* Continue validation for Xcap actions.*/
- if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
+ if ((*sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
(queue_index == 0xFFFF ||
mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
- if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
+ if ((*sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
MLX5_FLOW_XCAP_ACTIONS)
return rte_flow_error_set(error, ENOTSUP,
@@ -5761,5 +5772,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
"combination aren't "
"supported");
- if (!attr->transfer && attr->ingress && (sub_action_flags &
+ if (!attr->transfer && attr->ingress && (*sub_action_flags &
MLX5_FLOW_ACTION_ENCAP))
return rte_flow_error_set(error, ENOTSUP,
@@ -6870,7 +6881,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
const struct rte_flow_action_age *non_shared_age = NULL;
const struct rte_flow_action_count *count = NULL;
+ const struct rte_flow_action_port_id *port = NULL;
const struct mlx5_rte_flow_item_tag *mlx5_tag;
struct mlx5_priv *act_priv = NULL;
int aso_after_sample = 0;
+ struct mlx5_priv *port_priv = NULL;
+ uint64_t sub_action_flags = 0;
+ uint16_t sample_port_id = 0;
+ uint16_t port_id = 0;
if (items == NULL)
@@ -7279,4 +7295,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
if (ret)
return ret;
+ if (type == RTE_FLOW_ACTION_TYPE_PORT_ID) {
+ port = (const struct rte_flow_action_port_id *)
+ actions->conf;
+ port_id = port->original ? dev->data->port_id : port->id;
+ } else {
+ port_id = ((const struct rte_flow_action_ethdev *)
+ actions->conf)->port_id;
+ }
action_flags |= MLX5_FLOW_ACTION_PORT_ID;
++actions_n;
@@ -7778,4 +7802,5 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
case RTE_FLOW_ACTION_TYPE_SAMPLE:
ret = flow_dv_validate_action_sample(&action_flags,
+ &sub_action_flags,
actions, dev,
attr, item_flags,
@@ -7783,4 +7808,5 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
&sample_count,
&fdb_mirror,
+ &sample_port_id,
error);
if (ret < 0)
@@ -8087,4 +8113,27 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
RTE_FLOW_ERROR_TYPE_ACTION, NULL,
"sample before ASO action is not supported");
+ if (sub_action_flags & MLX5_FLOW_ACTION_PORT_ID) {
+ port_priv = mlx5_port_to_eswitch_info(sample_port_id, false);
+ if (flow_source_vport_representor(priv, port_priv)) {
+ if (sub_action_flags & MLX5_FLOW_ACTION_ENCAP)
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION, NULL,
+ "mirror to rep port with encap is not supported");
+ } else {
+ if ((sub_action_flags & ~MLX5_FLOW_ACTION_ENCAP) &&
+ (action_flags & MLX5_FLOW_ACTION_JUMP))
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION, NULL,
+ "mirror to wire port without encap is not supported");
+ }
+ }
+ if ((action_flags & MLX5_FLOW_ACTION_PORT_ID) &&
+ (action_flags & MLX5_FLOW_ACTION_ENCAP)) {
+ port_priv = mlx5_port_to_eswitch_info(port_id, false);
+ if (flow_source_vport_representor(priv, port_priv))
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION, NULL,
+ "mirror to rep port with encap is not supported");
+ }
}
/*
--
2.41.0
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2023-11-16 13:21:53.326145511 +0000
+++ 0032-net-mlx5-fix-E-Switch-mirror-flow-rule-validation.patch 2023-11-16 13:21:52.482946468 +0000
@@ -1 +1 @@
-From a8697f50f50f35b2078c78b2d9ea84f78a0f325e Mon Sep 17 00:00:00 2001
+From 986d9d2fbb4950db6b47042210f6dbcd0083f2db Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit a8697f50f50f35b2078c78b2d9ea84f78a0f325e ]
+
@@ -20 +21,0 @@
-Cc: stable@dpdk.org
@@ -30 +31 @@
-index 5d64ad8810..4b3680ab32 100644
+index 593a71cf9a..e2fb45b1db 100644
@@ -33 +34 @@
-@@ -544,6 +544,10 @@ Limitations
+@@ -427,6 +427,10 @@ Limitations
@@ -47 +48 @@
-index bdc8d0076a..80ad7cd206 100644
+index 535e0ea618..a5e1beb769 100644
@@ -50 +51 @@
-@@ -6036,4 +6036,5 @@ flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
+@@ -5554,4 +5554,5 @@ flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
@@ -56 +57 @@
-@@ -6044,4 +6045,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5562,4 +5563,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -60 +60,0 @@
- bool root,
@@ -62,2 +62,3 @@
-@@ -6050,6 +6052,6 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
- struct mlx5_sh_config *dev_conf = &priv->sh->config;
+ {
+@@ -5567,6 +5569,6 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+ struct mlx5_dev_config *dev_conf = &priv->config;
@@ -70 +71 @@
-@@ -6098,5 +6100,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5614,5 +5616,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -77 +78 @@
-@@ -6105,5 +6107,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5621,5 +5623,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -84 +85 @@
-@@ -6111,5 +6113,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5627,5 +5629,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -91 +92 @@
-@@ -6127,28 +6129,28 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5643,28 +5645,28 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -118 +119 @@
- root, error);
+ attr, error);
@@ -126 +127 @@
-@@ -6157,5 +6159,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5673,5 +5675,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -133 +134 @@
-@@ -6163,10 +6165,19 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5679,10 +5681,19 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -155 +156 @@
-@@ -6177,10 +6188,10 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5693,10 +5704,10 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -168 +169 @@
-@@ -6194,5 +6205,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5710,5 +5721,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -170 +171 @@
- if (attr->ingress) {
+ if (attr->ingress && !attr->transfer) {
@@ -175 +176 @@
-@@ -6216,15 +6227,15 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5732,15 +5743,15 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -194 +195 @@
-@@ -6235,7 +6246,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5751,8 +5762,8 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -199 +200,2 @@
- (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index))) {
+ (queue_index == 0xFFFF ||
+ mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
@@ -204 +206 @@
-@@ -6244,5 +6255,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
+@@ -5761,5 +5772,5 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
@@ -207,2 +209,3 @@
-- if (attr->ingress && (sub_action_flags & MLX5_FLOW_ACTION_ENCAP))
-+ if (attr->ingress && (*sub_action_flags & MLX5_FLOW_ACTION_ENCAP))
+- if (!attr->transfer && attr->ingress && (sub_action_flags &
++ if (!attr->transfer && attr->ingress && (*sub_action_flags &
+ MLX5_FLOW_ACTION_ENCAP))
@@ -210,2 +213 @@
- RTE_FLOW_ERROR_TYPE_ACTION,
-@@ -7399,7 +7410,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+@@ -6870,7 +6881,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
@@ -224 +226 @@
-@@ -7871,4 +7887,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+@@ -7279,4 +7295,12 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
@@ -237 +239 @@
-@@ -8370,4 +8394,5 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+@@ -7778,4 +7802,5 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
@@ -243 +245 @@
-@@ -8375,4 +8400,5 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+@@ -7783,4 +7808,5 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
@@ -247 +248,0 @@
- is_root,
@@ -249 +250,2 @@
-@@ -8687,4 +8713,27 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
+ if (ret < 0)
+@@ -8087,4 +8113,27 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
next prev parent reply other threads:[~2023-11-16 13:24 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-16 13:22 patch 'eventdev: fix device pointer for vdev-based devices' " Kevin Traynor
2023-11-16 13:22 ` patch 'eventdev: fix missing driver names in info struct' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/virtio: fix missing next flag in Tx packed ring' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/virtio: fix link state interrupt vector setting' " Kevin Traynor
2023-11-16 13:22 ` patch 'vhost: fix missing vring call check on virtqueue access' " Kevin Traynor
2023-11-16 13:22 ` patch 'vhost: fix missing " Kevin Traynor
2023-11-16 13:22 ` patch 'vhost: fix check on virtqueue access in async registration' " Kevin Traynor
2023-11-16 13:22 ` patch 'vhost: fix check on virtqueue access in in-flight getter' " Kevin Traynor
2023-11-16 13:22 ` patch 'common/cnxk: fix pool buffer size in opaque mode' " Kevin Traynor
2023-11-16 13:22 ` patch 'ethdev: fix function name in comment' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/hns3: fix typo in function name' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/hns3: fix unchecked Rx free threshold' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/hns3: fix double stats for IMP and global reset' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/hns3: remove reset log in secondary' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/hns3: fix multiple reset detected log' " Kevin Traynor
2023-11-16 13:22 ` patch 'net/hns3: refactor interrupt state query' " Kevin Traynor
2023-11-16 13:22 ` patch 'test/bonding: remove unreachable statement' " Kevin Traynor
2023-11-16 13:23 ` patch 'test/bonding: add missing check' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/bonding: fix possible overrun' " Kevin Traynor
2023-11-16 13:23 ` patch 'ethdev: fix 32-bit build with GCC 13' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/enic: avoid extra unlock in MTU set' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/hns3: fix some return values' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/hns3: fix some error logs' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/hns3: keep set/get algo key functions local' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/hns3: fix uninitialized hash algo value' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/tap: fix L4 checksum offloading' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/tap: fix IPv4 " Kevin Traynor
2023-11-16 13:23 ` patch 'app/procinfo: fix RSS info' " Kevin Traynor
2023-11-16 13:23 ` patch 'app/procinfo: adjust format of " Kevin Traynor
2023-11-16 13:23 ` patch 'net/tap: fix RSS for fragmented packets' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: fix decap action checking in sample flow' " Kevin Traynor
2023-11-16 13:23 ` Kevin Traynor [this message]
2023-11-16 13:23 ` patch 'common/mlx5: fix controller index parsing' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/ice: fix L1 check interval' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/iavf: fix Tx offload mask' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/iavf: fix indent in Tx path' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/iavf: fix Tx offload flags check' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/ice: fix DCF port statistics' " Kevin Traynor
2023-11-16 13:23 ` patch 'crypto/nitrox: fix panic with high number of segments' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/iavf: fix Tx preparation' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/ice: " Kevin Traynor
2023-11-16 13:23 ` patch 'config/arm: fix aarch32 build with GCC 13' " Kevin Traynor
2023-11-16 13:23 ` patch 'build: add libarchive to optional external dependencies' " Kevin Traynor
2023-11-17 9:00 ` Richardson, Bruce
2023-11-20 13:58 ` Kevin Traynor
2023-11-16 13:23 ` patch 'app/dumpcap: fix mbuf pool ring type' " Kevin Traynor
2023-11-16 13:23 ` patch 'event/dlb2: fix name check in self-test' " Kevin Traynor
2023-11-16 13:23 ` patch 'test/bbdev: fix Python script subprocess' " Kevin Traynor
2023-11-16 13:23 ` patch 'test/bbdev: assert failed test for queue configure' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/ice: fix crash on closing representor ports' " Kevin Traynor
2023-11-16 13:23 ` patch 'event/dlb2: fix missing queue ordering capability flag' " Kevin Traynor
2023-11-16 13:23 ` patch 'meter: fix RFC4115 trTCM API Doxygen' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/sfc: remove null dereference in log' " Kevin Traynor
2023-11-16 13:23 ` patch 'app/testpmd: remove useless check in TSO command' " Kevin Traynor
2023-11-16 13:23 ` patch 'ethdev: account for smaller MTU when setting default' " Kevin Traynor
2023-11-16 13:23 ` patch 'test/bonding: fix uninitialized RSS configuration' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/hns3: fix mailbox sync' " Kevin Traynor
2023-11-16 13:23 ` patch 'app/testpmd: fix tunnel TSO capability check' " Kevin Traynor
2023-11-16 13:23 ` patch 'app/testpmd: add explicit check for tunnel TSO' " Kevin Traynor
2023-11-16 13:23 ` patch 'app/testpmd: fix tunnel TSO configuration' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: fix validation of sample encap flow action' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: fix use after free on Rx queue start' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: fix hairpin queue states' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: fix multi-segment Tx inline data length' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: fix shared Rx queue list management' " Kevin Traynor
2023-11-16 13:23 ` patch 'net/mlx5: zero UDP checksum over IPv4 in encapsulation' " Kevin Traynor
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