[PATCH v2 04/18] net/bnxt: fix setting 50G and 100G forced speed

[PATCH v2 04/18] net/bnxt: fix setting 50G and 100G forced speed

[Ajit Khaparde]

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From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>

Thor based NICs can support PAM4 as well as NRZ link negotiation.
While PAM4 can negotiate speeds at 50G, 100G and 200G, the PMD will
use NRZ signaling for 50G and 100G speeds. PAM4 signaling will be
used only for 200G speed negotiations.

Driver has to check for NRZ speed support first while forcing speed.

Fixes: c23f9ded0391 ("net/bnxt: support 200G PAM4 link")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt_hwrm.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 8f99582819..c31a5d4226 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -3158,6 +3158,8 @@ static uint16_t bnxt_check_eth_link_autoneg(uint32_t conf_link)
 static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed,
 					  struct bnxt_link_info *link_info)
 {
+	uint16_t support_pam4_speeds = link_info->support_pam4_speeds;
+	uint16_t support_speeds = link_info->support_speeds;
 	uint16_t eth_link_speed = 0;
 
 	if (conf_link_speed == RTE_ETH_LINK_SPEED_AUTONEG)
@@ -3195,23 +3197,23 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed,
 			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB;
 		break;
 	case RTE_ETH_LINK_SPEED_50G:
-		if (link_info->support_pam4_speeds &
-		    HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_50G) {
-			eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_50GB;
-			link_info->link_signal_mode = BNXT_SIG_MODE_PAM4;
-		} else {
+		if (support_speeds & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB) {
 			eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB;
 			link_info->link_signal_mode = BNXT_SIG_MODE_NRZ;
+		} else if (support_pam4_speeds &
+			   HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_50G) {
+			eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_50GB;
+			link_info->link_signal_mode = BNXT_SIG_MODE_PAM4;
 		}
 		break;
 	case RTE_ETH_LINK_SPEED_100G:
-		if (link_info->support_pam4_speeds &
-		    HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_100G) {
-			eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_100GB;
-			link_info->link_signal_mode = BNXT_SIG_MODE_PAM4;
-		} else {
+		if (support_speeds & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB) {
 			eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB;
 			link_info->link_signal_mode = BNXT_SIG_MODE_NRZ;
+		} else if (support_pam4_speeds &
+			   HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_PAM4_SPEEDS_100G) {
+			eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_PAM4_LINK_SPEED_100GB;
+			link_info->link_signal_mode = BNXT_SIG_MODE_PAM4;
 		}
 		break;
 	case RTE_ETH_LINK_SPEED_200G:
-- 
2.39.2 (Apple Git-143)


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[PATCH v2 05/18] net/bnxt: fix speed change from 200G to 25G on Thor

[Ajit Khaparde]

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From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>

While forcing speed to 200G, driver sets the structure variable
"bp->link_info->link_signal_mode" value to BNXT_SIG_MODE_PAM4.
After that when the user forces the speed back to 25G, this
cached value is not set back to BNXT_SIG_MODE_NRZ which results
in issuing the HWRM_PORT_PHY_CFG command with wrong inputs.

Fixes: c23f9ded0391 ("net/bnxt: support 200G PAM4 link")
Cc: stable@dpdk.org

Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt_hwrm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index c31a5d4226..a1f3a8251f 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -3191,6 +3191,7 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed,
 	case RTE_ETH_LINK_SPEED_25G:
 		eth_link_speed =
 			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB;
+		link_info->link_signal_mode = BNXT_SIG_MODE_NRZ;
 		break;
 	case RTE_ETH_LINK_SPEED_40G:
 		eth_link_speed =
-- 
2.39.2 (Apple Git-143)


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[PATCH v2 06/18] net/bnxt: support backward compatibility

[Ajit Khaparde]

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From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>

On older firmware versions, HWRM_FUNC_QCAPS response is not
returning the maximum number of multicast filters that can be
supported by the function. As a result, memory allocation with
size 0 fails.

Bugzilla ID: 1309
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt.h      | 1 +
 drivers/net/bnxt/bnxt_hwrm.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index cfdbfd3f54..cd85a944e8 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -974,6 +974,7 @@ struct bnxt {
 	struct rte_ether_addr	*mcast_addr_list;
 	rte_iova_t		mc_list_dma_addr;
 	uint32_t		nb_mc_addr;
+#define BNXT_DFLT_MAX_MC_ADDR	16 /* for compatibility with older firmware */
 	uint32_t		max_mcast_addr; /* maximum number of mcast filters supported */
 
 	struct rte_eth_rss_conf	rss_conf; /* RSS configuration. */
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index a1f3a8251f..d649f217ec 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -901,6 +901,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
 		    bp->max_l2_ctx, bp->max_vnics);
 	bp->max_stat_ctx = rte_le_to_cpu_16(resp->max_stat_ctx);
 	bp->max_mcast_addr = rte_le_to_cpu_32(resp->max_mcast_filters);
+	if (!bp->max_mcast_addr)
+		bp->max_mcast_addr = BNXT_DFLT_MAX_MC_ADDR;
 	memcpy(bp->dsn, resp->device_serial_number, sizeof(bp->dsn));
 
 	if (BNXT_PF(bp))
-- 
2.39.2 (Apple Git-143)


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