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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by SN1PEPF0002BA4D.mail.protection.outlook.com (10.167.242.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7362.11 via Frontend Transport; Tue, 5 Mar 2024 09:50:26 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 5 Mar 2024 01:50:10 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Tue, 5 Mar 2024 01:50:08 -0800 From: Xueming Li To: Sivaprasad Tummala CC: Ferruh Yigit , dpdk stable Subject: patch 'eal/x86: add AMD vendor check for TSC calibration' has been queued to stable release 23.11.1 Date: Tue, 5 Mar 2024 17:46:05 +0800 Message-ID: <20240305094757.439387-25-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240305094757.439387-1-xuemingl@nvidia.com> References: <20240305094757.439387-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4D:EE_|MN0PR12MB6271:EE_ X-MS-Office365-Filtering-Correlation-Id: b0b55fd0-08de-4f73-65d2-08dc3cf9af5f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2024 09:50:26.5305 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b0b55fd0-08de-4f73-65d2-08dc3cf9af5f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA4D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6271 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 03/31/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=5f30c47cc54f320a4f7bffdd06abcbe6cc2bc7d0 Thanks. Xueming Li --- >From 5f30c47cc54f320a4f7bffdd06abcbe6cc2bc7d0 Mon Sep 17 00:00:00 2001 From: Sivaprasad Tummala Date: Wed, 22 Nov 2023 23:27:30 -0800 Subject: [PATCH] eal/x86: add AMD vendor check for TSC calibration Cc: Xueming Li [ upstream commit 31d72ff4dc7c057366153e9918ac92bf9123a3bc ] AMD Epyc processors doesn't support get_tsc_freq_arch(). The patch allows graceful return to allow fallback to alternate TSC calibration. Fixes: 3dbc565e81a0 ("timer: honor arch-specific TSC frequency query") Signed-off-by: Sivaprasad Tummala Acked-by: Ferruh Yigit --- lib/eal/x86/rte_cycles.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/lib/eal/x86/rte_cycles.c b/lib/eal/x86/rte_cycles.c index 69ed59b4f0..f147a5231d 100644 --- a/lib/eal/x86/rte_cycles.c +++ b/lib/eal/x86/rte_cycles.c @@ -10,6 +10,10 @@ #include #endif +#define x86_vendor_amd(t1, t2, t3) \ + ((t1 == 0x68747541) && /* htuA */ \ + (t2 == 0x444d4163) && /* DMAc */ \ + (t3 == 0x69746e65)) /* itne */ #include "eal_private.h" @@ -110,6 +114,18 @@ get_tsc_freq_arch(void) uint8_t mult, model; int32_t ret; +#ifdef RTE_TOOLCHAIN_MSVC + __cpuid(cpuinfo, 0); + a = cpuinfo[0]; + b = cpuinfo[1]; + c = cpuinfo[2]; + d = cpuinfo[3]; +#else + __cpuid(0, a, b, c, d); +#endif + if (x86_vendor_amd(b, c, d)) + return 0; + /* * Time Stamp Counter and Nominal Core Crystal Clock * Information Leaf -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-03-05 17:39:31.808571927 +0800 +++ 0024-eal-x86-add-AMD-vendor-check-for-TSC-calibration.patch 2024-03-05 17:39:30.703566491 +0800 @@ -1 +1 @@ -From 31d72ff4dc7c057366153e9918ac92bf9123a3bc Mon Sep 17 00:00:00 2001 +From 5f30c47cc54f320a4f7bffdd06abcbe6cc2bc7d0 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 31d72ff4dc7c057366153e9918ac92bf9123a3bc ] @@ -11 +13,0 @@ -Cc: stable@dpdk.org