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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000042A8.mail.protection.outlook.com (10.167.243.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7362.11 via Frontend Transport; Tue, 5 Mar 2024 09:56:04 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 5 Mar 2024 01:55:49 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Tue, 5 Mar 2024 01:55:48 -0800 From: Xueming Li To: Dengdui Huang CC: Jie Hai , dpdk stable Subject: patch 'net/hns3: fix VF multiple count on one reset' has been queued to stable release 23.11.1 Date: Tue, 5 Mar 2024 17:47:07 +0800 Message-ID: <20240305094757.439387-87-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240305094757.439387-1-xuemingl@nvidia.com> References: <20240305094757.439387-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042A8:EE_|SA1PR12MB7127:EE_ X-MS-Office365-Filtering-Correlation-Id: 0099f9b3-2f14-4741-ad38-08dc3cfa7914 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2024 09:56:04.9094 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0099f9b3-2f14-4741-ad38-08dc3cfa7914 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042A8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7127 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 03/31/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=48d9241bbdfb813302c12f057b0d79d557856010 Thanks. Xueming Li --- >From 48d9241bbdfb813302c12f057b0d79d557856010 Mon Sep 17 00:00:00 2001 From: Dengdui Huang Date: Fri, 8 Dec 2023 15:44:14 +0800 Subject: [PATCH] net/hns3: fix VF multiple count on one reset Cc: Xueming Li [ upstream commit 072a07a9dcbd604b1983bf2cb266d3dd4dc89824 ] There are two ways for the hns3 VF driver to know reset event, namely, interrupt task and periodic detection task. For the latter, the real reset process will delay several microseconds to execute. Both tasks cause the count to increase by 1. However, the periodic detection task also detects a reset event A after interrupt task receive a reset event A. As a result, the reset count will be double. So this patch adds the comparison of reset level for VF in case of the multiple reset count. Fixes: a5475d61fa34 ("net/hns3: support VF") Signed-off-by: Dengdui Huang Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_ethdev_vf.c | 44 ++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index f5a7a2b1f4..83d3d66005 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -569,13 +569,8 @@ hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval) val = hns3_read_dev(hw, HNS3_VF_RST_ING); hns3_write_dev(hw, HNS3_VF_RST_ING, val | HNS3_VF_RST_ING_BIT); val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RST_INT_B); - if (clearval) { - hw->reset.stats.global_cnt++; - hns3_warn(hw, "Global reset detected, clear reset status"); - } else { - hns3_schedule_delayed_reset(hns); - hns3_warn(hw, "Global reset detected, don't clear reset status"); - } + hw->reset.stats.global_cnt++; + hns3_warn(hw, "Global reset detected, clear reset status"); ret = HNS3VF_VECTOR0_EVENT_RST; goto out; @@ -590,9 +585,9 @@ hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval) val = 0; ret = HNS3VF_VECTOR0_EVENT_OTHER; + out: - if (clearval) - *clearval = val; + *clearval = val; return ret; } @@ -1731,11 +1726,25 @@ is_vf_reset_done(struct hns3_hw *hw) return true; } +static enum hns3_reset_level +hns3vf_detect_reset_event(struct hns3_hw *hw) +{ + enum hns3_reset_level reset = HNS3_NONE_RESET; + uint32_t cmdq_stat_reg; + + cmdq_stat_reg = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_STAT_REG); + if (BIT(HNS3_VECTOR0_RST_INT_B) & cmdq_stat_reg) + reset = HNS3_VF_RESET; + + return reset; +} + bool hns3vf_is_reset_pending(struct hns3_adapter *hns) { + enum hns3_reset_level last_req; struct hns3_hw *hw = &hns->hw; - enum hns3_reset_level reset; + enum hns3_reset_level new_req; /* * According to the protocol of PCIe, FLR to a PF device resets the PF @@ -1758,13 +1767,18 @@ hns3vf_is_reset_pending(struct hns3_adapter *hns) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return false; - hns3vf_check_event_cause(hns, NULL); - reset = hns3vf_get_reset_level(hw, &hw->reset.pending); - if (hw->reset.level != HNS3_NONE_RESET && reset != HNS3_NONE_RESET && - hw->reset.level < reset) { - hns3_warn(hw, "High level reset %d is pending", reset); + new_req = hns3vf_detect_reset_event(hw); + if (new_req == HNS3_NONE_RESET) + return false; + + last_req = hns3vf_get_reset_level(hw, &hw->reset.pending); + if (last_req == HNS3_NONE_RESET || last_req < new_req) { + __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); + hns3_schedule_delayed_reset(hns); + hns3_warn(hw, "High level reset detected, delay do reset"); return true; } + return false; } -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-03-05 17:39:33.616679088 +0800 +++ 0086-net-hns3-fix-VF-multiple-count-on-one-reset.patch 2024-03-05 17:39:30.833566495 +0800 @@ -1 +1 @@ -From 072a07a9dcbd604b1983bf2cb266d3dd4dc89824 Mon Sep 17 00:00:00 2001 +From 48d9241bbdfb813302c12f057b0d79d557856010 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 072a07a9dcbd604b1983bf2cb266d3dd4dc89824 ] @@ -19 +21,0 @@ -Cc: stable@dpdk.org