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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DS1PEPF00017091.mail.protection.outlook.com (10.167.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7362.11 via Frontend Transport; Thu, 7 Mar 2024 08:09:57 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 7 Mar 2024 00:09:46 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Thu, 7 Mar 2024 00:09:43 -0800 From: Bing Zhao To: , , CC: , , , , , Subject: [PATCH] net/mlx5: fix age position in hairpin split Date: Thu, 7 Mar 2024 10:09:24 +0200 Message-ID: <20240307080924.310710-1-bingz@nvidia.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017091:EE_|MW6PR12MB7072:EE_ X-MS-Office365-Filtering-Correlation-Id: d37ed17d-7037-4ef8-4c2d-08dc3e7dfa92 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Mar 2024 08:09:57.4087 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d37ed17d-7037-4ef8-4c2d-08dc3e7dfa92 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017091.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB7072 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org When splitting a hairpin rule implicitly, the count action will be on either Tx or Rx subflow based on the encapsulation checking. Once there is a flow rule with both count and age action, one counter will be reused. If there is only age action and the ASO flow hit is supported, the flow hit will be chosen instead of a counter. In the previous flow splitting, the age would always be in the Rx part, while the count would be on the Tx part when there is an encap. Before this commit, 2 issues can be observed with a hairpin split: 1. On the root table, one counter was used on both Rx and Tx parts for age and count actions. Then one ingress packet will be counted twice. 2. On the non-root table, an extra ASO flow hit was used on the Rx part. This would cause some overhead. The age and count actions should be in the same subflow instead of 2. Fixes: daed4b6e3db2 ("net/mlx5: use aging by counter when counter exists") Cc: michaelba@nvidia.com Cc: stable@dpdk.org Signed-off-by: Bing Zhao Acked-by: Ori Kam --- drivers/net/mlx5/mlx5_flow.c | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 6484874c35..f31fdfbf3d 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -5399,6 +5399,7 @@ flow_hairpin_split(struct rte_eth_dev *dev, } break; case RTE_FLOW_ACTION_TYPE_COUNT: + case RTE_FLOW_ACTION_TYPE_AGE: if (encap) { rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 18f09b22be..df23c8eb6c 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -19363,8 +19363,7 @@ flow_dv_get_aged_flows(struct rte_eth_dev *dev, LIST_FOREACH(act, &age_info->aged_aso, next) { nb_flows++; if (nb_contexts) { - context[nb_flows - 1] = - act->age_params.context; + context[nb_flows - 1] = act->age_params.context; if (!(--nb_contexts)) break; } -- 2.34.1