* [PATCH 2/2] net/mlx5/hws: fix port ID for root table [not found] <20240321142414.1573453-1-kliteyn@nvidia.com> @ 2024-03-21 14:24 ` Yevgeny Kliteynik 2024-03-21 14:48 ` [PATCH v2] " Yevgeny Kliteynik 0 siblings, 1 reply; 2+ messages in thread From: Yevgeny Kliteynik @ 2024-03-21 14:24 UTC (permalink / raw) To: kliteyn, viacheslavo, thomas, suanmingm, Dariusz Sosnowski, Ori Kam, Matan Azrad, Erez Shitrit, Alex Vesker Cc: dev, igozlan, stable From: Erez Shitrit <erezsh@nvidia.com> In root tables matcher and rule need to have their port-id, otherwise the translate function that done in dpdk layer will not get the right attributes. For that whenever the matcher is matching the source-port we need to get the relevant port-id before calling the translate function. Fixes: 405242c52dd5 ("net/mlx5/hws: add rule object") Cc: stable@dpdk.org Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> --- drivers/net/mlx5/hws/mlx5dr_matcher.c | 17 +++++++++++++++++ drivers/net/mlx5/hws/mlx5dr_rule.c | 18 ++++++++++++++++++ drivers/net/mlx5/mlx5_flow.h | 22 ++++++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c index 1c64abfa57..aeff300467 100644 --- a/drivers/net/mlx5/hws/mlx5dr_matcher.c +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c @@ -1220,6 +1220,7 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher) struct mlx5dv_flow_match_parameters *mask; struct mlx5_flow_attr flow_attr = {0}; struct rte_flow_error rte_error; + struct rte_flow_item *item; uint8_t match_criteria; int ret; @@ -1248,6 +1249,22 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher) return rte_errno; } + /* We need the port id in case of matching representor */ + item = matcher->mt[0].items; + while (item->type != RTE_FLOW_ITEM_TYPE_END) { + if (item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR || + item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) { + ret = flow_hw_get_port_id_from_ctx(ctx, &flow_attr.port_id); + if (ret) { + DR_LOG(ERR, "Failed to get port id for dev %s", + ctx->ibv_ctx->device->name); + rte_errno = EINVAL; + return rte_errno; + } + } + ++item; + } + mask = simple_calloc(1, MLX5_ST_SZ_BYTES(fte_match_param) + offsetof(struct mlx5dv_flow_match_parameters, match_buf)); if (!mask) { diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c index 784f614d87..022263eb1d 100644 --- a/drivers/net/mlx5/hws/mlx5dr_rule.c +++ b/drivers/net/mlx5/hws/mlx5dr_rule.c @@ -687,10 +687,28 @@ static int mlx5dr_rule_create_root(struct mlx5dr_rule *rule, struct mlx5dv_flow_match_parameters *value; struct mlx5_flow_attr flow_attr = {0}; struct mlx5dv_flow_action_attr *attr; + const struct rte_flow_item *cur_item; struct rte_flow_error error; uint8_t match_criteria; int ret; + /* We need the port id in case of matching representor */ + cur_item = items; + while (cur_item->type != RTE_FLOW_ITEM_TYPE_END) { + if (cur_item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR || + cur_item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) { + ret = flow_hw_get_port_id_from_ctx(rule->matcher->tbl->ctx, + &flow_attr.port_id); + if (ret) { + DR_LOG(ERR, "Failed to get port id for dev %s", + rule->matcher->tbl->ctx->ibv_ctx->device->name); + rte_errno = EINVAL; + return rte_errno; + } + } + ++cur_item; + } + attr = simple_calloc(num_actions, sizeof(*attr)); if (!attr) { rte_errno = ENOMEM; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 34b5e0f45b..0065727a67 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2001,6 +2001,28 @@ flow_hw_get_reg_id(struct rte_eth_dev *dev, #endif } +static __rte_always_inline int +flow_hw_get_port_id_from_ctx(void *dr_ctx, uint32_t *port_val) +{ +#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) + uint32_t port; + + MLX5_ETH_FOREACH_DEV(port, NULL) { + struct mlx5_priv *priv; + priv = rte_eth_devices[port].data->dev_private; + + if (priv->dr_ctx == dr_ctx) { + *port_val = port; + return 0; + } + } +#else + RTE_SET_USED(dr_ctx); + RTE_SET_USED(port_val); +#endif + return -EINVAL; +} + /** * Get GENEVE TLV option FW information according type and class. * -- 2.27.0 ^ permalink raw reply [flat|nested] 2+ messages in thread
* [PATCH v2] net/mlx5/hws: fix port ID for root table 2024-03-21 14:24 ` [PATCH 2/2] net/mlx5/hws: fix port ID for root table Yevgeny Kliteynik @ 2024-03-21 14:48 ` Yevgeny Kliteynik 0 siblings, 0 replies; 2+ messages in thread From: Yevgeny Kliteynik @ 2024-03-21 14:48 UTC (permalink / raw) To: kliteyn, viacheslavo, thomas, suanmingm, Dariusz Sosnowski, Ori Kam, Matan Azrad, Erez Shitrit, Alex Vesker Cc: dev, igozlan, stable From: Erez Shitrit <erezsh@nvidia.com> In root tables matcher and rule need to have their port-id, otherwise the translate function that done in dpdk layer will not get the right attributes. For that whenever the matcher is matching the source-port we need to get the relevant port-id before calling the translate function. Fixes: 405242c52dd5 ("net/mlx5/hws: add rule object") Cc: stable@dpdk.org Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com> --- V2 - removed duplicated sign-off line drivers/net/mlx5/hws/mlx5dr_matcher.c | 17 +++++++++++++++++ drivers/net/mlx5/hws/mlx5dr_rule.c | 18 ++++++++++++++++++ drivers/net/mlx5/mlx5_flow.h | 22 ++++++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c index 1c64abfa57..aeff300467 100644 --- a/drivers/net/mlx5/hws/mlx5dr_matcher.c +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c @@ -1220,6 +1220,7 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher) struct mlx5dv_flow_match_parameters *mask; struct mlx5_flow_attr flow_attr = {0}; struct rte_flow_error rte_error; + struct rte_flow_item *item; uint8_t match_criteria; int ret; @@ -1248,6 +1249,22 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher) return rte_errno; } + /* We need the port id in case of matching representor */ + item = matcher->mt[0].items; + while (item->type != RTE_FLOW_ITEM_TYPE_END) { + if (item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR || + item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) { + ret = flow_hw_get_port_id_from_ctx(ctx, &flow_attr.port_id); + if (ret) { + DR_LOG(ERR, "Failed to get port id for dev %s", + ctx->ibv_ctx->device->name); + rte_errno = EINVAL; + return rte_errno; + } + } + ++item; + } + mask = simple_calloc(1, MLX5_ST_SZ_BYTES(fte_match_param) + offsetof(struct mlx5dv_flow_match_parameters, match_buf)); if (!mask) { diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c index 784f614d87..022263eb1d 100644 --- a/drivers/net/mlx5/hws/mlx5dr_rule.c +++ b/drivers/net/mlx5/hws/mlx5dr_rule.c @@ -687,10 +687,28 @@ static int mlx5dr_rule_create_root(struct mlx5dr_rule *rule, struct mlx5dv_flow_match_parameters *value; struct mlx5_flow_attr flow_attr = {0}; struct mlx5dv_flow_action_attr *attr; + const struct rte_flow_item *cur_item; struct rte_flow_error error; uint8_t match_criteria; int ret; + /* We need the port id in case of matching representor */ + cur_item = items; + while (cur_item->type != RTE_FLOW_ITEM_TYPE_END) { + if (cur_item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR || + cur_item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) { + ret = flow_hw_get_port_id_from_ctx(rule->matcher->tbl->ctx, + &flow_attr.port_id); + if (ret) { + DR_LOG(ERR, "Failed to get port id for dev %s", + rule->matcher->tbl->ctx->ibv_ctx->device->name); + rte_errno = EINVAL; + return rte_errno; + } + } + ++cur_item; + } + attr = simple_calloc(num_actions, sizeof(*attr)); if (!attr) { rte_errno = ENOMEM; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 34b5e0f45b..0065727a67 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2001,6 +2001,28 @@ flow_hw_get_reg_id(struct rte_eth_dev *dev, #endif } +static __rte_always_inline int +flow_hw_get_port_id_from_ctx(void *dr_ctx, uint32_t *port_val) +{ +#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) + uint32_t port; + + MLX5_ETH_FOREACH_DEV(port, NULL) { + struct mlx5_priv *priv; + priv = rte_eth_devices[port].data->dev_private; + + if (priv->dr_ctx == dr_ctx) { + *port_val = port; + return 0; + } + } +#else + RTE_SET_USED(dr_ctx); + RTE_SET_USED(port_val); +#endif + return -EINVAL; +} + /** * Get GENEVE TLV option FW information according type and class. * -- 2.27.0 ^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2024-03-21 14:48 UTC | newest] Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- [not found] <20240321142414.1573453-1-kliteyn@nvidia.com> 2024-03-21 14:24 ` [PATCH 2/2] net/mlx5/hws: fix port ID for root table Yevgeny Kliteynik 2024-03-21 14:48 ` [PATCH v2] " Yevgeny Kliteynik
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