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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(1800799015)(376005)(36860700004)(82310400014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2024 16:51:39.7928 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c4ef0986-f9be-4222-8e0c-08dc62ec7b3f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4443 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org [ upstream commit 727283742a372359241fafec07f3648d3261e763 ] If rte_flow_configure() failed, then some port resources were either not freed, nor reset to the default state. As a result, assumptions in other places in PMD were invalidated and that lead to segmentation faults during release of HW Steering resources when port was closed. This patch adds missing resource release to rollback procedure in mlx5 PMD implementation of rte_flow_configure(). Whole rollback procedure is reordered for clarity, to resemble reverse order of resource allocation. Fixes: 1939eb6f660c ("net/mlx5: support flow port action with HWS") Fixes: 773ca0e91ba1 ("net/mlx5: support VLAN push/pop/modify with HWS") Fixes: 04a4de756e14 ("net/mlx5: support flow age action with HWS") Cc: stable@dpdk.org Signed-off-by: Dariusz Sosnowski Acked-by: Ori Kam --- drivers/net/mlx5/mlx5_flow_hw.c | 53 +++++++++++++++++++++------------ 1 file changed, 34 insertions(+), 19 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index b51a4bb837..2f4b2d774e 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -9705,6 +9705,14 @@ flow_hw_configure(struct rte_eth_dev *dev, priv->hws_strict_queue = 1; return 0; err: + priv->hws_strict_queue = 0; + flow_hw_destroy_vlan(dev); + if (priv->hws_age_req) + mlx5_hws_age_pool_destroy(priv); + if (priv->hws_cpool) { + mlx5_hws_cnt_pool_destroy(priv->sh, priv->hws_cpool); + priv->hws_cpool = NULL; + } if (priv->hws_ctpool) { flow_hw_ct_pool_destroy(dev, priv->hws_ctpool); priv->hws_ctpool = NULL; @@ -9713,27 +9721,37 @@ flow_hw_configure(struct rte_eth_dev *dev, flow_hw_ct_mng_destroy(dev, priv->ct_mng); priv->ct_mng = NULL; } - if (priv->hws_age_req) - mlx5_hws_age_pool_destroy(priv); - if (priv->hws_cpool) { - mlx5_hws_cnt_pool_destroy(priv->sh, priv->hws_cpool); - priv->hws_cpool = NULL; - } - mlx5_flow_quota_destroy(dev); flow_hw_destroy_send_to_kernel_action(priv); flow_hw_cleanup_ctrl_fdb_tables(dev); flow_hw_free_vport_actions(priv); + if (priv->hw_def_miss) { + mlx5dr_action_destroy(priv->hw_def_miss); + priv->hw_def_miss = NULL; + } + flow_hw_cleanup_tx_repr_tagging(dev); for (i = 0; i < MLX5_HW_ACTION_FLAG_MAX; i++) { - if (priv->hw_drop[i]) + if (priv->hw_drop[i]) { mlx5dr_action_destroy(priv->hw_drop[i]); - if (priv->hw_tag[i]) + priv->hw_drop[i] = NULL; + } + if (priv->hw_tag[i]) { mlx5dr_action_destroy(priv->hw_tag[i]); + priv->hw_tag[i] = NULL; + } } - if (priv->hw_def_miss) - mlx5dr_action_destroy(priv->hw_def_miss); - flow_hw_destroy_vlan(dev); - if (dr_ctx) + mlx5_flow_meter_uninit(dev); + mlx5_flow_quota_destroy(dev); + flow_hw_cleanup_ctrl_rx_tables(dev); + if (dr_ctx) { claim_zero(mlx5dr_context_close(dr_ctx)); + priv->dr_ctx = NULL; + } + if (priv->shared_host) { + struct mlx5_priv *host_priv = priv->shared_host->data->dev_private; + + __atomic_fetch_sub(&host_priv->shared_refcnt, 1, __ATOMIC_RELAXED); + priv->shared_host = NULL; + } if (priv->hw_q) { for (i = 0; i < nb_q_updated; i++) { rte_ring_free(priv->hw_q[i].indir_iq); @@ -9746,14 +9764,11 @@ flow_hw_configure(struct rte_eth_dev *dev, mlx5_ipool_destroy(priv->acts_ipool); priv->acts_ipool = NULL; } - if (_queue_attr) - mlx5_free(_queue_attr); - if (priv->shared_host) { - __atomic_fetch_sub(&host_priv->shared_refcnt, 1, __ATOMIC_RELAXED); - priv->shared_host = NULL; - } mlx5_free(priv->hw_attr); priv->hw_attr = NULL; + priv->nb_queue = 0; + if (_queue_attr) + mlx5_free(_queue_attr); /* Do not overwrite the internal errno information. */ if (ret) return ret; -- 2.39.2