[v2 01/16] net/mlx5/hws: move warn into debug level when needed

[v2 01/16] net/mlx5/hws: move warn into debug level when needed

[Itamar Gozlan]

From: Erez Shitrit <erezsh@nvidia.com>

When the user tries to create a matcher and if failed  with specific
errno (E2BIG) the message will be in debug level and not in warning.
It is a part of a feature when the user re-try to insert a new matching
depends on that errno, no need the annoying message.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Cc: stable@dpdk.org

Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 6 +++---
 drivers/net/mlx5/hws/mlx5dr_matcher.c | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 35a2ed2048..81d0e0e6df 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -3534,7 +3534,7 @@ mlx5dr_definer_find_best_match_fit(struct mlx5dr_context *ctx,
 		return 0;
 	}
 
-	DR_LOG(ERR, "Unable to find supporting match/jumbo definer combination");
+	DR_LOG(DEBUG, "Unable to find supporting match/jumbo definer combination");
 	rte_errno = E2BIG;
 	return rte_errno;
 }
@@ -3689,7 +3689,7 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher *matcher,
 	/* Find the match definer layout for header layout match union */
 	ret = mlx5dr_definer_find_best_match_fit(ctx, match_definer, match_hl);
 	if (ret) {
-		DR_LOG(ERR, "Failed to create match definer from header layout");
+		DR_LOG(DEBUG, "Failed to create match definer from header layout");
 		goto free_fc;
 	}
 
@@ -4041,7 +4041,7 @@ int mlx5dr_definer_matcher_init(struct mlx5dr_context *ctx,
 
 	ret = mlx5dr_definer_calc_layout(matcher, &match_layout, &range_layout);
 	if (ret) {
-		DR_LOG(ERR, "Failed to calculate matcher definer layout");
+		DR_LOG(DEBUG, "Failed to calculate matcher definer layout");
 		return ret;
 	}
 
diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c
index 1c64abfa57..1213e7f0ad 100644
--- a/drivers/net/mlx5/hws/mlx5dr_matcher.c
+++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c
@@ -877,7 +877,7 @@ static int mlx5dr_matcher_bind_mt(struct mlx5dr_matcher *matcher)
 	/* Calculate match, range and hash definers */
 	ret = mlx5dr_definer_matcher_init(ctx, matcher);
 	if (ret) {
-		DR_LOG(ERR, "Failed to set matcher templates with match definers");
+		DR_LOG(DEBUG, "Failed to set matcher templates with match definers");
 		return ret;
 	}
 
-- 
2.39.3

[v2 02/16] common/mlx5: fix error in mlx5 prm structs

[Itamar Gozlan]

From: Yevgeny Kliteynik <kliteyn@nvidia.com>

Fix wrong reserved size and add helpful comment

Fixes: 365cdf5f8ce7 ("net/mlx5/hws: add command layer")
Cc: stable@dpdk.org

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index c671c75bfd..c6846cdb7e 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2360,8 +2360,8 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
 	u8 reserved_at_d0[0x3];
 	u8 log_conn_track_max_alloc[0x5];
 	u8 reserved_at_d8[0x3];
-	u8 log_max_conn_track_offload[0x5];
-	u8 cross_vhca_object_to_object_supported[0x20]; /* End of DW7. */
+	u8 log_max_conn_track_offload[0x5]; /* End of DW7. */
+	u8 cross_vhca_object_to_object_supported[0x20];
 	u8 allowed_object_for_other_vhca_access_high[0x20];
 	u8 allowed_object_for_other_vhca_access[0x20];
 	u8 reserved_at_140[0x20];
@@ -3655,7 +3655,7 @@ struct mlx5_ifc_stc_ste_param_vport_bits {
 	u8 eswitch_owner_vhca_id[0x10];
 	u8 vport_number[0x10];
 	u8 eswitch_owner_vhca_id_valid[0x1];
-	u8 reserved_at_21[0x59];
+	u8 reserved_at_21[0x5f];
 };
 
 union mlx5_ifc_stc_param_bits {
-- 
2.39.3

[v2 03/16] net/mlx5/hws: fix wrong comment in mlx5dr send

[Itamar Gozlan]

From: Yevgeny Kliteynik <kliteyn@nvidia.com>

Remove comment that documents parameter that doesn't exist.

Fixes: 3eb748869d2d ("net/mlx5/hws: add send layer")
Cc: stable@dpdk.org

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_send.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_send.h b/drivers/net/mlx5/hws/mlx5dr_send.h
index c4eaea52ab..0c89faa8a7 100644
--- a/drivers/net/mlx5/hws/mlx5dr_send.h
+++ b/drivers/net/mlx5/hws/mlx5dr_send.h
@@ -203,8 +203,6 @@ struct mlx5dr_send_ste_attr {
  *   value to write in CPU endian format.
  * @param addr
  *   Address to write to.
- * @param lock
- *   Address of the lock to use for that UAR access.
  */
 static __rte_always_inline void
 mlx5dr_uar_write64_relaxed(uint64_t val, void *addr)
-- 
2.39.3

[v2 07/16] net/mlx5/hws: fix error flow in mlx5dr context open

[Itamar Gozlan]

From: Yevgeny Kliteynik <kliteyn@nvidia.com>

Add missing spinlock destruction in error flow.

Fixes: b0290e56dd08 ("net/mlx5/hws: add context object")
Cc: stable@dpdk.org

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_context.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/mlx5/hws/mlx5dr_context.c b/drivers/net/mlx5/hws/mlx5dr_context.c
index 15d53c578a..7f120b3b1b 100644
--- a/drivers/net/mlx5/hws/mlx5dr_context.c
+++ b/drivers/net/mlx5/hws/mlx5dr_context.c
@@ -263,6 +263,7 @@ struct mlx5dr_context *mlx5dr_context_open(struct ibv_context *ibv_ctx,
 free_caps:
 	simple_free(ctx->caps);
 free_ctx:
+	pthread_spin_destroy(&ctx->ctrl_lock);
 	simple_free(ctx);
 	return NULL;
 }
-- 
2.39.3

[v2 08/16] net/mlx5/hws: fix code analysis error in passing 0 enum val

[Itamar Gozlan]

From: Yevgeny Kliteynik <kliteyn@nvidia.com>

Instead of passing 0 as an enum parameter, define flag NONE.
This resolves the following code analysis error: "enumerated
type mixed with another type".
This value is currently used in tests only, and will later
be used in backward-compatible steering API.

Fixes: 5cadd74fbc08 ("net/mlx5: add HW steering low-level abstract stub")
Cc: stable@dpdk.org

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 80e118a980..d2c426e679 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -82,6 +82,7 @@ enum mlx5dr_action_aso_ct_flags {
 };
 
 enum mlx5dr_match_template_flags {
+	MLX5DR_MATCH_TEMPLATE_FLAG_NONE = 0,
 	/* Allow relaxed matching by skipping derived dependent match fields. */
 	MLX5DR_MATCH_TEMPLATE_FLAG_RELAXED_MATCH = 1,
 };
-- 
2.39.3

[v2 11/16] net/mlx5/hws: extending tag saving for match and jumbo

[Itamar Gozlan]

From: Erez Shitrit <erezsh@nvidia.com>

Save the exact tag when matching over jumbo masking.

Fixes: 348cdeec6472 ("net/mlx5/hws: add FW WQE rule creation logic")
Cc: stable@dpdk.org

Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_rule.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c
index 7bcf2de55f..5b74e6d85f 100644
--- a/drivers/net/mlx5/hws/mlx5dr_rule.c
+++ b/drivers/net/mlx5/hws/mlx5dr_rule.c
@@ -195,8 +195,13 @@ mlx5dr_rule_save_delete_info(struct mlx5dr_rule *rule,
 		rule->tag_ptr = simple_calloc(2, sizeof(*rule->tag_ptr));
 		assert(rule->tag_ptr);
 
-		src_tag = (uint8_t *)ste_attr->wqe_data->tag;
-		memcpy(rule->tag_ptr[0].match, src_tag, MLX5DR_MATCH_TAG_SZ);
+		if (is_jumbo)
+			memcpy(rule->tag_ptr[0].jumbo, ste_attr->wqe_data->action,
+			       MLX5DR_JUMBO_TAG_SZ);
+		else
+			memcpy(rule->tag_ptr[0].match, ste_attr->wqe_data->tag,
+			       MLX5DR_MATCH_TAG_SZ);
+
 		rule->tag_ptr[1].reserved[0] = ste_attr->send_attr.match_definer_id;
 
 		/* Save range definer id and tag for delete */
-- 
2.39.3

[v2 12/16] net/mlx5/hws: dw order optimization code enhancement

[Itamar Gozlan]

Improving code readability by following code styles such as mlx5dr prefix
and extracting a support check to an external function call.
Also, reducing unneeded static memory allocation using a bounded size
macro.

Fixes: 88ff41793e7a ("net/mlx5/hws: reorder STE fields to improve hash")
Cc: stable@dpdk.org

Signed-off-by: Itamar Gozlan <igozlan@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 39 ++++++++++++++-------------
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 81d0e0e6df..cffbb7b589 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -31,6 +31,8 @@
 
 #define MLX5DR_DEFINER_QUOTA_BLOCK 0
 #define MLX5DR_DEFINER_QUOTA_PASS  2
+#define MLX5DR_DEFINER_MAX_ROW_LOG 32
+#define MLX5DR_DEFINER_HL_OPT_MAX 2
 
 /* Setter function based on bit offset and mask, for 32bit DW*/
 #define _DR_SET_32(p, v, byte_off, bit_off, mask) \
@@ -104,21 +106,13 @@
 	__mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \
 	__mlx5_mask(typ, fld))
 
-#define MAX_ROW_LOG 31
-
-enum header_layout {
-	MLX5DR_HL_IPV4_SRC = 64,
-	MLX5DR_HL_IPV4_DST = 65,
-	MAX_HL_PRIO,
-};
-
 /* Each row (i) indicates a different matcher size, and each column (j)
  * represents {DW5, DW4, DW3, DW2, DW1, DW0}.
- * For values 0,..,2^i, and j (DW) 0,..,5: optimal_dist_dw[i][j] is 1 if the
+ * For values 0,..,2^i, and j (DW) 0,..,5: mlx5dr_optimal_dist_dw[i][j] is 1 if the
  * number of different hash results on these values equals 2^i, meaning this
  * DW hash distribution is complete.
  */
-int optimal_dist_dw[MAX_ROW_LOG][DW_SELECTORS_MATCH] = {
+int mlx5dr_optimal_dist_dw[MLX5DR_DEFINER_MAX_ROW_LOG][DW_SELECTORS_MATCH] = {
 	{1, 1, 1, 1, 1, 1}, {0, 1, 1, 0, 1, 0}, {0, 1, 1, 0, 1, 0},
 	{1, 0, 1, 0, 1, 0}, {0, 0, 0, 1, 1, 0}, {0, 1, 1, 0, 1, 0},
 	{0, 0, 0, 0, 1, 0}, {0, 1, 1, 0, 1, 0}, {0, 0, 0, 0, 0, 0},
@@ -3471,16 +3465,16 @@ mlx5dr_definer_find_best_range_fit(struct mlx5dr_definer *definer,
 
 static void mlx5dr_definer_optimize_order(struct mlx5dr_definer *definer, int num_log)
 {
-	uint8_t hl_prio[MAX_HL_PRIO - 1] = {MLX5DR_HL_IPV4_SRC,
-					    MLX5DR_HL_IPV4_DST,
-					    MAX_HL_PRIO};
+	uint8_t hl_prio[MLX5DR_DEFINER_HL_OPT_MAX];
 	int dw = 0, i = 0, j;
 	int *dw_flag;
 	uint8_t tmp;
 
-	dw_flag = optimal_dist_dw[num_log];
+	dw_flag = mlx5dr_optimal_dist_dw[num_log];
+	hl_prio[0] = __mlx5_dw_off(definer_hl, ipv4_src_dest_outer.source_address);
+	hl_prio[1] = __mlx5_dw_off(definer_hl, ipv4_src_dest_outer.destination_address);
 
-	while (hl_prio[i] != MAX_HL_PRIO) {
+	while (i < MLX5DR_DEFINER_HL_OPT_MAX) {
 		j = 0;
 		/* Finding a candidate to improve its hash distribution */
 		while (j < DW_SELECTORS_MATCH && (hl_prio[i] != definer->dw_selector[j]))
@@ -3632,6 +3626,16 @@ int mlx5dr_definer_compare(struct mlx5dr_definer *definer_a,
 	return 0;
 }
 
+static int
+mlx5dr_definer_optimize_order_supported(struct mlx5dr_definer *match_definer,
+					struct mlx5dr_matcher *matcher)
+{
+	return !mlx5dr_definer_is_jumbo(match_definer) &&
+	       !mlx5dr_matcher_req_fw_wqe(matcher) &&
+	       !mlx5dr_matcher_is_resizable(matcher) &&
+	       !mlx5dr_matcher_is_insert_by_idx(matcher);
+}
+
 static int
 mlx5dr_definer_calc_layout(struct mlx5dr_matcher *matcher,
 			   struct mlx5dr_definer *match_definer,
@@ -3693,10 +3697,7 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher *matcher,
 		goto free_fc;
 	}
 
-	if (!mlx5dr_definer_is_jumbo(match_definer) &&
-	    !mlx5dr_matcher_req_fw_wqe(matcher) &&
-	    !mlx5dr_matcher_is_resizable(matcher) &&
-	    !mlx5dr_matcher_is_insert_by_idx(matcher))
+	if (mlx5dr_definer_optimize_order_supported(match_definer, matcher))
 		mlx5dr_definer_optimize_order(match_definer, matcher->attr.rule.num_log);
 
 	/* Find the range definer layout for match templates fcrs */
-- 
2.39.3

[v2 13/16] net/mlx5/hws: set default miss when replacing table

[Itamar Gozlan]

Allowing the replacement of a miss table without enforcing
a previous disconnecting. This feature extension allows the
user to change the destination miss table when the system
runs without losing traffic.

Fixes: b81f95ca770d ("net/mlx5/hws: support default miss table")
Cc: stable@dpdk.org

Signed-off-by: Itamar Gozlan <igozlan@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_table.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c
index 55b9b20150..ab73017ade 100644
--- a/drivers/net/mlx5/hws/mlx5dr_table.c
+++ b/drivers/net/mlx5/hws/mlx5dr_table.c
@@ -611,8 +611,7 @@ static int mlx5dr_table_set_default_miss_not_valid(struct mlx5dr_table *tbl,
 
 	if (mlx5dr_table_is_root(tbl) ||
 	    (miss_tbl && mlx5dr_table_is_root(miss_tbl)) ||
-	    (miss_tbl && miss_tbl->type != tbl->type) ||
-	    (miss_tbl && tbl->default_miss.miss_tbl)) {
+	    (miss_tbl && miss_tbl->type != tbl->type)) {
 		DR_LOG(ERR, "Invalid arguments");
 		rte_errno = EINVAL;
 		return -rte_errno;
@@ -625,6 +624,7 @@ int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl,
 				  struct mlx5dr_table *miss_tbl)
 {
 	struct mlx5dr_context *ctx = tbl->ctx;
+	struct mlx5dr_table *old_miss_tbl;
 	int ret;
 
 	ret = mlx5dr_table_set_default_miss_not_valid(tbl, miss_tbl);
@@ -632,15 +632,16 @@ int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl,
 		return ret;
 
 	pthread_spin_lock(&ctx->ctrl_lock);
-
+	old_miss_tbl = tbl->default_miss.miss_tbl;
 	ret = mlx5dr_table_connect_to_miss_table(tbl, miss_tbl);
 	if (ret)
 		goto out;
 
+	if (old_miss_tbl)
+		LIST_REMOVE(tbl, default_miss.next);
+
 	if (miss_tbl)
 		LIST_INSERT_HEAD(&miss_tbl->default_miss.head, tbl, default_miss.next);
-	else
-		LIST_REMOVE(tbl, default_miss.next);
 
 	pthread_spin_unlock(&ctx->ctrl_lock);
 	return 0;
-- 
2.39.3

[v2 14/16] net/mlx5/hws: fix invalid memory access in decapl3

[Itamar Gozlan]

From: Alex Vesker <valex@nvidia.com>

In case decapL3 action is created we would access header
data even in case the SHARED flag is not set, this would
lead to an invalid memory access.

Fixes: 3a6c50215c07 ("net/mlx5/hws: support multi-pattern")
Cc: stable@dpdk.org

Signed-off-by: Alex Vesker <valex@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_action.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 084d4d606e..562fb5cbb4 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -1775,7 +1775,9 @@ mlx5dr_action_handle_tunnel_l3_to_l2(struct mlx5dr_action *action,
 
 	/* Create a full modify header action list in case shared */
 	mlx5dr_action_prepare_decap_l3_actions(hdrs->sz, mh_data, &num_of_actions);
-	mlx5dr_action_prepare_decap_l3_data(hdrs->data, mh_data, num_of_actions);
+
+	if (action->flags & MLX5DR_ACTION_FLAG_SHARED)
+		mlx5dr_action_prepare_decap_l3_data(hdrs->data, mh_data, num_of_actions);
 
 	/* All DecapL3 cases require the same max arg size */
 	arg_obj = mlx5dr_arg_create_modify_header_arg(ctx,
-- 
2.39.3

[v2 16/16] net/mlx5/hws: fix action template only term param dump print

[Itamar Gozlan]

From: Hamdan Igbaria <hamdani@nvidia.com>

The debug print of only_term param in the action template
was printed incorrectly.

Fixes: 78580cf4e796 ("net/mlx5/hws: add debug layer")
Cc: stable@dpdk.org

Signed-off-by: Hamdan Igbaria <hamdani@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_debug.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c
index 5ad4ca2da5..741a725842 100644
--- a/drivers/net/mlx5/hws/mlx5dr_debug.c
+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c
@@ -153,7 +153,7 @@ mlx5dr_debug_dump_matcher_action_template(FILE *f, struct mlx5dr_matcher *matche
 			      MLX5DR_DEBUG_RES_TYPE_MATCHER_ACTION_TEMPLATE,
 			      (uint64_t)(uintptr_t)at,
 			      (uint64_t)(uintptr_t)matcher,
-			      at->only_term ? 0 : 1,
+			      at->only_term,
 			      is_root ? 0 : at->num_of_action_stes,
 			      at->num_actions);
 		if (ret < 0) {
-- 
2.39.3

Re: [v2 01/16] net/mlx5/hws: move warn into debug level when needed

[Raslan Darawsheh]

Hi,
________________________________________
From: Itamar Gozlan <igozlan@nvidia.com>
Sent: Monday, May 6, 2024 2:44 PM
To: Itamar Gozlan; Erez Shitrit; Hamdan Agbariya; Yevgeny Kliteynik; Slava Ovsiienko; NBU-Contact-Thomas Monjalon (EXTERNAL); Suanming Mou; Dariusz Sosnowski; Ori Kam; Matan Azrad; Mark Bloch; Alex Vesker
Cc: dev@dpdk.org; stable@dpdk.org
Subject: [v2 01/16] net/mlx5/hws: move warn into debug level when needed

From: Erez Shitrit <erezsh@nvidia.com>

When the user tries to create a matcher and if failed  with specific
errno (E2BIG) the message will be in debug level and not in warning.
It is a part of a feature when the user re-try to insert a new matching
depends on that errno, no need the annoying message.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Cc: stable@dpdk.org

Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>

Series applied to next-net-mlx,
please make sure you are sending some cover-letter for such big series next time.

Kindest regards,
Raslan Darawsheh