* [PATCH 2/8] net/mlx5/hws: fix memory leak in modify header free
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
@ 2024-07-09 12:30 ` Itamar Gozlan
2024-07-09 12:30 ` [PATCH 3/8] net/mlx5/hws: strictly range templates check fix Itamar Gozlan
` (5 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:30 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
From: Erez Shitrit <erezsh@nvidia.com>
When creating action from type MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2
we use modify-header object, we support few of that type at the same
time over this action depends on the number of headers.
Now when destroying the modify-header object we run over the
number_of_patterns, this variable was not set in the creation of that
action.
Fixes: 3a6c50215c07 ("net/mlx5/hws: support multi-pattern")
Cc: valex@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_action.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 03c3683f71..b90f18df8a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -1820,6 +1820,7 @@ mlx5dr_action_handle_tunnel_l3_to_l2(struct mlx5dr_action *action,
action[i].modify_header.max_num_of_actions = num_of_actions;
action[i].modify_header.num_of_actions = num_of_actions;
+ action[i].modify_header.num_of_patterns = num_of_hdrs;
action[i].modify_header.arg_obj = arg_obj;
action[i].modify_header.pat_obj = pat_obj;
action[i].modify_header.require_reparse =
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 3/8] net/mlx5/hws: strictly range templates check fix
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
2024-07-09 12:30 ` [PATCH 2/8] net/mlx5/hws: fix memory leak in modify header free Itamar Gozlan
@ 2024-07-09 12:30 ` Itamar Gozlan
2024-07-09 12:30 ` [PATCH 4/8] net/mlx5/hws: fix deletion of action vport Itamar Gozlan
` (4 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:30 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
Using range and non range templates is not allowed, and in HWS there is a
check that enforce that limitation with constantly check that, in a loop,
if the current template defined as range, the last one
should also be defined as range.
But, in the case where there are two templates in the following order:
(1) template with range, and (2) template without range.
The existing checks will not cover this case.
This commit fixes that hole by maintain the invariant that if a template
without a range exist, all the previous match template are also.
Fixes: 9732ffe13bd6 ("net/mlx5/hws: add range definer creation")
Cc: valex@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Itamar Gozlan <igozlan@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 9ebda9267d..51a3f7be4b 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -4041,15 +4041,18 @@ mlx5dr_definer_matcher_range_init(struct mlx5dr_context *ctx,
/* Create optional range definers */
for (i = 0; i < matcher->num_of_mt; i++) {
- if (!mt[i].fcr_sz)
- continue;
-
/* All must use range if requested */
- if (i && !mt[i - 1].range_definer) {
+ bool is_range = !!mt[i].fcr_sz;
+ bool has_range = matcher->flags & MLX5DR_MATCHER_FLAGS_RANGE_DEFINER;
+
+ if (i && ((is_range && !has_range) || (!is_range && has_range))) {
DR_LOG(ERR, "Using range and non range templates is not allowed");
goto free_definers;
}
+ if (!mt[i].fcr_sz)
+ continue;
+
matcher->flags |= MLX5DR_MATCHER_FLAGS_RANGE_DEFINER;
/* Create definer without fcr binding, already binded */
mt[i].range_definer = mlx5dr_definer_alloc(ctx,
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 4/8] net/mlx5/hws: fix deletion of action vport
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
2024-07-09 12:30 ` [PATCH 2/8] net/mlx5/hws: fix memory leak in modify header free Itamar Gozlan
2024-07-09 12:30 ` [PATCH 3/8] net/mlx5/hws: strictly range templates check fix Itamar Gozlan
@ 2024-07-09 12:30 ` Itamar Gozlan
2024-07-09 12:31 ` [PATCH 5/8] net/mlx5/hws: fix incorrect port ID on root item convert Itamar Gozlan
` (3 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:30 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
From: Erez Shitrit <erezsh@nvidia.com>
No more ignoring this action while destroying it.
Fixes: f8c8a6d8440d ("net/mlx5/hws: add action object")
Cc: erezsh@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_action.c | 4 ++++
drivers/net/mlx5/hws/mlx5dr_cmd.c | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index b90f18df8a..0d90280a7d 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -2968,6 +2968,7 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)
case MLX5DR_ACTION_TYP_ASO_CT:
case MLX5DR_ACTION_TYP_PUSH_VLAN:
case MLX5DR_ACTION_TYP_REMOVE_HEADER:
+ case MLX5DR_ACTION_TYP_VPORT:
mlx5dr_action_destroy_stcs(action);
break;
case MLX5DR_ACTION_TYP_DEST_ROOT:
@@ -3027,6 +3028,9 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)
break;
case MLX5DR_ACTION_TYP_LAST:
break;
+ default:
+ DR_LOG(ERR, "Not supported action type: %d", action->type);
+ assert(false);
}
}
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index 72fc9e3d91..a4f778a8a4 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1033,7 +1033,8 @@ int mlx5dr_cmd_generate_wqe(struct ibv_context *ctx,
ret = mlx5_glue->devx_general_cmd(ctx, in, sizeof(in), out, sizeof(out));
if (ret) {
- DR_LOG(ERR, "Failed to write GTA WQE using FW");
+ DR_LOG(ERR, "Failed to write GTA WQE using FW (syndrome: %#x)",
+ mlx5dr_cmd_get_syndrome(out));
rte_errno = errno;
return rte_errno;
}
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 5/8] net/mlx5/hws: fix incorrect port ID on root item convert
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
` (2 preceding siblings ...)
2024-07-09 12:30 ` [PATCH 4/8] net/mlx5/hws: fix deletion of action vport Itamar Gozlan
@ 2024-07-09 12:31 ` Itamar Gozlan
2024-07-09 12:31 ` [PATCH 6/8] net/mlx5/hws: take out not needed variable Itamar Gozlan
` (2 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:31 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
From: Alex Vesker <valex@nvidia.com>
When calling item convert function we need to pass the port_id
in the attributes. This value should be passed not only for cases
that match on PORT related items, to resolve we will always pass it.
Fixes: 572fe9ef2f46 ("net/mlx5/hws: fix port ID for root table")
Cc: erezsh@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Alex Vesker <valex@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_matcher.c | 20 +++++---------------
drivers/net/mlx5/hws/mlx5dr_rule.c | 22 ++++++----------------
2 files changed, 11 insertions(+), 31 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c
index 6a939eb031..dfa2cd435c 100644
--- a/drivers/net/mlx5/hws/mlx5dr_matcher.c
+++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c
@@ -1231,7 +1231,6 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher)
struct mlx5dv_flow_match_parameters *mask;
struct mlx5_flow_attr flow_attr = {0};
struct rte_flow_error rte_error;
- struct rte_flow_item *item;
uint8_t match_criteria;
int ret;
@@ -1260,20 +1259,11 @@ static int mlx5dr_matcher_init_root(struct mlx5dr_matcher *matcher)
return rte_errno;
}
- /* We need the port id in case of matching representor */
- item = matcher->mt[0].items;
- while (item->type != RTE_FLOW_ITEM_TYPE_END) {
- if (item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR ||
- item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) {
- ret = flow_hw_get_port_id_from_ctx(ctx, &flow_attr.port_id);
- if (ret) {
- DR_LOG(ERR, "Failed to get port id for dev %s",
- ctx->ibv_ctx->device->name);
- rte_errno = EINVAL;
- return rte_errno;
- }
- }
- ++item;
+ ret = flow_hw_get_port_id_from_ctx(ctx, &flow_attr.port_id);
+ if (ret) {
+ DR_LOG(ERR, "Failed to get port id for dev %s", ctx->ibv_ctx->device->name);
+ rte_errno = EINVAL;
+ return rte_errno;
}
mask = simple_calloc(1, MLX5_ST_SZ_BYTES(fte_match_param) +
diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c
index 06d8e66f63..1edb7eac74 100644
--- a/drivers/net/mlx5/hws/mlx5dr_rule.c
+++ b/drivers/net/mlx5/hws/mlx5dr_rule.c
@@ -694,29 +694,19 @@ int mlx5dr_rule_create_root_no_comp(struct mlx5dr_rule *rule,
struct mlx5dr_rule_action rule_actions[])
{
struct mlx5dv_flow_matcher *dv_matcher = rule->matcher->dv_matcher;
+ struct mlx5dr_context *ctx = rule->matcher->tbl->ctx;
struct mlx5dv_flow_match_parameters *value;
struct mlx5_flow_attr flow_attr = {0};
struct mlx5dv_flow_action_attr *attr;
- const struct rte_flow_item *cur_item;
struct rte_flow_error error;
uint8_t match_criteria;
int ret;
- /* We need the port id in case of matching representor */
- cur_item = items;
- while (cur_item->type != RTE_FLOW_ITEM_TYPE_END) {
- if (cur_item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR ||
- cur_item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) {
- ret = flow_hw_get_port_id_from_ctx(rule->matcher->tbl->ctx,
- &flow_attr.port_id);
- if (ret) {
- DR_LOG(ERR, "Failed to get port id for dev %s",
- rule->matcher->tbl->ctx->ibv_ctx->device->name);
- rte_errno = EINVAL;
- return rte_errno;
- }
- }
- ++cur_item;
+ ret = flow_hw_get_port_id_from_ctx(ctx, &flow_attr.port_id);
+ if (ret) {
+ DR_LOG(ERR, "Failed to get port id for dev %s", ctx->ibv_ctx->device->name);
+ rte_errno = EINVAL;
+ return rte_errno;
}
attr = simple_calloc(num_actions, sizeof(*attr));
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 6/8] net/mlx5/hws: take out not needed variable
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
` (3 preceding siblings ...)
2024-07-09 12:31 ` [PATCH 5/8] net/mlx5/hws: fix incorrect port ID on root item convert Itamar Gozlan
@ 2024-07-09 12:31 ` Itamar Gozlan
2024-07-09 12:31 ` [PATCH 7/8] net/mlx5/hws: fix NAT64 csum issue Itamar Gozlan
2024-07-09 12:31 ` [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL Itamar Gozlan
6 siblings, 0 replies; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:31 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
From: Erez Shitrit <erezsh@nvidia.com>
Removing a redundant variable.
Was there from day 1, not in use.
Fixes: f8c8a6d8440d ("net/mlx5/hws: add action object")
Cc: erezsh@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_pat_arg.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_pat_arg.h b/drivers/net/mlx5/hws/mlx5dr_pat_arg.h
index bbe313102f..c4e0cbc843 100644
--- a/drivers/net/mlx5/hws/mlx5dr_pat_arg.h
+++ b/drivers/net/mlx5/hws/mlx5dr_pat_arg.h
@@ -30,7 +30,6 @@ struct mlx5dr_pattern_cache {
struct mlx5dr_pattern_cache_item {
struct {
struct mlx5dr_devx_obj *pattern_obj;
- struct dr_icm_chunk *chunk;
uint8_t *data;
uint16_t num_of_actions;
} mh_data;
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 7/8] net/mlx5/hws: fix NAT64 csum issue
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
` (4 preceding siblings ...)
2024-07-09 12:31 ` [PATCH 6/8] net/mlx5/hws: take out not needed variable Itamar Gozlan
@ 2024-07-09 12:31 ` Itamar Gozlan
2024-07-09 12:31 ` [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL Itamar Gozlan
6 siblings, 0 replies; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:31 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
From: Erez Shitrit <erezsh@nvidia.com>
Due to HW limitation we got two csum's that were not correct, udp and
ip, both of them were not calculated correctly by the HW.
By adding the next W/A we allow the HW to collect it well:
Separate the protocol field and zero all the addresses before fixed the
UDP csum.
We saw that the IP csum by the HW didn't take the ipv4 version as part
of the csum because the way it was inserted into the packet, in order to
solve that we added a prefix that takes into account the real csum for
the ip version and from that point the HW calculating the csum correctly.
Fixes: 06d969a8c5b8 ("net/mlx5/hws: support NAT64 flow action")
Cc: erezsh@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_action.c | 136 ++++++++++++++++++++++-----
drivers/net/mlx5/hws/mlx5dr_action.h | 15 ++-
2 files changed, 123 insertions(+), 28 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 0d90280a7d..8d3d0033e5 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -249,6 +249,62 @@ static void mlx5dr_action_put_shared_stc(struct mlx5dr_action *action,
mlx5dr_action_put_shared_stc_nic(ctx, stc_type, MLX5DR_TABLE_TYPE_FDB);
}
+static void
+mlx5dr_action_create_nat64_zero_all_addr(uint8_t **action_ptr, bool is_v4_to_v6)
+{
+ if (is_v4_to_v6) {
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_SIPV4);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_DIPV4);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ } else {
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_SIPV6_127_96);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_SIPV6_95_64);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_SIPV6_63_32);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_SIPV6_31_0);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_DIPV6_127_96);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_DIPV6_95_64);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_DIPV6_63_32);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(set_action_in, *action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, *action_ptr, field, MLX5_MODI_OUT_DIPV6_31_0);
+ MLX5_SET(set_action_in, *action_ptr, data, 0);
+ *action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ }
+}
+
static struct mlx5dr_action *
mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
struct mlx5dr_action_nat64_attr *attr,
@@ -329,17 +385,7 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
/* set sip and dip to 0, in order to have new csum */
- if (is_v4_to_v6) {
- MLX5_SET(set_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
- MLX5_SET(set_action_in, action_ptr, field, MLX5_MODI_OUT_SIPV4);
- MLX5_SET(set_action_in, action_ptr, data, 0);
- action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
-
- MLX5_SET(set_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
- MLX5_SET(set_action_in, action_ptr, field, MLX5_MODI_OUT_DIPV4);
- MLX5_SET(set_action_in, action_ptr, data, 0);
- action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
- }
+ mlx5dr_action_create_nat64_zero_all_addr(&action_ptr, is_v4_to_v6);
pat[0].data = modify_action_data;
pat[0].sz = (action_ptr - (uint8_t *)modify_action_data);
@@ -383,9 +429,14 @@ mlx5dr_action_create_nat64_repalce_state(struct mlx5dr_context *ctx,
memcpy(address_prefix, nat64_well_known_pref,
MLX5DR_ACTION_NAT64_HEADER_MINUS_ONE * sizeof(uint32_t));
} else {
+ /* In order to fix HW csum issue, make the prefix ready */
+ uint32_t ipv4_pref[] = {0x0, 0xffba0000, 0x0, 0x0, 0x0};
+
header_size_in_dw = MLX5DR_ACTION_NAT64_IPV4_HEADER;
ip_ver = MLX5DR_ACTION_NAT64_IPV4_VER;
eth_type = RTE_ETHER_TYPE_IPV4;
+ memcpy(address_prefix, ipv4_pref,
+ MLX5DR_ACTION_NAT64_IPV4_HEADER * sizeof(uint32_t));
}
memset(modify_action_data, 0, sizeof(modify_action_data));
@@ -441,6 +492,46 @@ mlx5dr_action_create_nat64_repalce_state(struct mlx5dr_context *ctx,
return action;
}
+static struct mlx5dr_action *
+mlx5dr_action_create_nat64_copy_proto_state(struct mlx5dr_context *ctx,
+ struct mlx5dr_action_nat64_attr *attr,
+ uint32_t flags)
+{
+ __be64 modify_action_data[MLX5DR_ACTION_NAT64_MAX_MODIFY_ACTIONS];
+ struct mlx5dr_action_mh_pattern pat[2];
+ struct mlx5dr_action *action;
+ uint8_t *action_ptr;
+
+ memset(modify_action_data, 0, sizeof(modify_action_data));
+ action_ptr = (uint8_t *)modify_action_data;
+
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
+ MLX5_SET(copy_action_in, action_ptr, src_field,
+ attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
+ MLX5_SET(copy_action_in, action_ptr, dst_field,
+ MLX5_MODI_OUT_IP_PROTOCOL);
+ MLX5_SET(copy_action_in, action_ptr, src_offset, 16);
+ MLX5_SET(copy_action_in, action_ptr, dst_offset, 0);
+ MLX5_SET(copy_action_in, action_ptr, length, 8);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ pat[0].data = modify_action_data;
+ pat[0].sz = action_ptr - (uint8_t *)modify_action_data;
+
+ action = mlx5dr_action_create_modify_header_reparse(ctx, 1, pat, 0, flags,
+ MLX5DR_ACTION_STC_REPARSE_ON);
+ if (!action) {
+ DR_LOG(ERR, "Failed to create action: action_sz: %zu, flags: 0x%x\n",
+ pat[0].sz, flags);
+ return NULL;
+ }
+
+ return action;
+}
+
static struct mlx5dr_action *
mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
struct mlx5dr_action_nat64_attr *attr,
@@ -490,16 +581,6 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
- MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
- MLX5_SET(copy_action_in, action_ptr, src_field,
- attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
- MLX5_SET(copy_action_in, action_ptr, dst_field,
- MLX5_MODI_OUT_IP_PROTOCOL);
- MLX5_SET(copy_action_in, action_ptr, src_offset, 16);
- MLX5_SET(copy_action_in, action_ptr, dst_offset, 0);
- MLX5_SET(copy_action_in, action_ptr, length, 8);
- action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
-
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
@@ -2051,7 +2132,7 @@ mlx5dr_action_create_modify_header_hws(struct mlx5dr_action *action,
return rte_errno;
}
-static struct mlx5dr_action *
+struct mlx5dr_action *
mlx5dr_action_create_modify_header_reparse(struct mlx5dr_context *ctx,
uint8_t num_of_patterns,
struct mlx5dr_action_mh_pattern *patterns,
@@ -2927,17 +3008,24 @@ mlx5dr_action_create_nat64(struct mlx5dr_context *ctx,
DR_LOG(ERR, "Nat64 failed creating replace state");
goto free_copy;
}
+ action->nat64.stages[MLX5DR_ACTION_NAT64_STAGE_COPY_PROTOCOL] =
+ mlx5dr_action_create_nat64_copy_proto_state(ctx, attr, flags);
+ if (!action->nat64.stages[MLX5DR_ACTION_NAT64_STAGE_COPY_PROTOCOL]) {
+ DR_LOG(ERR, "Nat64 failed creating copy protocol state");
+ goto free_replace;
+ }
action->nat64.stages[MLX5DR_ACTION_NAT64_STAGE_COPYBACK] =
mlx5dr_action_create_nat64_copy_back_state(ctx, attr, flags);
if (!action->nat64.stages[MLX5DR_ACTION_NAT64_STAGE_COPYBACK]) {
DR_LOG(ERR, "Nat64 failed creating copyback state");
- goto free_replace;
+ goto free_copy_proto;
}
return action;
-
+free_copy_proto:
+ mlx5dr_action_destroy(action->nat64.stages[MLX5DR_ACTION_NAT64_STAGE_COPY_PROTOCOL]);
free_replace:
mlx5dr_action_destroy(action->nat64.stages[MLX5DR_ACTION_NAT64_STAGE_REPLACE]);
free_copy:
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h
index 57e059a572..faea6bb1f4 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.h
+++ b/drivers/net/mlx5/hws/mlx5dr_action.h
@@ -11,9 +11,6 @@
/* Max number of internal subactions of ipv6_ext */
#define MLX5DR_ACTION_IPV6_EXT_MAX_SA 4
-/* Number of MH in NAT64 */
-#define MLX5DR_ACTION_NAT64_STAGES 3
-
enum mlx5dr_action_stc_idx {
MLX5DR_ACTION_STC_IDX_CTRL = 0,
MLX5DR_ACTION_STC_IDX_HIT = 1,
@@ -88,7 +85,10 @@ enum {
enum mlx5dr_action_nat64_stages {
MLX5DR_ACTION_NAT64_STAGE_COPY = 0,
MLX5DR_ACTION_NAT64_STAGE_REPLACE = 1,
- MLX5DR_ACTION_NAT64_STAGE_COPYBACK = 2,
+ MLX5DR_ACTION_NAT64_STAGE_COPY_PROTOCOL = 2,
+ MLX5DR_ACTION_NAT64_STAGE_COPYBACK = 3,
+ /* Number of MH in NAT64 */
+ MLX5DR_ACTION_NAT64_STAGES = 4,
};
/* Registers for keeping data from stage to stage */
@@ -256,6 +256,13 @@ int mlx5dr_action_alloc_single_stc(struct mlx5dr_context *ctx,
void mlx5dr_action_free_single_stc(struct mlx5dr_context *ctx,
uint32_t table_type,
struct mlx5dr_pool_chunk *stc);
+struct mlx5dr_action *
+mlx5dr_action_create_modify_header_reparse(struct mlx5dr_context *ctx,
+ uint8_t num_of_patterns,
+ struct mlx5dr_action_mh_pattern *patterns,
+ uint32_t log_bulk_size,
+ uint32_t flags, uint32_t reparse);
+
static inline void
mlx5dr_action_setter_default_single(struct mlx5dr_actions_apply_data *apply,
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL
[not found] ` <20240709123103.2101902-1-igozlan@nvidia.com>
` (5 preceding siblings ...)
2024-07-09 12:31 ` [PATCH 7/8] net/mlx5/hws: fix NAT64 csum issue Itamar Gozlan
@ 2024-07-09 12:31 ` Itamar Gozlan
2024-07-09 15:25 ` Bing Zhao
6 siblings, 1 reply; 15+ messages in thread
From: Itamar Gozlan @ 2024-07-09 12:31 UTC (permalink / raw)
To: igozlan, erezsh, hamdani, kliteyn, valex, viacheslavo, thomas,
suanmingm, Dariusz Sosnowski, Bing Zhao, Ori Kam, Matan Azrad
Cc: dev, stable
From: Erez Shitrit <erezsh@nvidia.com>
We don't have enough registers to copy TTL and TOS, so we will set TTL
to be the default value (64) and will copy TOS.
Fixes: 06d969a8c5b8 ("net/mlx5/hws: support NAT64 flow action")
Cc: erezsh@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_action.c | 66 +++++++++++++++++++++++-----
drivers/net/mlx5/hws/mlx5dr_action.h | 2 +
2 files changed, 56 insertions(+), 12 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 8d3d0033e5..8f6be37818 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -315,21 +315,27 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
struct mlx5dr_action *action;
uint32_t packet_len_field;
uint8_t *action_ptr;
- uint32_t ttl_field;
+ uint32_t tos_field;
+ uint32_t tos_size;
uint32_t src_addr;
uint32_t dst_addr;
bool is_v4_to_v6;
+ uint32_t ecn;
is_v4_to_v6 = attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6;
if (is_v4_to_v6) {
packet_len_field = MLX5_MODI_OUT_IPV4_TOTAL_LEN;
- ttl_field = MLX5_MODI_OUT_IPV4_TTL;
+ tos_field = MLX5_MODI_OUT_IP_DSCP;
+ tos_size = 6;
+ ecn = MLX5_MODI_OUT_IP_ECN;
src_addr = MLX5_MODI_OUT_SIPV4;
dst_addr = MLX5_MODI_OUT_DIPV4;
} else {
packet_len_field = MLX5_MODI_OUT_IPV6_PAYLOAD_LEN;
- ttl_field = MLX5_MODI_OUT_IPV6_HOPLIMIT;
+ tos_field = MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS;
+ tos_size = 8;
+ ecn = 0;
src_addr = MLX5_MODI_OUT_SIPV6_31_0;
dst_addr = MLX5_MODI_OUT_DIPV6_31_0;
}
@@ -352,7 +358,7 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
}
/* | 8 bit - 8 bit - 16 bit |
- * | ttl - protocol - packet-len |
+ * | TOS - protocol - packet-len |
*/
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
MLX5_SET(copy_action_in, action_ptr, src_field, packet_len_field);
@@ -377,12 +383,25 @@ mlx5dr_action_create_nat64_copy_state(struct mlx5dr_context *ctx,
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
- MLX5_SET(copy_action_in, action_ptr, src_field, ttl_field);
+ MLX5_SET(copy_action_in, action_ptr, src_field, tos_field);
MLX5_SET(copy_action_in, action_ptr, dst_field,
attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
MLX5_SET(copy_action_in, action_ptr, dst_offset, 24);
- MLX5_SET(copy_action_in, action_ptr, length, 8);
+ MLX5_SET(copy_action_in, action_ptr, length, tos_size);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ /* in ipv4 TOS = {dscp (6bits) - ecn (2bits) }*/
+ if (ecn) {
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
+ MLX5_SET(copy_action_in, action_ptr, src_field, ecn);
+ MLX5_SET(copy_action_in, action_ptr, dst_field,
+ attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
+ MLX5_SET(copy_action_in, action_ptr, dst_offset, 24 + tos_size);
+ MLX5_SET(copy_action_in, action_ptr, length, MLX5DR_ACTION_NAT64_ECN_SIZE);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ }
/* set sip and dip to 0, in order to have new csum */
mlx5dr_action_create_nat64_zero_all_addr(&action_ptr, is_v4_to_v6);
@@ -543,10 +562,13 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
uint32_t packet_len_field;
uint32_t packet_len_add;
uint8_t *action_ptr;
+ uint32_t tos_field;
uint32_t ttl_field;
+ uint32_t tos_size;
uint32_t src_addr;
uint32_t dst_addr;
bool is_v4_to_v6;
+ uint32_t ecn;
is_v4_to_v6 = attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6;
@@ -557,6 +579,9 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
ttl_field = MLX5_MODI_OUT_IPV6_HOPLIMIT;
src_addr = MLX5_MODI_OUT_SIPV6_31_0;
dst_addr = MLX5_MODI_OUT_DIPV6_31_0;
+ tos_field = MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS;
+ tos_size = 8;
+ ecn = 0;
} else {
packet_len_field = MLX5_MODI_OUT_IPV4_TOTAL_LEN;
/* ipv4 len is including 20 bytes of the header, so add 20 over ipv6 len */
@@ -564,6 +589,9 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
ttl_field = MLX5_MODI_OUT_IPV4_TTL;
src_addr = MLX5_MODI_OUT_SIPV4;
dst_addr = MLX5_MODI_OUT_DIPV4;
+ tos_field = MLX5_MODI_OUT_IP_DSCP;
+ tos_size = 6;
+ ecn = MLX5_MODI_OUT_IP_ECN;
}
memset(modify_action_data, 0, sizeof(modify_action_data));
@@ -578,20 +606,34 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
MLX5_SET(copy_action_in, action_ptr, length, 16);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
- MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
- action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
-
- MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ MLX5_SET(set_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_SET);
+ MLX5_SET(set_action_in, action_ptr, field, ttl_field);
+ MLX5_SET(set_action_in, action_ptr, length, 8);
+ MLX5_SET(set_action_in, action_ptr, data, MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ /* copy TOS */
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
MLX5_SET(copy_action_in, action_ptr, src_field,
attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
- MLX5_SET(copy_action_in, action_ptr, dst_field, ttl_field);
+ MLX5_SET(copy_action_in, action_ptr, dst_field, tos_field);
MLX5_SET(copy_action_in, action_ptr, src_offset, 24);
- MLX5_SET(copy_action_in, action_ptr, length, 8);
+ MLX5_SET(copy_action_in, action_ptr, length, tos_size);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ if (ecn) {
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+
+ MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_COPY);
+ MLX5_SET(copy_action_in, action_ptr, src_field,
+ attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
+ MLX5_SET(copy_action_in, action_ptr, dst_field, ecn);
+ MLX5_SET(copy_action_in, action_ptr, src_offset, 24 + tos_size);
+ MLX5_SET(copy_action_in, action_ptr, length, MLX5DR_ACTION_NAT64_ECN_SIZE);
+ action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
+ }
+
MLX5_SET(copy_action_in, action_ptr, action_type, MLX5_MODIFICATION_TYPE_NOP);
action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h
index faea6bb1f4..ba4ce55228 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.h
+++ b/drivers/net/mlx5/hws/mlx5dr_action.h
@@ -79,6 +79,8 @@ enum {
MLX5DR_ACTION_NAT64_IPV4_HEADER = 5,
MLX5DR_ACTION_NAT64_IPV6_VER = 0x60000000,
MLX5DR_ACTION_NAT64_IPV4_VER = 0x45000000,
+ MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL = 64,
+ MLX5DR_ACTION_NAT64_ECN_SIZE = 2,
};
/* 3 stages for the nat64 action */
--
2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread* RE: [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL
2024-07-09 12:31 ` [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL Itamar Gozlan
@ 2024-07-09 15:25 ` Bing Zhao
0 siblings, 0 replies; 15+ messages in thread
From: Bing Zhao @ 2024-07-09 15:25 UTC (permalink / raw)
To: Itamar Gozlan, Erez Shitrit, Hamdan Agbariya, Yevgeny Kliteynik,
Alex Vesker, Slava Ovsiienko,
NBU-Contact-Thomas Monjalon (EXTERNAL),
Suanming Mou, Dariusz Sosnowski, Ori Kam, Matan Azrad
Cc: dev, stable
Hi Itamar & Erez,
Typo: NA64 -> NAT64
BR. Bing
> -----Original Message-----
> From: Itamar Gozlan <igozlan@nvidia.com>
> Sent: Tuesday, July 9, 2024 8:31 PM
> To: Itamar Gozlan <igozlan@nvidia.com>; Erez Shitrit <erezsh@nvidia.com>;
> Hamdan Agbariya <hamdani@nvidia.com>; Yevgeny Kliteynik
> <kliteyn@nvidia.com>; Alex Vesker <valex@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; NBU-Contact-Thomas Monjalon (EXTERNAL)
> <thomas@monjalon.net>; Suanming Mou <suanmingm@nvidia.com>; Dariusz
> Sosnowski <dsosnowski@nvidia.com>; Bing Zhao <bingz@nvidia.com>; Ori Kam
> <orika@nvidia.com>; Matan Azrad <matan@nvidia.com>
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL
>
> From: Erez Shitrit <erezsh@nvidia.com>
>
> We don't have enough registers to copy TTL and TOS, so we will set TTL to
> be the default value (64) and will copy TOS.
>
> Fixes: 06d969a8c5b8 ("net/mlx5/hws: support NAT64 flow action")
> Cc: erezsh@nvidia.com
> Cc: stable@dpdk.org
>
> Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
> ---
> drivers/net/mlx5/hws/mlx5dr_action.c | 66 +++++++++++++++++++++++-----
> drivers/net/mlx5/hws/mlx5dr_action.h | 2 +
> 2 files changed, 56 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
> b/drivers/net/mlx5/hws/mlx5dr_action.c
> index 8d3d0033e5..8f6be37818 100644
> --- a/drivers/net/mlx5/hws/mlx5dr_action.c
> +++ b/drivers/net/mlx5/hws/mlx5dr_action.c
> @@ -315,21 +315,27 @@ mlx5dr_action_create_nat64_copy_state(struct
> mlx5dr_context *ctx,
> struct mlx5dr_action *action;
> uint32_t packet_len_field;
> uint8_t *action_ptr;
> - uint32_t ttl_field;
> + uint32_t tos_field;
> + uint32_t tos_size;
> uint32_t src_addr;
> uint32_t dst_addr;
> bool is_v4_to_v6;
> + uint32_t ecn;
>
> is_v4_to_v6 = attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6;
>
> if (is_v4_to_v6) {
> packet_len_field = MLX5_MODI_OUT_IPV4_TOTAL_LEN;
> - ttl_field = MLX5_MODI_OUT_IPV4_TTL;
> + tos_field = MLX5_MODI_OUT_IP_DSCP;
> + tos_size = 6;
> + ecn = MLX5_MODI_OUT_IP_ECN;
> src_addr = MLX5_MODI_OUT_SIPV4;
> dst_addr = MLX5_MODI_OUT_DIPV4;
> } else {
> packet_len_field = MLX5_MODI_OUT_IPV6_PAYLOAD_LEN;
> - ttl_field = MLX5_MODI_OUT_IPV6_HOPLIMIT;
> + tos_field = MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS;
> + tos_size = 8;
> + ecn = 0;
> src_addr = MLX5_MODI_OUT_SIPV6_31_0;
> dst_addr = MLX5_MODI_OUT_DIPV6_31_0;
> }
> @@ -352,7 +358,7 @@ mlx5dr_action_create_nat64_copy_state(struct
> mlx5dr_context *ctx,
> }
>
> /* | 8 bit - 8 bit - 16 bit |
> - * | ttl - protocol - packet-len |
> + * | TOS - protocol - packet-len |
> */
> MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_COPY);
> MLX5_SET(copy_action_in, action_ptr, src_field, packet_len_field);
> @@ -377,12 +383,25 @@ mlx5dr_action_create_nat64_copy_state(struct
> mlx5dr_context *ctx,
> action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
>
> MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_COPY);
> - MLX5_SET(copy_action_in, action_ptr, src_field, ttl_field);
> + MLX5_SET(copy_action_in, action_ptr, src_field, tos_field);
> MLX5_SET(copy_action_in, action_ptr, dst_field,
> attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
> MLX5_SET(copy_action_in, action_ptr, dst_offset, 24);
> - MLX5_SET(copy_action_in, action_ptr, length, 8);
> + MLX5_SET(copy_action_in, action_ptr, length, tos_size);
> action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
> + /* in ipv4 TOS = {dscp (6bits) - ecn (2bits) }*/
> + if (ecn) {
> + MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_NOP);
> + action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
> +
> + MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_COPY);
> + MLX5_SET(copy_action_in, action_ptr, src_field, ecn);
> + MLX5_SET(copy_action_in, action_ptr, dst_field,
> + attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
> + MLX5_SET(copy_action_in, action_ptr, dst_offset, 24 +
> tos_size);
> + MLX5_SET(copy_action_in, action_ptr, length,
> MLX5DR_ACTION_NAT64_ECN_SIZE);
> + action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
> + }
>
> /* set sip and dip to 0, in order to have new csum */
> mlx5dr_action_create_nat64_zero_all_addr(&action_ptr, is_v4_to_v6);
> @@ -543,10 +562,13 @@ mlx5dr_action_create_nat64_copy_back_state(struct
> mlx5dr_context *ctx,
> uint32_t packet_len_field;
> uint32_t packet_len_add;
> uint8_t *action_ptr;
> + uint32_t tos_field;
> uint32_t ttl_field;
> + uint32_t tos_size;
> uint32_t src_addr;
> uint32_t dst_addr;
> bool is_v4_to_v6;
> + uint32_t ecn;
>
> is_v4_to_v6 = attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6;
>
> @@ -557,6 +579,9 @@ mlx5dr_action_create_nat64_copy_back_state(struct
> mlx5dr_context *ctx,
> ttl_field = MLX5_MODI_OUT_IPV6_HOPLIMIT;
> src_addr = MLX5_MODI_OUT_SIPV6_31_0;
> dst_addr = MLX5_MODI_OUT_DIPV6_31_0;
> + tos_field = MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS;
> + tos_size = 8;
> + ecn = 0;
> } else {
> packet_len_field = MLX5_MODI_OUT_IPV4_TOTAL_LEN;
> /* ipv4 len is including 20 bytes of the header, so add 20
> over ipv6 len */ @@ -564,6 +589,9 @@
> mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
> ttl_field = MLX5_MODI_OUT_IPV4_TTL;
> src_addr = MLX5_MODI_OUT_SIPV4;
> dst_addr = MLX5_MODI_OUT_DIPV4;
> + tos_field = MLX5_MODI_OUT_IP_DSCP;
> + tos_size = 6;
> + ecn = MLX5_MODI_OUT_IP_ECN;
> }
>
> memset(modify_action_data, 0, sizeof(modify_action_data)); @@ -
> 578,20 +606,34 @@ mlx5dr_action_create_nat64_copy_back_state(struct
> mlx5dr_context *ctx,
> MLX5_SET(copy_action_in, action_ptr, length, 16);
> action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
>
> - MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_NOP);
> - action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
> -
> - MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_NOP);
> + MLX5_SET(set_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_SET);
> + MLX5_SET(set_action_in, action_ptr, field, ttl_field);
> + MLX5_SET(set_action_in, action_ptr, length, 8);
> + MLX5_SET(set_action_in, action_ptr, data,
> +MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL);
> action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
>
> + /* copy TOS */
> MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_COPY);
> MLX5_SET(copy_action_in, action_ptr, src_field,
> attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
> - MLX5_SET(copy_action_in, action_ptr, dst_field, ttl_field);
> + MLX5_SET(copy_action_in, action_ptr, dst_field, tos_field);
> MLX5_SET(copy_action_in, action_ptr, src_offset, 24);
> - MLX5_SET(copy_action_in, action_ptr, length, 8);
> + MLX5_SET(copy_action_in, action_ptr, length, tos_size);
> action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
>
> + if (ecn) {
> + MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_NOP);
> + action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
> +
> + MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_COPY);
> + MLX5_SET(copy_action_in, action_ptr, src_field,
> + attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
> + MLX5_SET(copy_action_in, action_ptr, dst_field, ecn);
> + MLX5_SET(copy_action_in, action_ptr, src_offset, 24 +
> tos_size);
> + MLX5_SET(copy_action_in, action_ptr, length,
> MLX5DR_ACTION_NAT64_ECN_SIZE);
> + action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
> + }
> +
> MLX5_SET(copy_action_in, action_ptr, action_type,
> MLX5_MODIFICATION_TYPE_NOP);
> action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
>
> diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h
> b/drivers/net/mlx5/hws/mlx5dr_action.h
> index faea6bb1f4..ba4ce55228 100644
> --- a/drivers/net/mlx5/hws/mlx5dr_action.h
> +++ b/drivers/net/mlx5/hws/mlx5dr_action.h
> @@ -79,6 +79,8 @@ enum {
> MLX5DR_ACTION_NAT64_IPV4_HEADER = 5,
> MLX5DR_ACTION_NAT64_IPV6_VER = 0x60000000,
> MLX5DR_ACTION_NAT64_IPV4_VER = 0x45000000,
> + MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL = 64,
> + MLX5DR_ACTION_NAT64_ECN_SIZE = 2,
> };
>
> /* 3 stages for the nat64 action */
> --
> 2.39.3
^ permalink raw reply [flat|nested] 15+ messages in thread