* [PATCH 23.11] net/ice/base: fix preparing PHY for timesync command
@ 2024-08-15 13:11 Ian Stokes
2024-08-21 8:58 ` Xueming Li
0 siblings, 1 reply; 2+ messages in thread
From: Ian Stokes @ 2024-08-15 13:11 UTC (permalink / raw)
To: stable; +Cc: Tomasz Wakula, Ian Stokes, Bruce Richardson
From: Tomasz Wakula <tomaszx.wakula@intel.com>
When preparing a port for timesync command SW should provide Rx type,
which indicates the type for the Rx metadata in the ONPI interface.
According to the documentation, Rx type should always equal 0x18.
Fixes: 97f4f78bbd9f ("net/ice/base: add functions for device clock control")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Wakula <tomaszx.wakula@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/ice/base/ice_ptp_hw.c | 4 ++--
drivers/net/ice/base/ice_ptp_hw.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 548ef5e820..c507f211df 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -2817,8 +2817,8 @@ ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,
val &= ~TS_CMD_MASK;
val |= cmd_val;
- status = ice_write_phy_reg_e822_lp(hw, port, P_REG_TX_TMR_CMD, val,
- lock_sbq);
+ status = ice_write_phy_reg_e822_lp(hw, port, P_REG_TX_TMR_CMD,
+ val | TS_CMD_RX_TYPE, lock_sbq);
if (status) {
ice_debug(hw, ICE_DBG_PTP, "Failed to write back TX_TMR_CMD, status %d\n",
status);
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 3667c9882d..f53b9e3ecc 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -295,6 +295,8 @@ enum ice_status ice_ptp_init_phy_cfg(struct ice_hw *hw);
#define TS_CMD_MASK_E810 0xFF
#define TS_CMD_MASK 0xF
#define SYNC_EXEC_CMD 0x3
+#define TS_CMD_RX_TYPE_S 0x4
+#define TS_CMD_RX_TYPE MAKEMASK(0x18, TS_CMD_RX_TYPE_S)
/* Macros to derive port low and high addresses on both quads */
#define P_Q0_L(a, p) ((((a) + (0x2000 * (p)))) & 0xFFFF)
--
2.34.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH 23.11] net/ice/base: fix preparing PHY for timesync command
2024-08-15 13:11 [PATCH 23.11] net/ice/base: fix preparing PHY for timesync command Ian Stokes
@ 2024-08-21 8:58 ` Xueming Li
0 siblings, 0 replies; 2+ messages in thread
From: Xueming Li @ 2024-08-21 8:58 UTC (permalink / raw)
To: Ian Stokes, stable; +Cc: Tomasz Wakula, Bruce Richardson
[-- Attachment #1: Type: text/plain, Size: 2612 bytes --]
Hi Ian,
Thanks for your help, patch enqueued to LTS release candidates.
Best Regards,
Xueming
________________________________
From: Ian Stokes <ian.stokes@intel.com>
Sent: Thursday, August 15, 2024 9:11 PM
To: stable@dpdk.org <stable@dpdk.org>
Cc: Tomasz Wakula <tomaszx.wakula@intel.com>; Ian Stokes <ian.stokes@intel.com>; Bruce Richardson <bruce.richardson@intel.com>
Subject: [PATCH 23.11] net/ice/base: fix preparing PHY for timesync command
From: Tomasz Wakula <tomaszx.wakula@intel.com>
When preparing a port for timesync command SW should provide Rx type,
which indicates the type for the Rx metadata in the ONPI interface.
According to the documentation, Rx type should always equal 0x18.
Fixes: 97f4f78bbd9f ("net/ice/base: add functions for device clock control")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Wakula <tomaszx.wakula@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/ice/base/ice_ptp_hw.c | 4 ++--
drivers/net/ice/base/ice_ptp_hw.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 548ef5e820..c507f211df 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -2817,8 +2817,8 @@ ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,
val &= ~TS_CMD_MASK;
val |= cmd_val;
- status = ice_write_phy_reg_e822_lp(hw, port, P_REG_TX_TMR_CMD, val,
- lock_sbq);
+ status = ice_write_phy_reg_e822_lp(hw, port, P_REG_TX_TMR_CMD,
+ val | TS_CMD_RX_TYPE, lock_sbq);
if (status) {
ice_debug(hw, ICE_DBG_PTP, "Failed to write back TX_TMR_CMD, status %d\n",
status);
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 3667c9882d..f53b9e3ecc 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -295,6 +295,8 @@ enum ice_status ice_ptp_init_phy_cfg(struct ice_hw *hw);
#define TS_CMD_MASK_E810 0xFF
#define TS_CMD_MASK 0xF
#define SYNC_EXEC_CMD 0x3
+#define TS_CMD_RX_TYPE_S 0x4
+#define TS_CMD_RX_TYPE MAKEMASK(0x18, TS_CMD_RX_TYPE_S)
/* Macros to derive port low and high addresses on both quads */
#define P_Q0_L(a, p) ((((a) + (0x2000 * (p)))) & 0xFFFF)
--
2.34.1
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