[PATCH] net/mlx5/hws: in NAT64 fix TC to TOS fields mapping

[PATCH] net/mlx5/hws: in NAT64 fix TC to TOS fields mapping

[Itamar Gozlan]

From: Hamdan Igbaria <hamdani@nvidia.com>

In IPv6 to IPv4 scenario when copying the TC field to the
TOS[DSCP:6 bits, ECN: 2 bits] field the mapping of the fields
get set wrongly, since the destination field of TOS is defined as 2
split fields of DSCP and ECN.
In IPv4 to IPv6 we don't have this issue since both the source field of
TOS and destination field of TC defined as 8 bits.
Example to the problematic case of IPv6 to IPv4, TOS to TC mapping:
TC=[abcdefgh], it should be mapped to TOS=[DSCP=abcdef, ECN=gh],
but instead it was mapped as follow TOS=[DSCP=cdefgh, ECN=ab].

Fixes: 06d969a8c5b8 ("net/mlx5/hws: support NAT64 flow action")
Cc: stable@dpdk.org

Signed-off-by: Hamdan Igbaria <hamdani@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_action.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 3fceb96de2..f163be256c 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -617,7 +617,7 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
 	MLX5_SET(copy_action_in, action_ptr, src_field,
 		 attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
 	MLX5_SET(copy_action_in, action_ptr, dst_field, tos_field);
-	MLX5_SET(copy_action_in, action_ptr, src_offset, 24);
+	MLX5_SET(copy_action_in, action_ptr, src_offset, 24 + (ecn ? MLX5DR_ACTION_NAT64_ECN_SIZE : 0));
 	MLX5_SET(copy_action_in, action_ptr, length, tos_size);
 	action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
 
@@ -629,7 +629,7 @@ mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx,
 		MLX5_SET(copy_action_in, action_ptr, src_field,
 			attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]);
 		MLX5_SET(copy_action_in, action_ptr, dst_field, ecn);
-		MLX5_SET(copy_action_in, action_ptr, src_offset, 24 + tos_size);
+		MLX5_SET(copy_action_in, action_ptr, src_offset, 24);
 		MLX5_SET(copy_action_in, action_ptr, length, MLX5DR_ACTION_NAT64_ECN_SIZE);
 		action_ptr += MLX5DR_ACTION_DOUBLE_SIZE;
 	}
-- 
2.39.3