From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B26945AF8 for ; Wed, 9 Oct 2024 23:17:49 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 56EA94060C; Wed, 9 Oct 2024 23:17:48 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by mails.dpdk.org (Postfix) with ESMTP id BCD3740156; Wed, 9 Oct 2024 23:17:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728508663; x=1760044663; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2H3ZJLJG/5jcehli+5AItw+6/+3c6y7dREefHuplMSI=; b=Pyi4IcYKhkPayqeQLmKhuVyQK4NMpzK/PENX+zGOfPnYrXSs0M8S3V9s qbiYa13a/MljBDQdFCwcxF+ypTnYxSHv6CYglx+y8XEmvsd9mPKJamZOE /eJrGmU4FhNxGemUNjcbqFtrf6XgwettZvKcy2E5Uhp9L7Q0zCfmRJzpM gwaCYJ8lGCc+EKaszldVqH0JMzvGeAIZRJXyzMTFjkI4lVHHbMDWbaoNs zCosiLA9Ihy0FcxYlgqMx1nyeIJamOaqlG9XUYbIFLhRoKB6yb/AyKd6F 6SLC7J7zflYNACX5ndZzkeTFJrbItRep2AP4NHuQBLUSP1fULYi4OE7Qy A==; X-CSE-ConnectionGUID: I/glm3LwQ625tkkOIenC/A== X-CSE-MsgGUID: zmzGsMJmQIOSE3RNqE/yLA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="39202224" X-IronPort-AV: E=Sophos;i="6.11,190,1725346800"; d="scan'208";a="39202224" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 14:17:41 -0700 X-CSE-ConnectionGUID: yT74MpYqTGyvgssk2wfY7A== X-CSE-MsgGUID: rNqGoPz4T3KG8FxMz3pMhg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,190,1725346800"; d="scan'208";a="76480586" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmviesa008.fm.intel.com with ESMTP; 09 Oct 2024 14:17:41 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas , stable@dpdk.org Subject: [PATCH v3 02/12] baseband/acc: fix soft output bypass RM Date: Wed, 9 Oct 2024 14:12:52 -0700 Message-Id: <20241009211302.177471-3-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20241009211302.177471-1-hernan.vargas@intel.com> References: <20241009211302.177471-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Removing soft output bypass RM capability due to VRB2 device limitations. Fixes: b49fe052f9cd ("baseband/acc: add FEC capabilities for VRB2 variant") Cc: stable@dpdk.org Signed-off-by: Hernan Vargas --- drivers/baseband/acc/rte_vrb_pmd.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index e3f98d6e421c..52a683e4e49b 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -1272,7 +1272,6 @@ vrb_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION | RTE_BBDEV_LDPC_LLR_COMPRESSION | RTE_BBDEV_LDPC_SOFT_OUT_ENABLE | - RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS | RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS | RTE_BBDEV_LDPC_DEC_INTERRUPTS, .llr_size = 8, @@ -1643,18 +1642,18 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, fcw->so_en = check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_SOFT_OUT_ENABLE); fcw->so_bypass_intlv = check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS); - fcw->so_bypass_rm = check_bit(op->ldpc_dec.op_flags, - RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS); + fcw->so_bypass_rm = 0; fcw->minsum_offset = 1; fcw->dec_llrclip = 2; } /* - * These are all implicitly set + * These are all implicitly set: * fcw->synd_post = 0; * fcw->dec_convllr = 0; * fcw->hcout_convllr = 0; * fcw->hcout_size1 = 0; + * fcw->so_it = 0; * fcw->hcout_offset = 0; * fcw->negstop_th = 0; * fcw->negstop_it = 0; -- 2.37.1