[PATCH v1] net/ice: fix incorrect reading of PHY timestamp

[PATCH v1] net/ice: fix incorrect reading of PHY timestamp

[Soumyadeep Hore]

In ICE PMD, previously the ready bitmap checking before reading
PHY timestamp was not present. This caused incorrect Tx
timestamping.

The ready bitmap checking is enabled and PHY timestamp is read once
the ready bitmap gives positive value.

Fixes: 881169950d80 ("net/ice/base: implement initial PTP support for E830")
Cc: stable@dpdk.org

Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/net/ice/ice_ethdev.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 7b1bd163a2..2357d6e1da 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -6516,14 +6516,32 @@ ice_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
 	struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct ice_adapter *ad =
 			ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+	struct ice_tx_queue *txq;
 	uint8_t lport;
-	uint64_t ts_ns, ns, tstamp;
+	uint64_t ts_ns, ns, tstamp, tstamp_ready = 0;
+	uint64_t start_time, curr_time;
 	const uint64_t mask = 0xFFFFFFFF;
 	int ret;
 
+	txq = dev->data->tx_queues[0];
 	lport = hw->port_info->lport;
 
-	ret = ice_read_phy_tstamp(hw, lport, 0, &tstamp);
+	start_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
+
+	while (!(tstamp_ready & BIT_ULL(0))) {
+		ret = ice_get_phy_tx_tstamp_ready(hw, lport, &tstamp_ready);
+		if (ret) {
+			PMD_DRV_LOG(ERR, "Failed to get phy ready for timestamp");
+			return -1;
+		}
+		curr_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
+		if (curr_time - start_time > 1000) {
+			PMD_DRV_LOG(ERR, "Timeout to get phy ready for timestamp");
+			return -1;
+		}
+	}
+
+	ret = ice_read_phy_tstamp(hw, lport, txq->queue_id, &tstamp);
 	if (ret) {
 		PMD_DRV_LOG(ERR, "Failed to read phy timestamp");
 		return -1;
-- 
2.43.0

RE: [PATCH v1] net/ice: fix incorrect reading of PHY timestamp

[Hore, Soumyadeep]

Hi Bruce,

Let's keep it separate for better tracking of the bug fix.

On Fri, Aug 23, 2024 at 11:01:33AM +0000, Soumyadeep Hore wrote:
> In E830 adapters, PHY timestamp for Tx packets should be read once the 
> ready status of PHY timestamp registers is 1.
> 
> Fixes: 881169950d80 ("net/ice/base: implement initial PTP support for 
> E830")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
> ---
>  drivers/net/ice/base/ice_ptp_hw.c | 68 
> ++++++++++++++++++++-----------
>  1 file changed, 44 insertions(+), 24 deletions(-)
> 
Since this is a patch to the base code for "ice", should it be, or can it be, included in the patchset for the base code update for this release [1].

[1] https://patches.dpdk.org/project/dpdk/list/?series=32832

Re: [PATCH v1] net/ice: fix incorrect reading of PHY timestamp

[Patrick Robb]

Recheck-request: iol-marvell-Functional

On Fri, Aug 23, 2024 at 7:56 AM Soumyadeep Hore
<soumyadeep.hore@intel.com> wrote:
>
> In E830 adapters, PHY timestamp for Tx packets should be read once
> the ready status of PHY timestamp registers is 1.
>
> Fixes: 881169950d80 ("net/ice/base: implement initial PTP support for E830")
> Cc: stable@dpdk.org
>
> Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
> ---
>  drivers/net/ice/base/ice_ptp_hw.c | 68 ++++++++++++++++++++-----------
>  1 file changed, 44 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
> index 004f659eae..41367105b2 100644
> --- a/drivers/net/ice/base/ice_ptp_hw.c
> +++ b/drivers/net/ice/base/ice_ptp_hw.c
> @@ -5526,6 +5526,27 @@ ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
>                                            lock_sbq);
>  }
>
> +/**
> + * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register
> + * @hw: pointer to the HW struct
> + * @port: the PHY port to read
> + * @tstamp_ready: contents of the Tx memory status register
> + *
> + */
> +static int
> +ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
> +{
> +       u64 hi;
> +       u32 lo;
> +
> +       lo = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);
> +       hi = (u64)rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H) << 32;
> +
> +       *tstamp_ready = hi | lo;
> +
> +       return 0;
> +}
> +
>  /**
>   * ice_read_phy_tstamp_e830 - Read a PHY timestamp out of the external PHY
>   * @hw: pointer to the HW struct
> @@ -5539,10 +5560,30 @@ ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
>  static int
>  ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
>  {
> -       u32 hi_addr = E830_HIGH_TX_MEMORY_BANK(idx, lport);
> -       u32 lo_addr = E830_LOW_TX_MEMORY_BANK(idx, lport);
> +       u32 hi_addr, lo_addr;
>         u32 lo_val, hi_val, lo;
> -       u8 hi;
> +       u8 hi, ret;
> +       u64 start_time, curr_time;
> +       u64 tstamp_ready = 0;
> +
> +       start_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
> +
> +       /* To check the ready status of HY Timestamp register for fetching timestamp */
> +       while (!(tstamp_ready & BIT_ULL(0))) {
> +               ret = ice_get_phy_tx_tstamp_ready_e830(hw, lport, &tstamp_ready);
> +               if (ret) {
> +                       PMD_DRV_LOG(ERR, "Failed to get phy ready for timestamp");
> +                       return -1;
> +               }
> +               curr_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
> +               if (curr_time - start_time > 1000) {
> +                       PMD_DRV_LOG(ERR, "Timeout to get phy ready for timestamp");
> +                       return -1;
> +               }
> +       }
> +
> +       hi_addr = E830_HIGH_TX_MEMORY_BANK(idx, lport);
> +       lo_addr = E830_LOW_TX_MEMORY_BANK(idx, lport);
>
>         lo_val = rd32(hw, lo_addr);
>         hi_val = rd32(hw, hi_addr);
> @@ -5558,27 +5599,6 @@ ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
>         return 0;
>  }
>
> -/**
> - * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register
> - * @hw: pointer to the HW struct
> - * @port: the PHY port to read
> - * @tstamp_ready: contents of the Tx memory status register
> - *
> - */
> -static int
> -ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
> -{
> -       u64 hi;
> -       u32 lo;
> -
> -       lo = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);
> -       hi = (u64)rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H) << 32;
> -
> -       *tstamp_ready = hi | lo;
> -
> -       return 0;
> -}
> -
>  /* Device agnostic functions
>   *
>   * The following functions implement shared behavior common to both E822/E823
> --
> 2.43.0
>

Re: [PATCH v1] net/ice: fix incorrect reading of PHY timestamp

[Bruce Richardson]

On Fri, Aug 23, 2024 at 11:01:33AM +0000, Soumyadeep Hore wrote:
> In E830 adapters, PHY timestamp for Tx packets should be read once
> the ready status of PHY timestamp registers is 1.
> 
> Fixes: 881169950d80 ("net/ice/base: implement initial PTP support for E830")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
> ---
>  drivers/net/ice/base/ice_ptp_hw.c | 68 ++++++++++++++++++++-----------
>  1 file changed, 44 insertions(+), 24 deletions(-)
> 
Since this is a patch to the base code for "ice", should it be, or can it
be, included in the patchset for the base code update for this release [1].

[1] https://patches.dpdk.org/project/dpdk/list/?series=32832

[PATCH v1] net/ice: fix incorrect reading of PHY timestamp

[Soumyadeep Hore]

In E830 adapters, PHY timestamp for Tx packets should be read once
the ready status of PHY timestamp registers is 1.

Fixes: 881169950d80 ("net/ice/base: implement initial PTP support for E830")
Cc: stable@dpdk.org

Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/net/ice/base/ice_ptp_hw.c | 68 ++++++++++++++++++++-----------
 1 file changed, 44 insertions(+), 24 deletions(-)

diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 004f659eae..41367105b2 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -5526,6 +5526,27 @@ ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
 					   lock_sbq);
 }
 
+/**
+ * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register
+ * @hw: pointer to the HW struct
+ * @port: the PHY port to read
+ * @tstamp_ready: contents of the Tx memory status register
+ *
+ */
+static int
+ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
+{
+	u64 hi;
+	u32 lo;
+
+	lo = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);
+	hi = (u64)rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H) << 32;
+
+	*tstamp_ready = hi | lo;
+
+	return 0;
+}
+
 /**
  * ice_read_phy_tstamp_e830 - Read a PHY timestamp out of the external PHY
  * @hw: pointer to the HW struct
@@ -5539,10 +5560,30 @@ ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
 static int
 ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
 {
-	u32 hi_addr = E830_HIGH_TX_MEMORY_BANK(idx, lport);
-	u32 lo_addr = E830_LOW_TX_MEMORY_BANK(idx, lport);
+	u32 hi_addr, lo_addr;
 	u32 lo_val, hi_val, lo;
-	u8 hi;
+	u8 hi, ret;
+	u64 start_time, curr_time;
+	u64 tstamp_ready = 0;
+
+	start_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
+
+	/* To check the ready status of HY Timestamp register for fetching timestamp */
+	while (!(tstamp_ready & BIT_ULL(0))) {
+		ret = ice_get_phy_tx_tstamp_ready_e830(hw, lport, &tstamp_ready);
+		if (ret) {
+			PMD_DRV_LOG(ERR, "Failed to get phy ready for timestamp");
+			return -1;
+		}
+		curr_time = rte_get_timer_cycles() / (rte_get_timer_hz() / 1000);
+		if (curr_time - start_time > 1000) {
+			PMD_DRV_LOG(ERR, "Timeout to get phy ready for timestamp");
+			return -1;
+		}
+	}
+
+	hi_addr = E830_HIGH_TX_MEMORY_BANK(idx, lport);
+	lo_addr = E830_LOW_TX_MEMORY_BANK(idx, lport);
 
 	lo_val = rd32(hw, lo_addr);
 	hi_val = rd32(hw, hi_addr);
@@ -5558,27 +5599,6 @@ ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
 	return 0;
 }
 
-/**
- * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register
- * @hw: pointer to the HW struct
- * @port: the PHY port to read
- * @tstamp_ready: contents of the Tx memory status register
- *
- */
-static int
-ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
-{
-	u64 hi;
-	u32 lo;
-
-	lo = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);
-	hi = (u64)rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H) << 32;
-
-	*tstamp_ready = hi | lo;
-
-	return 0;
-}
-
 /* Device agnostic functions
  *
  * The following functions implement shared behavior common to both E822/E823
-- 
2.43.0