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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2024 12:39:54.2231 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9d9abff7-ddbd-4986-15fb-08dcf6847553 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7580 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Flow items translations for the root tables reuses DV code. DV GRE item translation did not initiate item mask for HWS template. Fixes: cd4ab742064a ("net/mlx5: split flow item matcher and value translation") Cc: stable@dpdk.org Signed-off-by: Gregory Etelson Acked-by: Suanming Mou --- drivers/net/mlx5/mlx5_flow_dv.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 201e215e4b..7c3a1d537a 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -9829,22 +9829,23 @@ flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item, } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v; uint16_t protocol_m, protocol_v; - if (key_type & MLX5_SET_MATCHER_M) + if (key_type & MLX5_SET_MATCHER_M) { MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xff); - else + if (!gre_m) + gre_m = &rte_flow_item_gre_mask; + gre_v = gre_m; + } else { MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE); - if (!gre_v) { - gre_v = &empty_gre; - gre_m = &empty_gre; - } else { - if (!gre_m) + if (!gre_v) { + gre_v = &empty_gre; + gre_m = &empty_gre; + } else if (!gre_m) { gre_m = &rte_flow_item_gre_mask; + } + if (key_type == MLX5_SET_MATCHER_HS_V) + gre_m = gre_v; } - if (key_type & MLX5_SET_MATCHER_M) - gre_v = gre_m; - else if (key_type == MLX5_SET_MATCHER_HS_V) - gre_m = gre_v; gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver); gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver); MLX5_SET(fte_match_set_misc, misc_v, gre_c_present, -- 2.43.0