[PATCH 01/13] net/txgbe: fix swfw mbox failure

[PATCH 01/13] net/txgbe: fix swfw mbox failure

[Jiawen Wu]

There is a unknown bug that the register TXGBE_MNGMBX cannot be written
in the loop, when DPDK is built with GCC high version. Access any register
before write TXGBE_MNGMBX can fix it.

Bugzilla ID: 1531
Fixes: 35c90ecccfd4 ("net/txgbe: add EEPROM functions")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_mng.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c
index 20db982891..7dc8f21183 100644
--- a/drivers/net/txgbe/base/txgbe_mng.c
+++ b/drivers/net/txgbe/base/txgbe_mng.c
@@ -58,6 +58,7 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout)
 
 	dword_len = length >> 2;
 
+	txgbe_flush(hw);
 	/* The device driver writes the relevant command block
 	 * into the ram area.
 	 */
-- 
2.27.0

[PATCH 02/13] net/txgbe: fix VF-PF mbox interrupt

[Jiawen Wu]

There was a incorrect bit to define TXGBE_ICRMISC_VFMBX that prevents the
interrupt from being handled correctly.

Fixes: a6712cd029a4 ("net/txgbe: add PF module init and uninit for SRIOV")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h
index 4ea4a2e3d8..b46d65331e 100644
--- a/drivers/net/txgbe/base/txgbe_regs.h
+++ b/drivers/net/txgbe/base/txgbe_regs.h
@@ -1197,7 +1197,7 @@ enum txgbe_5tuple_protocol {
 #define   TXGBE_ICRMISC_ANDONE MS(19, 0x1) /* link auto-nego done */
 #define   TXGBE_ICRMISC_ERRIG  MS(20, 0x1) /* integrity error */
 #define   TXGBE_ICRMISC_SPI    MS(21, 0x1) /* SPI interface */
-#define   TXGBE_ICRMISC_VFMBX  MS(22, 0x1) /* VF-PF message box */
+#define   TXGBE_ICRMISC_VFMBX  MS(23, 0x1) /* VF-PF message box */
 #define   TXGBE_ICRMISC_GPIO   MS(26, 0x1) /* GPIO interrupt */
 #define   TXGBE_ICRMISC_ERRPCI MS(27, 0x1) /* pcie request error */
 #define   TXGBE_ICRMISC_HEAT   MS(28, 0x1) /* overheat detection */
-- 
2.27.0

[PATCH 03/13] net/txgbe: remove outer UDP checksum capability

[Jiawen Wu]

The hardware does not support outer UDP checksum for tunnel packets.
It's wrong to claim this Tx offload capability, so fix it.

Bugzilla ID: 1529
Fixes: b950203be7f1 ("net/txgbe: support VXLAN-GPE")
Fixes: 295968d17407 ("ethdev: add namespace")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/txgbe_rxtx.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 5bc0f8772f..c12726553c 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -2284,8 +2284,7 @@ txgbe_get_tx_port_offloads(struct rte_eth_dev *dev)
 
 	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_MACSEC_INSERT;
 
-	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-			   RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM;
+	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM;
 
 #ifdef RTE_LIB_SECURITY
 	if (dev->security_ctx)
-- 
2.27.0

[PATCH 04/13] net/txgbe: fix driver load bit to inform firmware

[Jiawen Wu]

Drv_load bit will be reset to default 0 after hardware LAN reset,
reconfigure it to inform firmware that driver is loaded. And set it to 0
when device is closed.

Fixes: b1f596677d8e ("net/txgbe: support device start")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/txgbe_ethdev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 2834468764..4aa3bfd0bc 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -331,6 +331,8 @@ txgbe_pf_reset_hw(struct txgbe_hw *hw)
 	status = hw->mac.reset_hw(hw);
 
 	ctrl_ext = rd32(hw, TXGBE_PORTCTL);
+	/* let hardware know driver is loaded */
+	ctrl_ext |= TXGBE_PORTCTL_DRVLOAD;
 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
 	ctrl_ext |= TXGBE_PORTCTL_RSTDONE;
 	wr32(hw, TXGBE_PORTCTL, ctrl_ext);
@@ -2061,6 +2063,9 @@ txgbe_dev_close(struct rte_eth_dev *dev)
 
 	ret = txgbe_dev_stop(dev);
 
+	/* Let firmware take over control of hardware */
+	wr32m(hw, TXGBE_PORTCTL, TXGBE_PORTCTL_DRVLOAD, 0);
+
 	txgbe_dev_free_queues(dev);
 
 	txgbe_set_pcie_master(hw, false);
-- 
2.27.0

[PATCH 10/13] net/ngbe: fix driver load bit to inform firmware

[Jiawen Wu]

Drv_load bit will be reset to default 0 after hardware LAN reset,
reconfigure it to inform firmware that driver is loaded. And set it to 0
when device is closed.

Fixes: 3518df5774c7 ("net/ngbe: support device start/stop")
Fixes: cc63194e89cb ("net/ngbe: support close and reset device")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index d9d2daf656..ba46dcf2a5 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -263,6 +263,8 @@ ngbe_pf_reset_hw(struct ngbe_hw *hw)
 	status = hw->mac.reset_hw(hw);
 
 	ctrl_ext = rd32(hw, NGBE_PORTCTL);
+	/* let hardware know driver is loaded */
+	ctrl_ext |= NGBE_PORTCTL_DRVLOAD;
 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
 	ctrl_ext |= NGBE_PORTCTL_RSTDONE;
 	wr32(hw, NGBE_PORTCTL, ctrl_ext);
@@ -1277,6 +1279,9 @@ ngbe_dev_close(struct rte_eth_dev *dev)
 
 	ngbe_dev_stop(dev);
 
+	/* Let firmware take over control of hardware */
+	wr32m(hw, NGBE_PORTCTL, NGBE_PORTCTL_DRVLOAD, 0);
+
 	ngbe_dev_free_queues(dev);
 
 	ngbe_set_pcie_master(hw, false);
-- 
2.27.0

[PATCH 11/13] net/ngbe: reconfigure more MAC Rx registers

[Jiawen Wu]

When link status changes, there is a probability that no more packets
can be received on the port, due to hardware defects. These MAC Rx
registers should be reconfigured to fix this problem.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Fixes: a7c5f95ed9c2 ("net/ngbe: reconfigure MAC Rx when link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/base/ngbe_regs.h | 2 ++
 drivers/net/ngbe/ngbe_ethdev.c    | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/ngbe/base/ngbe_regs.h b/drivers/net/ngbe/base/ngbe_regs.h
index 8a6776b0e6..b1295280a7 100644
--- a/drivers/net/ngbe/base/ngbe_regs.h
+++ b/drivers/net/ngbe/base/ngbe_regs.h
@@ -712,6 +712,8 @@ enum ngbe_5tuple_protocol {
 #define   NGBE_MACRXFLT_CTL_PASS       LS(3, 6, 0x3)
 #define   NGBE_MACRXFLT_RXALL          MS(31, 0x1)
 
+#define NGBE_MAC_WDG_TIMEOUT           0x01100C
+
 /******************************************************************************
  * Statistic Registers
  ******************************************************************************/
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index ba46dcf2a5..3ea7ed43ff 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -1934,6 +1934,7 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 	bool link_up;
 	int err;
 	int wait = 1;
+	u32 reg;
 
 	memset(&link, 0, sizeof(link));
 	link.link_status = RTE_ETH_LINK_DOWN;
@@ -1991,8 +1992,13 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 			wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_SPEED_MASK,
 				NGBE_MACTXCFG_SPEED_1G | NGBE_MACTXCFG_TE);
 		}
+		/* Re configure MAC RX */
+		reg = rd32(hw, NGBE_MACRXCFG);
+		wr32(hw, NGBE_MACRXCFG, reg);
 		wr32m(hw, NGBE_MACRXFLT, NGBE_MACRXFLT_PROMISC,
 			NGBE_MACRXFLT_PROMISC);
+		reg = rd32(hw, NGBE_MAC_WDG_TIMEOUT);
+		wr32(hw, NGBE_MAC_WDG_TIMEOUT, reg);
 	}
 
 	return rte_eth_linkstatus_set(dev, &link);
-- 
2.27.0

[PATCH 12/13] net/ngbe: fix interrupt lost in legacy or MSI mode

[Jiawen Wu]

When interrupt is legacy or MSI mode, shared interrupt may cause the
interrupt cannot be re-enabled. So fix to read the shared interrupt.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 3ea7ed43ff..e7dc1c0f94 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -2186,6 +2186,19 @@ ngbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
 	struct ngbe_hw *hw = ngbe_dev_hw(dev);
 	struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
 
+	eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_VEC0];
+	if (!eicr) {
+		/*
+		 * shared interrupt alert!
+		 * make sure interrupts are enabled because the read will
+		 * have disabled interrupts.
+		 */
+		if (!hw->adapter_stopped)
+			ngbe_enable_intr(dev);
+		return 0;
+	}
+	((u32 *)hw->isb_mem)[NGBE_ISB_VEC0] = 0;
+
 	/* read-on-clear nic registers here */
 	eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_MISC];
 	PMD_DRV_LOG(DEBUG, "eicr %x", eicr);
-- 
2.27.0

[PATCH 13/13] net/ngbe: restrict configuration of VLAN strip offload

[Jiawen Wu]

There is a hardware limitation that Rx ring config register is not
writable when Rx ring is enabled, i.e. the NGBE_RXCFG_ENA bit is set.
But disabling the ring when there is traffic will cause ring get stuck.
So restrict the configuration of VLAN strip offload only if device is
started.

Fixes: 59b46438fdaa ("net/ngbe: support VLAN offload and VLAN filter")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 49 ++++++++++++++--------------------
 1 file changed, 20 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index e7dc1c0f94..eef31af233 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -586,41 +586,25 @@ ngbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 }
 
 static void
-ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+ngbe_vlan_strip_q_set(struct rte_eth_dev *dev, uint16_t queue, int on)
 {
-	struct ngbe_hw *hw = ngbe_dev_hw(dev);
-	struct ngbe_rx_queue *rxq;
-	bool restart;
-	uint32_t rxcfg, rxbal, rxbah;
-
 	if (on)
 		ngbe_vlan_hw_strip_enable(dev, queue);
 	else
 		ngbe_vlan_hw_strip_disable(dev, queue);
+}
 
-	rxq = dev->data->rx_queues[queue];
-	rxbal = rd32(hw, NGBE_RXBAL(rxq->reg_idx));
-	rxbah = rd32(hw, NGBE_RXBAH(rxq->reg_idx));
-	rxcfg = rd32(hw, NGBE_RXCFG(rxq->reg_idx));
-	if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
-		restart = (rxcfg & NGBE_RXCFG_ENA) &&
-			!(rxcfg & NGBE_RXCFG_VLAN);
-		rxcfg |= NGBE_RXCFG_VLAN;
-	} else {
-		restart = (rxcfg & NGBE_RXCFG_ENA) &&
-			(rxcfg & NGBE_RXCFG_VLAN);
-		rxcfg &= ~NGBE_RXCFG_VLAN;
-	}
-	rxcfg &= ~NGBE_RXCFG_ENA;
+static void
+ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+{
+	struct ngbe_hw *hw = ngbe_dev_hw(dev);
 
-	if (restart) {
-		/* set vlan strip for ring */
-		ngbe_dev_rx_queue_stop(dev, queue);
-		wr32(hw, NGBE_RXBAL(rxq->reg_idx), rxbal);
-		wr32(hw, NGBE_RXBAH(rxq->reg_idx), rxbah);
-		wr32(hw, NGBE_RXCFG(rxq->reg_idx), rxcfg);
-		ngbe_dev_rx_queue_start(dev, queue);
+	if (!hw->adapter_stopped) {
+		PMD_DRV_LOG(ERR, "Please stop port first");
+		return;
 	}
+
+	ngbe_vlan_strip_q_set(dev, queue, on);
 }
 
 static int
@@ -846,9 +830,9 @@ ngbe_vlan_hw_strip_config(struct rte_eth_dev *dev)
 		rxq = dev->data->rx_queues[i];
 
 		if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
-			ngbe_vlan_hw_strip_enable(dev, i);
+			ngbe_vlan_strip_q_set(dev, i, 1);
 		else
-			ngbe_vlan_hw_strip_disable(dev, i);
+			ngbe_vlan_strip_q_set(dev, i, 0);
 	}
 }
 
@@ -910,6 +894,13 @@ ngbe_vlan_offload_config(struct rte_eth_dev *dev, int mask)
 static int
 ngbe_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 {
+	struct ngbe_hw *hw = ngbe_dev_hw(dev);
+
+	if (!hw->adapter_stopped && (mask & RTE_ETH_VLAN_STRIP_MASK)) {
+		PMD_DRV_LOG(ERR, "Please stop port first");
+		return -EPERM;
+	}
+
 	ngbe_config_vlan_strip_on_all_queues(dev, mask);
 
 	ngbe_vlan_offload_config(dev, mask);
-- 
2.27.0

[PATCH v2 01/13] net/txgbe: fix swfw mbox failure

[Jiawen Wu]

There is a unknown bug that the register TXGBE_MNGMBX cannot be written
in the loop, when DPDK is built with GCC high version. Access any register
before write TXGBE_MNGMBX can fix it.

Bugzilla ID: 1531
Fixes: 35c90ecccfd4 ("net/txgbe: add EEPROM functions")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_mng.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c
index 20db982891..7dc8f21183 100644
--- a/drivers/net/txgbe/base/txgbe_mng.c
+++ b/drivers/net/txgbe/base/txgbe_mng.c
@@ -58,6 +58,7 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout)
 
 	dword_len = length >> 2;
 
+	txgbe_flush(hw);
 	/* The device driver writes the relevant command block
 	 * into the ram area.
 	 */
-- 
2.27.0

[PATCH v2 02/13] net/txgbe: fix VF-PF mbox interrupt

[Jiawen Wu]

There was a incorrect bit to define TXGBE_ICRMISC_VFMBX that prevents the
interrupt from being handled correctly.

Fixes: a6712cd029a4 ("net/txgbe: add PF module init and uninit for SRIOV")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h
index 4ea4a2e3d8..b46d65331e 100644
--- a/drivers/net/txgbe/base/txgbe_regs.h
+++ b/drivers/net/txgbe/base/txgbe_regs.h
@@ -1197,7 +1197,7 @@ enum txgbe_5tuple_protocol {
 #define   TXGBE_ICRMISC_ANDONE MS(19, 0x1) /* link auto-nego done */
 #define   TXGBE_ICRMISC_ERRIG  MS(20, 0x1) /* integrity error */
 #define   TXGBE_ICRMISC_SPI    MS(21, 0x1) /* SPI interface */
-#define   TXGBE_ICRMISC_VFMBX  MS(22, 0x1) /* VF-PF message box */
+#define   TXGBE_ICRMISC_VFMBX  MS(23, 0x1) /* VF-PF message box */
 #define   TXGBE_ICRMISC_GPIO   MS(26, 0x1) /* GPIO interrupt */
 #define   TXGBE_ICRMISC_ERRPCI MS(27, 0x1) /* pcie request error */
 #define   TXGBE_ICRMISC_HEAT   MS(28, 0x1) /* overheat detection */
-- 
2.27.0

[PATCH v2 03/13] net/txgbe: remove outer UDP checksum capability

[Jiawen Wu]

The hardware does not support outer UDP checksum for tunnel packets.
It's wrong to claim this Tx offload capability, so fix it.

Bugzilla ID: 1529
Fixes: b950203be7f1 ("net/txgbe: support VXLAN-GPE")
Fixes: 295968d17407 ("ethdev: add namespace")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/txgbe_rxtx.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 5bc0f8772f..c12726553c 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -2284,8 +2284,7 @@ txgbe_get_tx_port_offloads(struct rte_eth_dev *dev)
 
 	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_MACSEC_INSERT;
 
-	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-			   RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM;
+	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM;
 
 #ifdef RTE_LIB_SECURITY
 	if (dev->security_ctx)
-- 
2.27.0

[PATCH v2 04/13] net/txgbe: fix driver load bit to inform firmware

[Jiawen Wu]

Drv_load bit will be reset to default 0 after hardware LAN reset,
reconfigure it to inform firmware that driver is loaded. And set it to 0
when device is closed.

Fixes: b1f596677d8e ("net/txgbe: support device start")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/txgbe_ethdev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 2834468764..4aa3bfd0bc 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -331,6 +331,8 @@ txgbe_pf_reset_hw(struct txgbe_hw *hw)
 	status = hw->mac.reset_hw(hw);
 
 	ctrl_ext = rd32(hw, TXGBE_PORTCTL);
+	/* let hardware know driver is loaded */
+	ctrl_ext |= TXGBE_PORTCTL_DRVLOAD;
 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
 	ctrl_ext |= TXGBE_PORTCTL_RSTDONE;
 	wr32(hw, TXGBE_PORTCTL, ctrl_ext);
@@ -2061,6 +2063,9 @@ txgbe_dev_close(struct rte_eth_dev *dev)
 
 	ret = txgbe_dev_stop(dev);
 
+	/* Let firmware take over control of hardware */
+	wr32m(hw, TXGBE_PORTCTL, TXGBE_PORTCTL_DRVLOAD, 0);
+
 	txgbe_dev_free_queues(dev);
 
 	txgbe_set_pcie_master(hw, false);
-- 
2.27.0

[PATCH v2 10/13] net/ngbe: fix driver load bit to inform firmware

[Jiawen Wu]

Drv_load bit will be reset to default 0 after hardware LAN reset,
reconfigure it to inform firmware that driver is loaded. And set it to 0
when device is closed.

Fixes: 3518df5774c7 ("net/ngbe: support device start/stop")
Fixes: cc63194e89cb ("net/ngbe: support close and reset device")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index d9d2daf656..ba46dcf2a5 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -263,6 +263,8 @@ ngbe_pf_reset_hw(struct ngbe_hw *hw)
 	status = hw->mac.reset_hw(hw);
 
 	ctrl_ext = rd32(hw, NGBE_PORTCTL);
+	/* let hardware know driver is loaded */
+	ctrl_ext |= NGBE_PORTCTL_DRVLOAD;
 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
 	ctrl_ext |= NGBE_PORTCTL_RSTDONE;
 	wr32(hw, NGBE_PORTCTL, ctrl_ext);
@@ -1277,6 +1279,9 @@ ngbe_dev_close(struct rte_eth_dev *dev)
 
 	ngbe_dev_stop(dev);
 
+	/* Let firmware take over control of hardware */
+	wr32m(hw, NGBE_PORTCTL, NGBE_PORTCTL_DRVLOAD, 0);
+
 	ngbe_dev_free_queues(dev);
 
 	ngbe_set_pcie_master(hw, false);
-- 
2.27.0

[PATCH v2 11/13] net/ngbe: reconfigure more MAC Rx registers

[Jiawen Wu]

When link status changes, there is a probability that no more packets
can be received on the port, due to hardware defects. These MAC Rx
registers should be reconfigured to fix this problem.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Fixes: a7c5f95ed9c2 ("net/ngbe: reconfigure MAC Rx when link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/base/ngbe_regs.h | 2 ++
 drivers/net/ngbe/ngbe_ethdev.c    | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/ngbe/base/ngbe_regs.h b/drivers/net/ngbe/base/ngbe_regs.h
index 8a6776b0e6..b1295280a7 100644
--- a/drivers/net/ngbe/base/ngbe_regs.h
+++ b/drivers/net/ngbe/base/ngbe_regs.h
@@ -712,6 +712,8 @@ enum ngbe_5tuple_protocol {
 #define   NGBE_MACRXFLT_CTL_PASS       LS(3, 6, 0x3)
 #define   NGBE_MACRXFLT_RXALL          MS(31, 0x1)
 
+#define NGBE_MAC_WDG_TIMEOUT           0x01100C
+
 /******************************************************************************
  * Statistic Registers
  ******************************************************************************/
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index ba46dcf2a5..3ea7ed43ff 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -1934,6 +1934,7 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 	bool link_up;
 	int err;
 	int wait = 1;
+	u32 reg;
 
 	memset(&link, 0, sizeof(link));
 	link.link_status = RTE_ETH_LINK_DOWN;
@@ -1991,8 +1992,13 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 			wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_SPEED_MASK,
 				NGBE_MACTXCFG_SPEED_1G | NGBE_MACTXCFG_TE);
 		}
+		/* Re configure MAC RX */
+		reg = rd32(hw, NGBE_MACRXCFG);
+		wr32(hw, NGBE_MACRXCFG, reg);
 		wr32m(hw, NGBE_MACRXFLT, NGBE_MACRXFLT_PROMISC,
 			NGBE_MACRXFLT_PROMISC);
+		reg = rd32(hw, NGBE_MAC_WDG_TIMEOUT);
+		wr32(hw, NGBE_MAC_WDG_TIMEOUT, reg);
 	}
 
 	return rte_eth_linkstatus_set(dev, &link);
-- 
2.27.0

[PATCH v2 12/13] net/ngbe: fix interrupt lost in legacy or MSI mode

[Jiawen Wu]

When interrupt is legacy or MSI mode, shared interrupt may cause the
interrupt cannot be re-enabled. So fix to read the shared interrupt.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 3ea7ed43ff..e7dc1c0f94 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -2186,6 +2186,19 @@ ngbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
 	struct ngbe_hw *hw = ngbe_dev_hw(dev);
 	struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
 
+	eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_VEC0];
+	if (!eicr) {
+		/*
+		 * shared interrupt alert!
+		 * make sure interrupts are enabled because the read will
+		 * have disabled interrupts.
+		 */
+		if (!hw->adapter_stopped)
+			ngbe_enable_intr(dev);
+		return 0;
+	}
+	((u32 *)hw->isb_mem)[NGBE_ISB_VEC0] = 0;
+
 	/* read-on-clear nic registers here */
 	eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_MISC];
 	PMD_DRV_LOG(DEBUG, "eicr %x", eicr);
-- 
2.27.0

[PATCH v2 13/13] net/ngbe: restrict configuration of VLAN strip offload

[Jiawen Wu]

There is a hardware limitation that Rx ring config register is not
writable when Rx ring is enabled, i.e. the NGBE_RXCFG_ENA bit is set.
But disabling the ring when there is traffic will cause ring get stuck.
So restrict the configuration of VLAN strip offload only if device is
started.

Fixes: 59b46438fdaa ("net/ngbe: support VLAN offload and VLAN filter")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 49 ++++++++++++++--------------------
 1 file changed, 20 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index e7dc1c0f94..eef31af233 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -586,41 +586,25 @@ ngbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 }
 
 static void
-ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+ngbe_vlan_strip_q_set(struct rte_eth_dev *dev, uint16_t queue, int on)
 {
-	struct ngbe_hw *hw = ngbe_dev_hw(dev);
-	struct ngbe_rx_queue *rxq;
-	bool restart;
-	uint32_t rxcfg, rxbal, rxbah;
-
 	if (on)
 		ngbe_vlan_hw_strip_enable(dev, queue);
 	else
 		ngbe_vlan_hw_strip_disable(dev, queue);
+}
 
-	rxq = dev->data->rx_queues[queue];
-	rxbal = rd32(hw, NGBE_RXBAL(rxq->reg_idx));
-	rxbah = rd32(hw, NGBE_RXBAH(rxq->reg_idx));
-	rxcfg = rd32(hw, NGBE_RXCFG(rxq->reg_idx));
-	if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
-		restart = (rxcfg & NGBE_RXCFG_ENA) &&
-			!(rxcfg & NGBE_RXCFG_VLAN);
-		rxcfg |= NGBE_RXCFG_VLAN;
-	} else {
-		restart = (rxcfg & NGBE_RXCFG_ENA) &&
-			(rxcfg & NGBE_RXCFG_VLAN);
-		rxcfg &= ~NGBE_RXCFG_VLAN;
-	}
-	rxcfg &= ~NGBE_RXCFG_ENA;
+static void
+ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+{
+	struct ngbe_hw *hw = ngbe_dev_hw(dev);
 
-	if (restart) {
-		/* set vlan strip for ring */
-		ngbe_dev_rx_queue_stop(dev, queue);
-		wr32(hw, NGBE_RXBAL(rxq->reg_idx), rxbal);
-		wr32(hw, NGBE_RXBAH(rxq->reg_idx), rxbah);
-		wr32(hw, NGBE_RXCFG(rxq->reg_idx), rxcfg);
-		ngbe_dev_rx_queue_start(dev, queue);
+	if (!hw->adapter_stopped) {
+		PMD_DRV_LOG(ERR, "Please stop port first");
+		return;
 	}
+
+	ngbe_vlan_strip_q_set(dev, queue, on);
 }
 
 static int
@@ -846,9 +830,9 @@ ngbe_vlan_hw_strip_config(struct rte_eth_dev *dev)
 		rxq = dev->data->rx_queues[i];
 
 		if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
-			ngbe_vlan_hw_strip_enable(dev, i);
+			ngbe_vlan_strip_q_set(dev, i, 1);
 		else
-			ngbe_vlan_hw_strip_disable(dev, i);
+			ngbe_vlan_strip_q_set(dev, i, 0);
 	}
 }
 
@@ -910,6 +894,13 @@ ngbe_vlan_offload_config(struct rte_eth_dev *dev, int mask)
 static int
 ngbe_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 {
+	struct ngbe_hw *hw = ngbe_dev_hw(dev);
+
+	if (!hw->adapter_stopped && (mask & RTE_ETH_VLAN_STRIP_MASK)) {
+		PMD_DRV_LOG(ERR, "Please stop port first");
+		return -EPERM;
+	}
+
 	ngbe_config_vlan_strip_on_all_queues(dev, mask);
 
 	ngbe_vlan_offload_config(dev, mask);
-- 
2.27.0

[PATCH v3 01/13] net/txgbe: fix swfw mbox failure

[Jiawen Wu]

There is a unknown bug that the register TXGBE_MNGMBX cannot be written
in the loop, when DPDK is built with GCC high version. Access any register
before write TXGBE_MNGMBX can fix it.

Bugzilla ID: 1531
Fixes: 35c90ecccfd4 ("net/txgbe: add EEPROM functions")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_mng.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c
index 20db982891..7dc8f21183 100644
--- a/drivers/net/txgbe/base/txgbe_mng.c
+++ b/drivers/net/txgbe/base/txgbe_mng.c
@@ -58,6 +58,7 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout)
 
 	dword_len = length >> 2;
 
+	txgbe_flush(hw);
 	/* The device driver writes the relevant command block
 	 * into the ram area.
 	 */
-- 
2.27.0

[PATCH v3 02/13] net/txgbe: fix VF-PF mbox interrupt

[Jiawen Wu]

There was a incorrect bit to define TXGBE_ICRMISC_VFMBX that prevents the
interrupt from being handled correctly.

Fixes: a6712cd029a4 ("net/txgbe: add PF module init and uninit for SRIOV")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h
index 4ea4a2e3d8..b46d65331e 100644
--- a/drivers/net/txgbe/base/txgbe_regs.h
+++ b/drivers/net/txgbe/base/txgbe_regs.h
@@ -1197,7 +1197,7 @@ enum txgbe_5tuple_protocol {
 #define   TXGBE_ICRMISC_ANDONE MS(19, 0x1) /* link auto-nego done */
 #define   TXGBE_ICRMISC_ERRIG  MS(20, 0x1) /* integrity error */
 #define   TXGBE_ICRMISC_SPI    MS(21, 0x1) /* SPI interface */
-#define   TXGBE_ICRMISC_VFMBX  MS(22, 0x1) /* VF-PF message box */
+#define   TXGBE_ICRMISC_VFMBX  MS(23, 0x1) /* VF-PF message box */
 #define   TXGBE_ICRMISC_GPIO   MS(26, 0x1) /* GPIO interrupt */
 #define   TXGBE_ICRMISC_ERRPCI MS(27, 0x1) /* pcie request error */
 #define   TXGBE_ICRMISC_HEAT   MS(28, 0x1) /* overheat detection */
-- 
2.27.0

[PATCH v3 03/13] net/txgbe: remove outer UDP checksum capability

[Jiawen Wu]

The hardware does not support outer UDP checksum for tunnel packets.
It's wrong to claim this Tx offload capability, so fix it.

Bugzilla ID: 1529
Fixes: b950203be7f1 ("net/txgbe: support VXLAN-GPE")
Fixes: 295968d17407 ("ethdev: add namespace")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/txgbe_rxtx.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 5bc0f8772f..c12726553c 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -2284,8 +2284,7 @@ txgbe_get_tx_port_offloads(struct rte_eth_dev *dev)
 
 	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_MACSEC_INSERT;
 
-	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-			   RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM;
+	tx_offload_capa |= RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM;
 
 #ifdef RTE_LIB_SECURITY
 	if (dev->security_ctx)
-- 
2.27.0

[PATCH v3 04/13] net/txgbe: fix driver load bit to inform firmware

[Jiawen Wu]

Drv_load bit will be reset to default 0 after hardware LAN reset,
reconfigure it to inform firmware that driver is loaded. And set it to 0
when device is closed.

Fixes: b1f596677d8e ("net/txgbe: support device start")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/txgbe/txgbe_ethdev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 2834468764..4aa3bfd0bc 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -331,6 +331,8 @@ txgbe_pf_reset_hw(struct txgbe_hw *hw)
 	status = hw->mac.reset_hw(hw);
 
 	ctrl_ext = rd32(hw, TXGBE_PORTCTL);
+	/* let hardware know driver is loaded */
+	ctrl_ext |= TXGBE_PORTCTL_DRVLOAD;
 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
 	ctrl_ext |= TXGBE_PORTCTL_RSTDONE;
 	wr32(hw, TXGBE_PORTCTL, ctrl_ext);
@@ -2061,6 +2063,9 @@ txgbe_dev_close(struct rte_eth_dev *dev)
 
 	ret = txgbe_dev_stop(dev);
 
+	/* Let firmware take over control of hardware */
+	wr32m(hw, TXGBE_PORTCTL, TXGBE_PORTCTL_DRVLOAD, 0);
+
 	txgbe_dev_free_queues(dev);
 
 	txgbe_set_pcie_master(hw, false);
-- 
2.27.0

[PATCH v3 10/13] net/ngbe: fix driver load bit to inform firmware

[Jiawen Wu]

Drv_load bit will be reset to default 0 after hardware LAN reset,
reconfigure it to inform firmware that driver is loaded. And set it to 0
when device is closed.

Fixes: 3518df5774c7 ("net/ngbe: support device start/stop")
Fixes: cc63194e89cb ("net/ngbe: support close and reset device")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 353d17acc8..238533f2b8 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -263,6 +263,8 @@ ngbe_pf_reset_hw(struct ngbe_hw *hw)
 	status = hw->mac.reset_hw(hw);
 
 	ctrl_ext = rd32(hw, NGBE_PORTCTL);
+	/* let hardware know driver is loaded */
+	ctrl_ext |= NGBE_PORTCTL_DRVLOAD;
 	/* Set PF Reset Done bit so PF/VF Mail Ops can work */
 	ctrl_ext |= NGBE_PORTCTL_RSTDONE;
 	wr32(hw, NGBE_PORTCTL, ctrl_ext);
@@ -1277,6 +1279,9 @@ ngbe_dev_close(struct rte_eth_dev *dev)
 
 	ngbe_dev_stop(dev);
 
+	/* Let firmware take over control of hardware */
+	wr32m(hw, NGBE_PORTCTL, NGBE_PORTCTL_DRVLOAD, 0);
+
 	ngbe_dev_free_queues(dev);
 
 	ngbe_set_pcie_master(hw, false);
-- 
2.27.0

[PATCH v3 11/13] net/ngbe: reconfigure more MAC Rx registers

[Jiawen Wu]

When link status changes, there is a probability that no more packets
can be received on the port, due to hardware defects. These MAC Rx
registers should be reconfigured to fix this problem.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Fixes: a7c5f95ed9c2 ("net/ngbe: reconfigure MAC Rx when link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/base/ngbe_regs.h | 2 ++
 drivers/net/ngbe/ngbe_ethdev.c    | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/ngbe/base/ngbe_regs.h b/drivers/net/ngbe/base/ngbe_regs.h
index 8a6776b0e6..b1295280a7 100644
--- a/drivers/net/ngbe/base/ngbe_regs.h
+++ b/drivers/net/ngbe/base/ngbe_regs.h
@@ -712,6 +712,8 @@ enum ngbe_5tuple_protocol {
 #define   NGBE_MACRXFLT_CTL_PASS       LS(3, 6, 0x3)
 #define   NGBE_MACRXFLT_RXALL          MS(31, 0x1)
 
+#define NGBE_MAC_WDG_TIMEOUT           0x01100C
+
 /******************************************************************************
  * Statistic Registers
  ******************************************************************************/
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 238533f2b8..c372fd928c 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -1941,6 +1941,7 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 	bool link_up;
 	int err;
 	int wait = 1;
+	u32 reg;
 
 	memset(&link, 0, sizeof(link));
 	link.link_status = RTE_ETH_LINK_DOWN;
@@ -1998,8 +1999,13 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 			wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_SPEED_MASK,
 				NGBE_MACTXCFG_SPEED_1G | NGBE_MACTXCFG_TE);
 		}
+		/* Re configure MAC RX */
+		reg = rd32(hw, NGBE_MACRXCFG);
+		wr32(hw, NGBE_MACRXCFG, reg);
 		wr32m(hw, NGBE_MACRXFLT, NGBE_MACRXFLT_PROMISC,
 			NGBE_MACRXFLT_PROMISC);
+		reg = rd32(hw, NGBE_MAC_WDG_TIMEOUT);
+		wr32(hw, NGBE_MAC_WDG_TIMEOUT, reg);
 	}
 
 	return rte_eth_linkstatus_set(dev, &link);
-- 
2.27.0

[PATCH v3 12/13] net/ngbe: fix interrupt lost in legacy or MSI mode

[Jiawen Wu]

When interrupt is legacy or MSI mode, shared interrupt may cause the
interrupt cannot be re-enabled. So fix to read the shared interrupt.

Fixes: b9246b8fa280 ("net/ngbe: support link update")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index c372fd928c..325a9d1eaf 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -2193,6 +2193,19 @@ ngbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
 	struct ngbe_hw *hw = ngbe_dev_hw(dev);
 	struct ngbe_interrupt *intr = ngbe_dev_intr(dev);
 
+	eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_VEC0];
+	if (!eicr) {
+		/*
+		 * shared interrupt alert!
+		 * make sure interrupts are enabled because the read will
+		 * have disabled interrupts.
+		 */
+		if (!hw->adapter_stopped)
+			ngbe_enable_intr(dev);
+		return 0;
+	}
+	((u32 *)hw->isb_mem)[NGBE_ISB_VEC0] = 0;
+
 	/* read-on-clear nic registers here */
 	eicr = ((u32 *)hw->isb_mem)[NGBE_ISB_MISC];
 	PMD_DRV_LOG(DEBUG, "eicr %x", eicr);
-- 
2.27.0

[PATCH v3 13/13] net/ngbe: restrict configuration of VLAN strip offload

[Jiawen Wu]

There is a hardware limitation that Rx ring config register is not
writable when Rx ring is enabled, i.e. the NGBE_RXCFG_ENA bit is set.
But disabling the ring when there is traffic will cause ring get stuck.
So restrict the configuration of VLAN strip offload only if device is
started.

Fixes: 59b46438fdaa ("net/ngbe: support VLAN offload and VLAN filter")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 drivers/net/ngbe/ngbe_ethdev.c | 49 ++++++++++++++--------------------
 1 file changed, 20 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 325a9d1eaf..08e87471f6 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -586,41 +586,25 @@ ngbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 }
 
 static void
-ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+ngbe_vlan_strip_q_set(struct rte_eth_dev *dev, uint16_t queue, int on)
 {
-	struct ngbe_hw *hw = ngbe_dev_hw(dev);
-	struct ngbe_rx_queue *rxq;
-	bool restart;
-	uint32_t rxcfg, rxbal, rxbah;
-
 	if (on)
 		ngbe_vlan_hw_strip_enable(dev, queue);
 	else
 		ngbe_vlan_hw_strip_disable(dev, queue);
+}
 
-	rxq = dev->data->rx_queues[queue];
-	rxbal = rd32(hw, NGBE_RXBAL(rxq->reg_idx));
-	rxbah = rd32(hw, NGBE_RXBAH(rxq->reg_idx));
-	rxcfg = rd32(hw, NGBE_RXCFG(rxq->reg_idx));
-	if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
-		restart = (rxcfg & NGBE_RXCFG_ENA) &&
-			!(rxcfg & NGBE_RXCFG_VLAN);
-		rxcfg |= NGBE_RXCFG_VLAN;
-	} else {
-		restart = (rxcfg & NGBE_RXCFG_ENA) &&
-			(rxcfg & NGBE_RXCFG_VLAN);
-		rxcfg &= ~NGBE_RXCFG_VLAN;
-	}
-	rxcfg &= ~NGBE_RXCFG_ENA;
+static void
+ngbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+{
+	struct ngbe_hw *hw = ngbe_dev_hw(dev);
 
-	if (restart) {
-		/* set vlan strip for ring */
-		ngbe_dev_rx_queue_stop(dev, queue);
-		wr32(hw, NGBE_RXBAL(rxq->reg_idx), rxbal);
-		wr32(hw, NGBE_RXBAH(rxq->reg_idx), rxbah);
-		wr32(hw, NGBE_RXCFG(rxq->reg_idx), rxcfg);
-		ngbe_dev_rx_queue_start(dev, queue);
+	if (!hw->adapter_stopped) {
+		PMD_DRV_LOG(ERR, "Please stop port first");
+		return;
 	}
+
+	ngbe_vlan_strip_q_set(dev, queue, on);
 }
 
 static int
@@ -846,9 +830,9 @@ ngbe_vlan_hw_strip_config(struct rte_eth_dev *dev)
 		rxq = dev->data->rx_queues[i];
 
 		if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
-			ngbe_vlan_hw_strip_enable(dev, i);
+			ngbe_vlan_strip_q_set(dev, i, 1);
 		else
-			ngbe_vlan_hw_strip_disable(dev, i);
+			ngbe_vlan_strip_q_set(dev, i, 0);
 	}
 }
 
@@ -910,6 +894,13 @@ ngbe_vlan_offload_config(struct rte_eth_dev *dev, int mask)
 static int
 ngbe_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 {
+	struct ngbe_hw *hw = ngbe_dev_hw(dev);
+
+	if (!hw->adapter_stopped && (mask & RTE_ETH_VLAN_STRIP_MASK)) {
+		PMD_DRV_LOG(ERR, "Please stop port first");
+		return -EPERM;
+	}
+
 	ngbe_config_vlan_strip_on_all_queues(dev, mask);
 
 	ngbe_vlan_offload_config(dev, mask);
-- 
2.27.0