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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL02EPF00021F6C.mail.protection.outlook.com (10.167.249.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.14 via Frontend Transport; Mon, 11 Nov 2024 06:33:09 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 10 Nov 2024 22:32:56 -0800 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 10 Nov 2024 22:32:54 -0800 From: Xueming Li To: Nithin Dabilpuram CC: , dpdk stable Subject: patch 'common/cnxk: fix inline CTX write' has been queued to stable release 23.11.3 Date: Mon, 11 Nov 2024 14:27:24 +0800 Message-ID: <20241111062847.216344-39-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241111062847.216344-1-xuemingl@nvidia.com> References: <20241111062847.216344-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6C:EE_|MW5PR12MB5682:EE_ X-MS-Office365-Filtering-Correlation-Id: c97389b9-436f-43c8-9f82-08dd021ab5df X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2024 06:33:09.8027 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c97389b9-436f-43c8-9f82-08dd021ab5df X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5682 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/30/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=06df4e3ae1eaaabc9d325cd40ab792a75d2ae3ba Thanks. Xueming Li --- >From 06df4e3ae1eaaabc9d325cd40ab792a75d2ae3ba Mon Sep 17 00:00:00 2001 From: Nithin Dabilpuram Date: Tue, 1 Oct 2024 11:30:47 +0530 Subject: [PATCH] common/cnxk: fix inline CTX write Cc: Xueming Li [ upstream commit 6c3de40af8362d2d7eede3b4fd12075fce964f4d ] Reading a CPT_LF_CTX_ERR csr will ensure writes for FLUSH are complete and also tell whether flush is complete or not. Fixes: 71213a8b773c ("common/cnxk: support CPT CTX write through microcode op") Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_inl.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c index bc9cc2f429..ba51ddd8c8 100644 --- a/drivers/common/cnxk/roc_nix_inl.c +++ b/drivers/common/cnxk/roc_nix_inl.c @@ -1669,6 +1669,7 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, struct nix_inl_dev *inl_dev = NULL; struct roc_cpt_lf *outb_lf = NULL; union cpt_lf_ctx_flush flush; + union cpt_lf_ctx_err err; bool get_inl_lf = true; uintptr_t rbase; struct nix *nix; @@ -1710,6 +1711,13 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, flush.s.cptr = ((uintptr_t)sa_cptr) >> 7; plt_write64(flush.u, rbase + CPT_LF_CTX_FLUSH); + plt_atomic_thread_fence(__ATOMIC_ACQ_REL); + + /* Read a CSR to ensure that the FLUSH operation is complete */ + err.u = plt_read64(rbase + CPT_LF_CTX_ERR); + + if (err.s.flush_st_flt) + plt_warn("CTX flush could not complete"); return 0; } plt_nix_dbg("Could not get CPT LF for CTX write"); -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-11-11 14:23:06.989298502 +0800 +++ 0038-common-cnxk-fix-inline-CTX-write.patch 2024-11-11 14:23:05.102192840 +0800 @@ -1 +1 @@ -From 6c3de40af8362d2d7eede3b4fd12075fce964f4d Mon Sep 17 00:00:00 2001 +From 06df4e3ae1eaaabc9d325cd40ab792a75d2ae3ba Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 6c3de40af8362d2d7eede3b4fd12075fce964f4d ] @@ -11 +13,0 @@ -Cc: stable@dpdk.org @@ -19 +21 @@ -index a984ac56d9..d0328921a7 100644 +index bc9cc2f429..ba51ddd8c8 100644 @@ -22 +24 @@ -@@ -1748,6 +1748,7 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, +@@ -1669,6 +1669,7 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, @@ -30 +32 @@ -@@ -1789,6 +1790,13 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr, +@@ -1710,6 +1711,13 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,