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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL02EPF00021F6A.mail.protection.outlook.com (10.167.249.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.14 via Frontend Transport; Mon, 11 Nov 2024 06:33:34 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 10 Nov 2024 22:33:25 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 10 Nov 2024 22:33:23 -0800 From: Xueming Li To: Pavan Nikhilesh CC: , dpdk stable Subject: patch 'common/cnxk: fix IRQ reconfiguration' has been queued to stable release 23.11.3 Date: Mon, 11 Nov 2024 14:27:29 +0800 Message-ID: <20241111062847.216344-44-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241111062847.216344-1-xuemingl@nvidia.com> References: <20241111062847.216344-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6A:EE_|PH8PR12MB7304:EE_ X-MS-Office365-Filtering-Correlation-Id: 2cc40cc0-cace-4bea-a1b8-08dd021ac499 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2024 06:33:34.5255 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2cc40cc0-cace-4bea-a1b8-08dd021ac499 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7304 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/30/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=e1e6e73a44dcd1e62731ed963bdd3b15fe1b7463 Thanks. Xueming Li --- >From e1e6e73a44dcd1e62731ed963bdd3b15fe1b7463 Mon Sep 17 00:00:00 2001 From: Pavan Nikhilesh Date: Tue, 1 Oct 2024 18:41:09 +0530 Subject: [PATCH] common/cnxk: fix IRQ reconfiguration Cc: Xueming Li [ upstream commit 758b58f06a43564f435e3ecc1a8af994564a6b6b ] Unregister SSO device and NPA IRQs before resizing IRQs to cleanup stale IRQ handles. Fixes: 993107f0f440 ("common/cnxk: limit SSO interrupt allocation count") Signed-off-by: Pavan Nikhilesh --- drivers/common/cnxk/roc_dev.c | 16 +++++++--------- drivers/common/cnxk/roc_dev_priv.h | 2 ++ drivers/common/cnxk/roc_sso.c | 7 +++++++ 3 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c index 35eb8b7628..793d78fdbc 100644 --- a/drivers/common/cnxk/roc_dev.c +++ b/drivers/common/cnxk/roc_dev.c @@ -947,8 +947,8 @@ mbox_unregister_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev) RVU_VF_INT_VEC_MBOX); } -static void -mbox_unregister_irq(struct plt_pci_device *pci_dev, struct dev *dev) +void +dev_mbox_unregister_irq(struct plt_pci_device *pci_dev, struct dev *dev) { if (dev_is_vf(dev)) mbox_unregister_vf_irq(pci_dev, dev); @@ -1026,8 +1026,8 @@ roc_pf_vf_flr_irq(void *param) } } -static int -vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev) +void +dev_vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev) { struct plt_intr_handle *intr_handle = pci_dev->intr_handle; int i; @@ -1043,8 +1043,6 @@ vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev) dev_irq_unregister(intr_handle, roc_pf_vf_flr_irq, dev, RVU_PF_INT_VEC_VFFLR1); - - return 0; } int @@ -1529,7 +1527,7 @@ thread_fail: iounmap: dev_vf_mbase_put(pci_dev, vf_mbase); mbox_unregister: - mbox_unregister_irq(pci_dev, dev); + dev_mbox_unregister_irq(pci_dev, dev); if (dev->ops) plt_free(dev->ops); mbox_fini: @@ -1565,10 +1563,10 @@ dev_fini(struct dev *dev, struct plt_pci_device *pci_dev) if (dev->lmt_mz) plt_memzone_free(dev->lmt_mz); - mbox_unregister_irq(pci_dev, dev); + dev_mbox_unregister_irq(pci_dev, dev); if (!dev_is_vf(dev)) - vf_flr_unregister_irqs(pci_dev, dev); + dev_vf_flr_unregister_irqs(pci_dev, dev); /* Release PF - VF */ mbox = &dev->mbox_vfpf; if (mbox->hwbase && mbox->dev) diff --git a/drivers/common/cnxk/roc_dev_priv.h b/drivers/common/cnxk/roc_dev_priv.h index 5b2c5096f8..f1fa498dc1 100644 --- a/drivers/common/cnxk/roc_dev_priv.h +++ b/drivers/common/cnxk/roc_dev_priv.h @@ -128,6 +128,8 @@ int dev_irqs_disable(struct plt_intr_handle *intr_handle); int dev_irq_reconfigure(struct plt_intr_handle *intr_handle, uint16_t max_intr); int dev_mbox_register_irq(struct plt_pci_device *pci_dev, struct dev *dev); +void dev_mbox_unregister_irq(struct plt_pci_device *pci_dev, struct dev *dev); int dev_vf_flr_register_irqs(struct plt_pci_device *pci_dev, struct dev *dev); +void dev_vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev); #endif /* _ROC_DEV_PRIV_H */ diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c index b02c9c7f38..14cdf14554 100644 --- a/drivers/common/cnxk/roc_sso.c +++ b/drivers/common/cnxk/roc_sso.c @@ -765,7 +765,14 @@ sso_update_msix_vec_count(struct roc_sso *roc_sso, uint16_t sso_vec_cnt) return dev_irq_reconfigure(pci_dev->intr_handle, mbox_vec_cnt + npa_vec_cnt); } + /* Before re-configuring unregister irqs */ npa_vec_cnt = (dev->npa.pci_dev == pci_dev) ? NPA_LF_INT_VEC_POISON + 1 : 0; + if (npa_vec_cnt) + npa_unregister_irqs(&dev->npa); + + dev_mbox_unregister_irq(pci_dev, dev); + if (!dev_is_vf(dev)) + dev_vf_flr_unregister_irqs(pci_dev, dev); /* Re-configure to include SSO vectors */ rc = dev_irq_reconfigure(pci_dev->intr_handle, mbox_vec_cnt + npa_vec_cnt + sso_vec_cnt); -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-11-11 14:23:07.144644499 +0800 +++ 0043-common-cnxk-fix-IRQ-reconfiguration.patch 2024-11-11 14:23:05.102192840 +0800 @@ -1 +1 @@ -From 758b58f06a43564f435e3ecc1a8af994564a6b6b Mon Sep 17 00:00:00 2001 +From e1e6e73a44dcd1e62731ed963bdd3b15fe1b7463 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 758b58f06a43564f435e3ecc1a8af994564a6b6b ] @@ -10 +12,0 @@ -Cc: stable@dpdk.org @@ -20 +22 @@ -index 26aa35894b..c905d35ea6 100644 +index 35eb8b7628..793d78fdbc 100644 @@ -23,2 +25,2 @@ -@@ -1047,8 +1047,8 @@ mbox_unregister_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev) - dev_irq_unregister(intr_handle, roc_pf_vf_mbox_irq, dev, RVU_VF_INT_VEC_MBOX); +@@ -947,8 +947,8 @@ mbox_unregister_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev) + RVU_VF_INT_VEC_MBOX); @@ -34 +36 @@ -@@ -1126,8 +1126,8 @@ roc_pf_vf_flr_irq(void *param) +@@ -1026,8 +1026,8 @@ roc_pf_vf_flr_irq(void *param) @@ -45 +47 @@ -@@ -1143,8 +1143,6 @@ vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev) +@@ -1043,8 +1043,6 @@ vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev) @@ -54 +56 @@ -@@ -1723,7 +1721,7 @@ thread_fail: +@@ -1529,7 +1527,7 @@ thread_fail: @@ -63 +65 @@ -@@ -1761,10 +1759,10 @@ dev_fini(struct dev *dev, struct plt_pci_device *pci_dev) +@@ -1565,10 +1563,10 @@ dev_fini(struct dev *dev, struct plt_pci_device *pci_dev) @@ -70 +72 @@ - if (!dev_is_vf(dev)) { + if (!dev_is_vf(dev)) @@ -73,3 +75,3 @@ - /* Releasing memory allocated for mbox region */ - if (dev->vf_mbox_mz) - plt_memzone_free(dev->vf_mbox_mz); + /* Release PF - VF */ + mbox = &dev->mbox_vfpf; + if (mbox->hwbase && mbox->dev) @@ -77 +79 @@ -index 434e165b56..5ab4f72f8f 100644 +index 5b2c5096f8..f1fa498dc1 100644 @@ -80 +82 @@ -@@ -170,6 +170,8 @@ int dev_irqs_disable(struct plt_intr_handle *intr_handle); +@@ -128,6 +128,8 @@ int dev_irqs_disable(struct plt_intr_handle *intr_handle); @@ -90 +92 @@ -index 499f93e373..2e3b134bfc 100644 +index b02c9c7f38..14cdf14554 100644 @@ -93 +95 @@ -@@ -842,7 +842,14 @@ sso_update_msix_vec_count(struct roc_sso *roc_sso, uint16_t sso_vec_cnt) +@@ -765,7 +765,14 @@ sso_update_msix_vec_count(struct roc_sso *roc_sso, uint16_t sso_vec_cnt)