From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0858445D02 for ; Thu, 14 Nov 2024 08:39:14 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F360742D6A; Thu, 14 Nov 2024 08:39:13 +0100 (CET) Received: from mx0a-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 88F32427E1; Thu, 14 Nov 2024 08:39:11 +0100 (CET) Received: from pps.filterd (m0431384.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AE3TZkN025210; Wed, 13 Nov 2024 23:39:09 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=M jLWSpQZXyHK1BDAWgqLghK8nQ0oA5rwzFCjT5dKAWs=; b=B4Z8X94uIRiuZvf6Y tpw6aRqqFMV5Yx+HaboSgc8rO5XQSR0UxnPWav6t3bqmZmYKoFWBdgHr//Z5+iom E2a/SWqQIgaKdNHERSUJwbpfOuPp5NBLXpRU5rtRtXkGP7GQRgh2Bu/mFQLYFLEM ivAy6jU3TotcJazeVJAqh6UqzQEfJAX8vXrsREF+jxHHVU+EEkAqVv0B4W7VL5fh CdBzkEf2IVCutIbxCKtWYK76q0LSOElkKhQ0Ol9MXN6yD0lSrlc9j0DDjoXnMRW6 t2wPhK2X6HjDEpIgKduouLdpDpq4nENPLDI+tFBimBhcVZ3qjGmMoJ0E6S4iRahC OeMTg== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 42w9bpgyu2-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 13 Nov 2024 23:39:08 -0800 (PST) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 13 Nov 2024 23:39:04 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Wed, 13 Nov 2024 23:39:04 -0800 Received: from cavium-3070-BM23.. (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id AC4A03F7057; Wed, 13 Nov 2024 23:39:00 -0800 (PST) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra , Srujana Challa , Jerin Jacob , Rahul Bhansali CC: , , Subject: [PATCH 3/3] net/cnxk: fix build warnings on ubuntu 24.04 Date: Thu, 14 Nov 2024 13:08:16 +0530 Message-ID: <20241114073849.18752-3-skori@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114073849.18752-1-skori@marvell.com> References: <20241114073849.18752-1-skori@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: Lcfrt6xd_dfxWpzDtcFw7iS8o0Flm3IH X-Proofpoint-ORIG-GUID: Lcfrt6xd_dfxWpzDtcFw7iS8o0Flm3IH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org From: Sunil Kumar Kori Bugzilla ID: 1513 Fixes: 03b152389fb1 ("net/cnxk: add option to enable custom inbound SA") Fixes: 7df4ead35436 ("net/cnxk: support parsing custom SA action") Fixes: 47cca253d605 ("net/cnxk: support Rx inject") Cc: stable@dpdk.org Signed-off-by: Sunil Kumar Kori --- drivers/net/cnxk/cnxk_ethdev_devargs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c index 5bd50bb9a1..ecc2ea8b77 100644 --- a/drivers/net/cnxk/cnxk_ethdev_devargs.c +++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c @@ -305,12 +305,12 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev) uint16_t scalar_enable = 0; uint16_t tx_compl_ena = 0; uint16_t custom_sa_act = 0; - uint8_t custom_inb_sa = 0; + uint16_t custom_inb_sa = 0; struct rte_kvargs *kvlist; uint32_t meta_buf_sz = 0; + uint16_t lock_rx_ctx = 0; + uint16_t rx_inj_ena = 0; uint16_t no_inl_dev = 0; - uint8_t lock_rx_ctx = 0; - uint8_t rx_inj_ena = 0; memset(&sdp_chan, 0, sizeof(sdp_chan)); memset(&pre_l2_info, 0, sizeof(struct flow_pre_l2_size_info)); -- 2.43.0