From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 76D4145DB9 for ; Wed, 27 Nov 2024 18:22:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 734EA402DE; Wed, 27 Nov 2024 18:22:20 +0100 (CET) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id 1190D402DE for ; Wed, 27 Nov 2024 18:22:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1732728138; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7K+i83qhho6fGPtZyR7nvAVzK0jJbCZJIEJqZy2I7Zo=; b=B6GVdTWUhIfoOkeitnRFeYK4kNkV2rI28JbRZiSqwBdCAdkrL+zdvyXa7uTjctGr+YJVdE lPTGAI6+cJwKmeByYhiabqw1kXDsnfXQeq3scGFE4q8nmpoUsW2N0H5mugnPvH32Wl/v0B ME6ejpf5KMm5YLnGPOKvSprmoJcOFiI= Received: from mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-688-KWul1fhEMNSV1TI2bDrI1A-1; Wed, 27 Nov 2024 12:22:15 -0500 X-MC-Unique: KWul1fhEMNSV1TI2bDrI1A-1 X-Mimecast-MFC-AGG-ID: KWul1fhEMNSV1TI2bDrI1A Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 6103C19560AF; Wed, 27 Nov 2024 17:22:13 +0000 (UTC) Received: from rh.redhat.com (unknown [10.39.192.52]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id EA70D300019E; Wed, 27 Nov 2024 17:22:11 +0000 (UTC) From: Kevin Traynor To: Igor Gutorov Cc: Viacheslav Ovsiienko , dpdk stable Subject: patch 'net/mlx5: fix reported Rx/Tx descriptor limits' has been queued to stable release 21.11.9 Date: Wed, 27 Nov 2024 17:18:24 +0000 Message-ID: <20241127171916.690404-77-ktraynor@redhat.com> In-Reply-To: <20241127171916.690404-1-ktraynor@redhat.com> References: <20241127171916.690404-1-ktraynor@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: 35TCwKr093XcmvCm3il3BoFC1Su47aDaZ3DTAeeu22o_1732728133 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit content-type: text/plain; charset="US-ASCII"; x-default=true X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 21.11.9 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/02/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/kevintraynor/dpdk-stable This queued commit can be viewed at: https://github.com/kevintraynor/dpdk-stable/commit/27514445e7f32ba9e095c03b6508006535c05e24 Thanks. Kevin --- >From 27514445e7f32ba9e095c03b6508006535c05e24 Mon Sep 17 00:00:00 2001 From: Igor Gutorov Date: Wed, 7 Aug 2024 23:44:05 +0300 Subject: [PATCH] net/mlx5: fix reported Rx/Tx descriptor limits [ upstream commit 4c3d7961d9002bb715a8ee76bcf464d633316d4c ] Currently, `rte_eth_dev_info.rx_desc_lim.nb_max` as well as `rte_eth_dev_info.tx_desc_lim.nb_max` shows 65535 as the limit, which results in a few problems: * It is not the actual Rx/Tx queue limit * Allocating an Rx queue and passing `rx_desc_lim.nb_max` results in an integer overflow and 0 ring size: ``` rte_eth_rx_queue_setup(0, 0, rx_desc_lim.nb_max, 0, NULL, mb_pool); ``` Which overflows ring size and generates the following log: ``` mlx5_net: port 0 increased number of descriptors in Rx queue 0 to the next power of two (0) ``` The same holds for allocating a Tx queue. Fixes: e60fbd5b24fc ("mlx5: add device configure/start/stop") Signed-off-by: Igor Gutorov Acked-by: Viacheslav Ovsiienko --- drivers/common/mlx5/mlx5_devx_cmds.c | 1 + drivers/common/mlx5/mlx5_devx_cmds.h | 1 + drivers/net/mlx5/mlx5_ethdev.c | 4 ++++ drivers/net/mlx5/mlx5_rxq.c | 8 ++++++++ drivers/net/mlx5/mlx5_txq.c | 8 ++++++++ 5 files changed, 22 insertions(+) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index aa55d577f2..9684e374c0 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -920,4 +920,5 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, attr->log_max_cq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_cq_sz); attr->log_max_qp_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_qp_sz); + attr->log_max_wq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_wq_sz); attr->log_max_mrw_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_mrw_sz); attr->log_max_pd = MLX5_GET(cmd_hca_cap, hcattr, log_max_pd); diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index 4373761c29..6e76528acc 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -229,4 +229,5 @@ struct mlx5_hca_attr { struct mlx5_hca_flow_attr flow; struct mlx5_hca_flex_attr flex; + uint8_t log_max_wq_sz; int log_max_qp_sz; int log_max_cq_sz; diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index c6ec156493..cc2e1ae8f9 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -344,4 +344,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) mlx5_set_default_params(dev, info); mlx5_set_txlimit_params(dev, info); + info->rx_desc_lim.nb_max = + 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz; + info->tx_desc_lim.nb_max = + 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz; if (priv->config.hca_attr.mem_rq_rmp && priv->obj_ops.rxq_obj_new == devx_obj_ops.rxq_obj_new) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 4e958d2005..ab0e51dc88 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -653,4 +653,12 @@ mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc, bool empty; + if (*desc > 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz) { + DRV_LOG(ERR, + "port %u number of descriptors requested for Rx queue" + " %u is more than supported", + dev->data->port_id, idx); + rte_errno = EINVAL; + return -EINVAL; + } if (!rte_is_power_of_2(*desc)) { *desc = 1 << log2above(*desc); diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index 4e0bf7af9c..b34e35a180 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -329,4 +329,12 @@ mlx5_tx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc) struct mlx5_priv *priv = dev->data->dev_private; + if (*desc > 1 << priv->sh->cdev->config.hca_attr.log_max_wq_sz) { + DRV_LOG(ERR, + "port %u number of descriptors requested for Tx queue" + " %u is more than supported", + dev->data->port_id, idx); + rte_errno = EINVAL; + return -EINVAL; + } if (*desc <= MLX5_TX_COMP_THRESH) { DRV_LOG(WARNING, -- 2.47.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-11-27 17:17:40.682942646 +0000 +++ 0077-net-mlx5-fix-reported-Rx-Tx-descriptor-limits.patch 2024-11-27 17:17:38.281269663 +0000 @@ -1 +1 @@ -From 4c3d7961d9002bb715a8ee76bcf464d633316d4c Mon Sep 17 00:00:00 2001 +From 27514445e7f32ba9e095c03b6508006535c05e24 Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit 4c3d7961d9002bb715a8ee76bcf464d633316d4c ] + @@ -26 +27,0 @@ -Cc: stable@dpdk.org @@ -39 +40 @@ -index 9710dcedd3..a75f011750 100644 +index aa55d577f2..9684e374c0 100644 @@ -42 +43 @@ -@@ -1028,4 +1028,5 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, +@@ -920,4 +920,5 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, @@ -49 +50 @@ -index 6cf7999c46..2ad9e5414f 100644 +index 4373761c29..6e76528acc 100644 @@ -52 +53,2 @@ -@@ -268,4 +268,5 @@ struct mlx5_hca_attr { +@@ -229,4 +229,5 @@ struct mlx5_hca_attr { + struct mlx5_hca_flow_attr flow; @@ -54 +55,0 @@ - struct mlx5_hca_crypto_mmo_attr crypto_mmo; @@ -59 +60 @@ -index 6f24d649e0..7708a0b808 100644 +index c6ec156493..cc2e1ae8f9 100644 @@ -62 +63 @@ -@@ -360,4 +360,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) +@@ -344,4 +344,8 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) @@ -69 +70 @@ - if (priv->sh->cdev->config.hca_attr.mem_rq_rmp && + if (priv->config.hca_attr.mem_rq_rmp && @@ -72 +73 @@ -index c6655b7db4..5eac224b76 100644 +index 4e958d2005..ab0e51dc88 100644 @@ -75 +76 @@ -@@ -656,4 +656,12 @@ mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc, +@@ -653,4 +653,12 @@ mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc, @@ -89 +90 @@ -index f05534e168..3e93517323 100644 +index 4e0bf7af9c..b34e35a180 100644 @@ -92 +93 @@ -@@ -334,4 +334,12 @@ mlx5_tx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc) +@@ -329,4 +329,12 @@ mlx5_tx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)