From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BF24C46A63 for ; Thu, 26 Jun 2025 14:09:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B90C0402A1; Thu, 26 Jun 2025 14:09:32 +0200 (CEST) Received: from NAM02-DM3-obe.outbound.protection.outlook.com (mail-dm3nam02on2042.outbound.protection.outlook.com [40.107.95.42]) by mails.dpdk.org (Postfix) with ESMTP id D95FD400D6 for ; Thu, 26 Jun 2025 14:09:29 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=fkPZoLFgSqOkh/T1cgYOTxqsi8V4/ZPxOIBazEv/SKdoszHfMaW+2rnyk7pjG/fFUdYfJqx47DjQh5zTVeo+3Ty9gxvVCZQ6mlvkO3iE20TTbvMr/ROcpeUhCxLAvtoEj9NS1ZlTEds2RLYz0xcKsPbrn0glTmu+ikndNva8DpnpT02+0bobANi2aMR9rGucemmLRcR+7y0pKOc8BNmkl9AhAVqMGBwqCBm9uVwmiBmg/dxYtST6FmgitGACeKHaVxYb6SGh/2uRs+qei7Q/4H0JUyP7wnNGmdJ4ZpWwrdEdBJsNrmkZonQO8zRvk0lSLD8Zlk8x39DAwgzPeDPzCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=iWP/waxuU6zESdxplwzWCo0WOorvAuFEf9NTisRF4EY=; b=WZmdtLiogHvnYrxOPloAol1BMF05k/jGKu/hf35k4psro0oUeVSs23jSreJOinKm6F7b1wMiMhp1BTApZ2sSJuvsp372jkFPURqw0csxFWdneRgT/YZZorrhFThq622wnQtCaEUdpKFm3ZSKM0VAcQBiqH6tTBMQsbp5hZ+MonpayvK4te+zMTu7X2D6Kkq7j6mA56xPVLez3OMN8C7PjWnOBtTUZM/0I/mQZLfLAKgoSHZz/3VEWjYLeSbM8g/k/zH61T06y9ZL9Xv2MFxvPpxcVcHgCxK5TZ7xzg5rLmFeYDHeWlc1xcaORtoIgKfrNCUgE9wnPcXxkbZB88IDdA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=gmail.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=iWP/waxuU6zESdxplwzWCo0WOorvAuFEf9NTisRF4EY=; b=P2sBHh2/UKeCQZOn8R5f6487cZEAwFNPZ4k+zReLxhwLHYApR4WUu87kYTLk8liNzMxhViCDnchT9AuK2OnfQxukCsUPm1uQk5RNKmZ/dsDh+jz5WpOK77ditwXkUj/gNIVhge3mvdI4G5PCL08xG8OpLhH5vhrxAIi4STkMGjqPL1poSe+qlObMHBQSA59MorYLjV4/y6guyJLrFQMxQf0/wlNpxPQ2M0SFxzn3Dv4WB+IVORszhs3bllLzWpNw9BnYq6PfKcJxzNBDqEwJD2PouMuzxQHbebJmcqxwQ45vW38ldR+MbaNrq6Gl6FSK42aUJ4xYxnyAPgzD66zlrA== Received: from SJ0PR05CA0163.namprd05.prod.outlook.com (2603:10b6:a03:339::18) by MW4PR12MB8609.namprd12.prod.outlook.com (2603:10b6:303:1e2::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8835.24; Thu, 26 Jun 2025 12:09:27 +0000 Received: from SJ5PEPF000001D2.namprd05.prod.outlook.com (2603:10b6:a03:339:cafe::9) by SJ0PR05CA0163.outlook.office365.com (2603:10b6:a03:339::18) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.8901.6 via Frontend Transport; Thu, 26 Jun 2025 12:09:27 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by SJ5PEPF000001D2.mail.protection.outlook.com (10.167.242.54) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8880.14 via Frontend Transport; Thu, 26 Jun 2025 12:09:27 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 26 Jun 2025 05:09:15 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Thu, 26 Jun 2025 05:09:13 -0700 From: Xueming Li To: =?UTF-8?q?Jarom=C3=ADr=20Smr=C4=8Dek?= <4plague@gmail.com> CC: Xueming Li , Dariusz Sosnowski , dpdk stable Subject: patch 'doc: add kernel options required for mlx5' has been queued to stable release 23.11.5 Date: Thu, 26 Jun 2025 20:01:41 +0800 Message-ID: <20250626120145.27369-82-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250626120145.27369-1-xuemingl@nvidia.com> References: <20250626120145.27369-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001D2:EE_|MW4PR12MB8609:EE_ X-MS-Office365-Filtering-Correlation-Id: 147c1ee6-d137-4f44-4700-08ddb4aa4c27 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aFc2bU9TNm5WNWtxLzNEcllodjJuOFRJK1pXRlNtT1JIZS8zdHRTb05LcXBt?= =?utf-8?B?aE5WNDRMcEsrOWExa1QxdEQ1S0RsU1R1aE9HbDFzenBWTzNIcHVtWTRNaXhB?= =?utf-8?B?elkram9YU3R6WTVDbDJFODg2eCtDdDYyZEZtTnh1empCOUZaYnhNY3cwTlZ3?= =?utf-8?B?SHh1aTVsNDVhS0d2eklMQnhRVGRYQUplTnpncXYvU3pSbmp3bUNGZ0tCWHpH?= =?utf-8?B?dGQ5UWhLVm85a0hqQ2RVbm9wc3MweDhXSFBjRFhLZERLeTFoRkxXdmUwZ2hx?= =?utf-8?B?bEF4a29jcmVjL1JlK2ZNNStmZzVGai9YdXRtdkFhUTFuY0JvK2NIUVIreThV?= =?utf-8?B?bHc4TGl1ejllVGJTOW1CN21aWGt6RkkwM1BuVEY3UFovcHlBdHU5V1dqb0I1?= =?utf-8?B?S01YVXNWcW01b290SVFRMENYTm13eU1KcStXakF3Z0xqQjVBUXoreEExUlMx?= =?utf-8?B?OVpNMG9kWmlRMEt6U0tiaEFzVlZIS0loSzZMVFZZdVdObXZUdU1Zd2RaSTJ2?= =?utf-8?B?VHl5aUJSbGdqUVRlamV4YS81eTM5M3BXRzlxR0w0dUF0SUJJY3phRXFnTGlD?= =?utf-8?B?NFpBckJPMU1qcHV5dktOUHNvQ2drSHFOSDViRGErQWFTZytxczI5b1h3RTQ4?= =?utf-8?B?NWxHakk4bWY3YjZkeXBsVzFPVXRJUzN2UmszMDI3WFQ5ZDRLd09RMWp4S0pD?= =?utf-8?B?aVl6YVQyc3B6dU42TTNRbFF3UUU3ekhrdGJTMmRLL0llOVkxVVFpNVFtY3o3?= =?utf-8?B?NGZmdW5CNGVnTUlQVmM4NjREdC84dXQyNDUzUVRuRldDajRoM0FFcmFQa0VB?= =?utf-8?B?MmRtVHFkQ212elViZWpKN2M0UXZ6K3VtQjF2a3ZDdDdlRkg1UFZYUm9OT0tt?= =?utf-8?B?OHR1WnlDRUVobUVTNkVYcWNPTlYwbmFiQjV1bVBWVzRORGNrdzhjNDFFbS9V?= =?utf-8?B?QU12WU1XaG5JbHhlQkwyY0daNkVteXlqN2ZPR0pJWW9qeEpHR09Ba29Hc3U5?= =?utf-8?B?MGhVbHE3M1oxaWxtMEZtOW0vYS9ZS3lSZDJ0bG9zNjZvTFVXQVJmWWsyeXM2?= =?utf-8?B?eGVIRnlPaDk0K29FbnJLOGJ4S2RkTjlCRmpnTGlHakloUklDVW41ME10OUdE?= =?utf-8?B?VStJWjh2dW9xV1M2N3EyL0M5cndKVThIYW1Jd2IvdGRraEFWcjlObmNGZW05?= =?utf-8?B?OXMwZmt2SEluU3JUTElQL0hwRHhXSDcyb2FzMW9TWFZNZFAwU1Z3WWVqaDVs?= =?utf-8?B?dHU5VUpsc2M1TUs1RnA3UU1LOVZRYlRiQ2ppazhpOVJjdVllSCtkc0RmN1Ay?= =?utf-8?B?a3J6OHRDZlRpYmV0UWZLV2Q1TC9acW81RWllc3JsNTNVNUlxY0VuNDdJdWMx?= =?utf-8?B?NzZVUWZ6NDIvd2tSbEFTSmErTDhqeVJIc09mYys1VnFsQ05sUXp6TmJMbElN?= =?utf-8?B?SGc1blM1c1pJc2Z4Q3ROdjRPdXk2ZURlVXBvM1hDbmlOOUNTRHdHcm9wcEFM?= =?utf-8?B?MlFYNndYT0ZPa05QRGZSZzM1RHB1SlE3KzdNVmsxR0FnTlVkejRGek44UXR4?= =?utf-8?B?djJTcVl4SlBLYWE3V0ROUlpOR2V0SXk3NnJDaWF2UmgxQXYzK3didXd2MDdQ?= =?utf-8?B?NjA5VnMzSUtDM2J4Z0dWTzZqM0lnSWJZUEhwRmVtRGJuRGtPa3hMR0hIaUZJ?= =?utf-8?B?c0V4TUJMOUYyM0wrQkFodVNJN3I3dXgvMXJ5Zm5jTnRRQnZsZFJtdG9oK2NK?= =?utf-8?B?TE9Sc2UwTEtOOVIvNkc4Q1Z3c1NlN2c1RzV4dHRDbHZMaWpZSFpPVDEzY0Vj?= =?utf-8?B?L0pFVzluVFliZ1VlSlVmTzU4R3c4bFhPM25nbW9ZZ050eUZmcTJSV01Bbk1m?= =?utf-8?B?bG5tUFI2TzdSek10N3g5OW01MjZ2cm9LRzRISDRZYjR6NkhuVDlJa2xuMGo5?= =?utf-8?B?eUhkSXMxVDZIaEpjWHBPNllnNjcwcDI2VHovYmF2MXlMSHptaGw4bUxlUC9v?= =?utf-8?B?M3lhVWpRQVF4SDBWL3VvdEdtdWJ5dnNwdWFCd3pDdzJVTmQ5dkx2dHh2LzQ1?= =?utf-8?B?S0ROaDdNWHpCZDdJZVpiS3RCWnpoUURwRVFRZz09?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024)(7053199007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jun 2025 12:09:27.0911 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 147c1ee6-d137-4f44-4700-08ddb4aa4c27 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D2.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB8609 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.5 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 06/28/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=87853e3523bd30dd0f4f3b733f5d485a3eb95c25 Thanks. Xueming Li --- >From 87853e3523bd30dd0f4f3b733f5d485a3eb95c25 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jarom=C3=ADr=20Smr=C4=8Dek?= <4plague@gmail.com> Date: Tue, 10 Jun 2025 10:02:43 +0300 Subject: [PATCH] doc: add kernel options required for mlx5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Xueming Li [ upstream commit 3101799fce0016061ff7aa9c3c2ad7155aff1073 ] On some kernels (Debian 6.6, 6.9 and 6.10 tested), there is a missing option for "TC recirculation" that prevents MLX5 driver to include CONFIG_MLX5_CLS_ACT in the compilation, thus preventing PF1 from properly working in multiport-eswitch mode. Fixes: 11c73de9ef63 ("net/mlx5: probe multi-port E-Switch device") Signed-off-by: Jaromír Smrček <4plague@gmail.com> Acked-by: Dariusz Sosnowski --- .mailmap | 1 + doc/guides/nics/mlx5.rst | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.mailmap b/.mailmap index b1e5e00cb7..e0202fab03 100644 --- a/.mailmap +++ b/.mailmap @@ -605,6 +605,7 @@ Jan Medala Jan Remes Jan Viktorin Jan Wickbom +Jaromír Smrček <4plague@gmail.com> Jaroslaw Gawin Jaroslaw Ilgiewicz Jason He diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index d1c3284ca1..7c9e0350d4 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -1485,7 +1485,7 @@ Supported HCAs: Supported mlx5 kernel modules versions: -- Upstream Linux - from version 6.3. +- Upstream Linux - from version 6.3 with CONFIG_NET_TC_SKB_EXT and CONFIG_MLX5_CLS_ACT enabled. - Modules packaged in MLNX_OFED - from version v23.04-0.5.3.3. Configuration -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2025-06-26 19:59:20.749784004 +0800 +++ 0081-doc-add-kernel-options-required-for-mlx5.patch 2025-06-26 19:59:17.518418038 +0800 @@ -1 +1 @@ -From 3101799fce0016061ff7aa9c3c2ad7155aff1073 Mon Sep 17 00:00:00 2001 +From 87853e3523bd30dd0f4f3b733f5d485a3eb95c25 Mon Sep 17 00:00:00 2001 @@ -7,0 +8,3 @@ +Cc: Xueming Li + +[ upstream commit 3101799fce0016061ff7aa9c3c2ad7155aff1073 ] @@ -16 +18,0 @@ -Cc: stable@dpdk.org @@ -26 +28 @@ -index 3dec1492aa..8483d96ec5 100644 +index b1e5e00cb7..e0202fab03 100644 @@ -29 +31,3 @@ -@@ -645,6 +645,7 @@ Jan Viktorin +@@ -605,6 +605,7 @@ Jan Medala + Jan Remes + Jan Viktorin @@ -31,2 +34,0 @@ - Jananee Parthasarathy - Janardhanan Arumugam @@ -38 +40 @@ -index 9957802d44..c1dcb9ca68 100644 +index d1c3284ca1..7c9e0350d4 100644 @@ -41 +43 @@ -@@ -1761,7 +1761,7 @@ Supported HCAs: +@@ -1485,7 +1485,7 @@ Supported HCAs: