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Thu, 25 Dec 2025 01:26:41 -0800 From: Shani Peretz To: Shani Peretz CC: Dariusz Sosnowski , dpdk stable Subject: patch 'net/mlx5: fix Tx metadata pattern template mismatch' has been queued to stable release 23.11.6 Date: Thu, 25 Dec 2025 11:19:03 +0200 Message-ID: <20251225091938.345892-102-shperetz@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251225091938.345892-1-shperetz@nvidia.com> References: <20251221145746.763179-93-shperetz@nvidia.com> <20251225091938.345892-1-shperetz@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC5:EE_|SJ2PR12MB9242:EE_ X-MS-Office365-Filtering-Correlation-Id: e65f4003-2656-4c42-8921-08de4397be65 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?DsVuZmJajKsCeLwAAEQnRrtNSy25kHGn45GFq3cnJJ+05tJPhDT31yh51IFU?= =?us-ascii?Q?1AorJghoUGWkDp7qMr0cE60pPcRtoixfd2VrLus27vjMpynmggh4VepTCQYC?= =?us-ascii?Q?29i3d4Qp3mWkXcB3+uHmjLBXsDLoy7SbtF7FlMiXmmMoJpS8YRCKtuvzxkyR?= =?us-ascii?Q?6L3tPCe9WL6i9HDlcBvFlQ6djhMxPdJImI0VfrUozyS/TB1y46DmVYUcgAzU?= =?us-ascii?Q?wR1GWC8jUbyz03QWpOoIttTbghjw7kotldQcF/01SueAiH6Q+fA5Yj1rLvtu?= =?us-ascii?Q?T3e9kez/eq1SGIfiAEQljnNW/N62cFc10GAxcGgnPfFZBUHp7aaG02kDnnFS?= =?us-ascii?Q?LhnO6MB0/WFh2L7CA1jIUyXz+3FyepgZ4YOaEigo/bFH+fTT5eowUBU/qe57?= =?us-ascii?Q?5vIVgkEJHnbU64IQCMzmRRQ4JVJrFzfnsIfdjlz0TjvKgrHAKlg+QcSTnR9v?= =?us-ascii?Q?Zagi9GU2PnNu2wqOJ4h7TNBr+YRHZ8Rrb1iCme1kYSMsnjkLy2eNZLJpINtO?= =?us-ascii?Q?FlJsIW9FaQ9EvcOR9yYLegfLw6EFVdEaRQD2VNKsEwzHgHY132eSrMsu7LaC?= =?us-ascii?Q?LH1sw/XsT7cXBgf0D8rPhan4GXLfHhSktmI8rTK2YDzZg2prptYZyhvy7a7M?= =?us-ascii?Q?RdcbXjW45SXdA2Ic2XERNP53zQ3lrv5qp4DTD1o7l9Tnv36Tu//Imowa9X6v?= =?us-ascii?Q?AyPXYNnOf56E46k9RDzN7u8VOKMRdyxHJhXlSPEf0houQvvg0tXgCOppEVBT?= =?us-ascii?Q?NK6xVJpKq0VcoWCFqeK5wTUKhSQLmmwmDpt5yfG1VgDoeAyx5Pi40eW7gEuo?= =?us-ascii?Q?/T2hV2m+5R0+4QlE8rZgmp8GCYfhTfuaO7asXrZrxRf2HwjhG5BkpaW9C4r2?= =?us-ascii?Q?LhcBPK+IfTNVfO+anVhKhzbMb6ySztxAEQ+49eT1A1/jBZ4USZ1Qd6aXfECG?= =?us-ascii?Q?/d9lwj59FjZrRTtwrT1T4uXvGnhuo66Ozr3DJkmqCxH7V79RjRSzCILEmJUY?= =?us-ascii?Q?qMAnlX20NF4OuAFPl/a5tgVMF8ZXjfwq9Aw986orQi+fBxkZ87e3/gB43KvR?= =?us-ascii?Q?Q5FYUaoBkM/qrbUK0n3kFiAbsb3Gj6qTpkwRXChpcEMlIVwqozgAXwi68T0v?= =?us-ascii?Q?uT/KOAtRoDN6o4AmrOheiY85Hexe/VclJHjtE+88AkxxC4wbSwkYC6ZcQF9+?= =?us-ascii?Q?odLzmZsmUsZ5ty1Z7zVExdIpDtDzVx/aVfuOfY1HgZ5dnQ90HyXkaebj2/7K?= =?us-ascii?Q?3LN0ug2ulWT7ozqa8J7jFjSPgsL59F7ikUeLQuAYPYf2SoZu0srNqIeu1PZ9?= =?us-ascii?Q?m0tiEJLZJRKncmkK61nMeNSL0P2qhycjlZjj/FV6BPoiENhmWmWlhcHKsU1h?= =?us-ascii?Q?RUmo5AEbz1cI4X4Dw4bN13jgtSOx2v+c83cryR39ARDSZNUrtJY3dW++CBwl?= =?us-ascii?Q?54UbYnThMxWJRXlrViuxyhdF5MSAPFBC7eaQAveGUjX+iMdwM0soJ02/qMci?= =?us-ascii?Q?un4NsVCzXYBuE1Vsrf39KDvv+0s9bMyMZd6Ez/063X/XbOcmrAi0UXMoOgRd?= =?us-ascii?Q?LVHeOJ0z64g1wKoz7dTO4K/Zw/+Ex21lFWDCebcK?= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024)(13003099007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Dec 2025 09:26:54.5515 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e65f4003-2656-4c42-8921-08de4397be65 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC5.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9242 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/30/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/shanipr/dpdk-stable This queued commit can be viewed at: https://github.com/shanipr/dpdk-stable/commit/9831298349d105fc0aff7b937ad772bc8705c4b8 Thanks. Shani --- >From 9831298349d105fc0aff7b937ad772bc8705c4b8 Mon Sep 17 00:00:00 2001 From: Shani Peretz Date: Thu, 20 Nov 2025 12:49:36 +0200 Subject: [PATCH] net/mlx5: fix Tx metadata pattern template mismatch When representor matching is disabled with dv_xmeta_en=4, the Tx metadata copy flows use SQ (send queue) pattern matching, but the pattern template was still configured to use ETH match-all pattern. This mismatch causes hardware to reject the flows with error CQEs during port configuration. This patch fixes the issue by using SQ-based pattern template (flow_hw_create_tx_repr_sq_pattern_tmpl) instead of the ETH match-all template (flow_hw_create_tx_default_mreg_copy_pattern_template). Fixes: 593fb3fdfa10 ("net/mlx5: fix multi process Tx default rules") Signed-off-by: Shani Peretz Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow_hw.c | 42 +-------------------------------- 1 file changed, 1 insertion(+), 41 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 59a3e71855..d17b4d560e 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -7946,46 +7946,6 @@ flow_hw_create_ctrl_port_pattern_template(struct rte_eth_dev *dev, return flow_hw_pattern_template_create(dev, &attr, items, error); } -/* - * Creating a flow pattern template with all ETH packets matching. - * This template is used to set up a table for default Tx copy (Tx metadata - * to REG_C_1) flow rule usage. - * - * @param dev - * Pointer to Ethernet device. - * @param error - * Pointer to error structure. - * - * @return - * Pointer to flow pattern template on success, NULL otherwise. - */ -static struct rte_flow_pattern_template * -flow_hw_create_tx_default_mreg_copy_pattern_template(struct rte_eth_dev *dev, - struct rte_flow_error *error) -{ - struct rte_flow_pattern_template_attr tx_pa_attr = { - .relaxed_matching = 0, - .egress = 1, - }; - struct rte_flow_item_eth promisc = { - .hdr.dst_addr.addr_bytes = "\x00\x00\x00\x00\x00\x00", - .hdr.src_addr.addr_bytes = "\x00\x00\x00\x00\x00\x00", - .hdr.ether_type = 0, - }; - struct rte_flow_item eth_all[] = { - [0] = { - .type = RTE_FLOW_ITEM_TYPE_ETH, - .spec = &promisc, - .mask = &promisc, - }, - [1] = { - .type = RTE_FLOW_ITEM_TYPE_END, - }, - }; - - return flow_hw_pattern_template_create(dev, &tx_pa_attr, eth_all, error); -} - /* * Creating a flow pattern template with all LACP packets matching, only for NIC * ingress domain. @@ -8691,7 +8651,7 @@ flow_hw_create_ctrl_tables(struct rte_eth_dev *dev, struct rte_flow_error *error /* Create templates and table for default Tx metadata copy flow rule. */ if (!repr_matching && xmeta == MLX5_XMETA_MODE_META32_HWS) { hw_ctrl_fdb->tx_meta_items_tmpl = - flow_hw_create_tx_default_mreg_copy_pattern_template(dev, error); + flow_hw_create_tx_repr_sq_pattern_tmpl(dev, error); if (!hw_ctrl_fdb->tx_meta_items_tmpl) { DRV_LOG(ERR, "port %u failed to Tx metadata copy pattern" " template for control flows", dev->data->port_id); -- 2.43.0