From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0D4A5470E5 for ; Thu, 25 Dec 2025 10:25:16 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F14614065D; Thu, 25 Dec 2025 10:25:15 +0100 (CET) Received: from CH4PR04CU002.outbound.protection.outlook.com (mail-northcentralusazon11013032.outbound.protection.outlook.com [40.107.201.32]) by mails.dpdk.org (Postfix) with ESMTP id C40374065D for ; Thu, 25 Dec 2025 10:25:14 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=CcrpNY5oxpvXzOgrdVqt2ThK3mS0+mHN4ges1QHoSfyNtDMtADMkSNlU9pMyYGAcn8aE8CDh7gkmDqWRHMlQx9PC3FcYeweiwlUbyzZ12WPQnRs4EPbOqp2sc1vASt8usNiHI8Z2x5Nh8yiioDa2arF5Hgeh9SNW9aGjCgTtINZIvtZrTm1IOSHRa6MefjIYYNV+ascRpmPsi+vJpPv7H4/dC9F1mRgj1vgiDq55lOs8B662CwJ5LgsD4ZoH0KNqX2eUf49qdXtgoA7UTP7on34lr48KqyPqNAvNGFZOQxYzKny7U3Mw/Gv/MCdDeKeLYNvrnnggPcW7LAKjFIvy7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=34aoPsCPHKvnohT4aYnOVfgEuHC7DSFsufNpC1rB4xk=; b=aUmZMVKP5zT7budopA1EcEoR3xcqRNlMaOLmd3S+i9zt7FZIpb/MbeNjPSDVxJXBliK4NyRy0Ap3JdnqzfPGkHt8xuRcUYeuPUtDBkHAe1o/AjLJKM8TZZqB/zNqjDvl+29zv+7Jt8PGwGcFJhcY1Exj4s23wxcNEZv0lq59UlYprivGOrNuG7bV/mfoPpzgKw2+EJ2dd2xrS0GW5xPpBx24aawigqdfD0hhwob2VQFV5R0IqQ4gxxxk6uYpOc2W71vj9nVj4IGArlhihBTwya+wz9nYxBuyurFmigrqu6MHUqCUNmQBL2DpGwq23FcA8PUnRqVqzIiFBmYz7kOd6g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=34aoPsCPHKvnohT4aYnOVfgEuHC7DSFsufNpC1rB4xk=; b=svhza/xU5GT7cvbI7YEnUUYJzhSEqxI7jNQARqiuWKVHmN1PZ4J+kjgbCxZt3DaPBpPARBVZoeBQj2yAmtOCibuXTSOKqwlT9IMOvAuH/F6pPIw0nXSYrJ8va11tZrP7w3ix65DSbDGa+FCEIQA9fp2zzExH1q0X/hhRO6TYVE0+7vz9UDO+EROv1GSkHkQEgOXcoId0SSlWU2HhOmGoZC8UenX1f+8Ht4tQsl/Cbu3bsHO8lxOrX58Pgyx81b2vAngmkk3LjxNDpmv77CIqVL4oJm0uUT16k7kKvddPKnSKg9wtK6DiWG4QxmFlbaxsSt/RPzvJNl935H53m+fgbQ== Received: from DM6PR02CA0090.namprd02.prod.outlook.com (2603:10b6:5:1f4::31) by DM4PR12MB5795.namprd12.prod.outlook.com (2603:10b6:8:62::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.9; Thu, 25 Dec 2025 09:25:09 +0000 Received: from DS2PEPF00003448.namprd04.prod.outlook.com (2603:10b6:5:1f4:cafe::78) by DM6PR02CA0090.outlook.office365.com (2603:10b6:5:1f4::31) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9456.11 via Frontend Transport; Thu, 25 Dec 2025 09:25:09 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by DS2PEPF00003448.mail.protection.outlook.com (10.167.17.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9456.9 via Frontend Transport; Thu, 25 Dec 2025 09:25:08 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 25 Dec 2025 01:25:04 -0800 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 25 Dec 2025 01:25:03 -0800 Received: from nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Thu, 25 Dec 2025 01:25:02 -0800 From: Shani Peretz To: Jacob Keller CC: Bruce Richardson , dpdk stable Subject: patch 'net/iavf: fix Rx timestamp validity check' has been queued to stable release 23.11.6 Date: Thu, 25 Dec 2025 11:18:41 +0200 Message-ID: <20251225091938.345892-80-shperetz@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251225091938.345892-1-shperetz@nvidia.com> References: <20251221145746.763179-93-shperetz@nvidia.com> <20251225091938.345892-1-shperetz@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003448:EE_|DM4PR12MB5795:EE_ X-MS-Office365-Filtering-Correlation-Id: 598138fa-06d4-46ef-8d95-08de43977f6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014|13003099007|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?MBYNZEDDZXPIjCGhPeT/veaPu6uSibShvuv9LJrkZ2CkSMtKhBNXDXzZyDsd?= =?us-ascii?Q?fljb9EcAgB7SwE10dwNcEc23nOUWX886p2Rm1EhJoZa8nuWZ/MEqOkprV185?= =?us-ascii?Q?gQUJENZ0DOzsw0OIo5kgGkH6B0HgmEX9LzOoRq5dZMB2QeTsvapFSt+iHytE?= =?us-ascii?Q?Ez0u31wROuElN3oiZa8b8UFcHKc4g6v4Jcj2H0kg+9H6hdp/sGDVyQxAjk6y?= =?us-ascii?Q?g+NmJ0WvwyetZSfOOLrobYanbmwOLwlN4Wobtxvw/HUz20abBcklANn+N0ly?= =?us-ascii?Q?FIDNK3guAMze6s/DvCG4RzgEE6TY71k0Q68rmjLdXS/TmUyCSdWHEO08HCmP?= =?us-ascii?Q?wuHatd/GPIi0TcwMI1OAJsxjxeWQR4Y8AWqU4z1RE1t944ZkWYlGXCsQoaic?= =?us-ascii?Q?LXMLEkejg1zIeM2Lt5gMVrB/bkfCb703TmcVXdbqc/hZiiQucib6pvTIjtxO?= =?us-ascii?Q?EBGX/HYwXk3G+CTH6Y35gfK1M1iM+KNPAkU4/YvzjrCXta/msD2k3EBo0Szp?= =?us-ascii?Q?JFbfv9w4FpVzIJkDtAC/1BDDBIbQzZEqolK2jVwXVOm//PSAkEaVtw4QlRRm?= =?us-ascii?Q?uVGKGkAT+F+ZizBgKsN0HfamsRGe5AmKZK2Q2BKrCsPRF4cAbG8SOb1PQvIO?= =?us-ascii?Q?AImd+8SaBLcZSRulXgMY7hTFy9sQikyvlrnis/GJSmcFig7nLNjE/HHECSfT?= =?us-ascii?Q?Iv5WCuJzdjwPIh7e4slocwbZkrSQlz59dGaWCXnZC4eKftRJSrBmo4Dj7oxP?= =?us-ascii?Q?bwLueDiUe7DR7fawdiymxsZqb/46osPAvbj3KG9qO+ApxKf4KHP6/N+DY/cS?= =?us-ascii?Q?qi74153jmHB3QbAKTZBv0YwjHWG8RNU3oW7Erw14j96yv62V9ppNdvgD/Pwv?= =?us-ascii?Q?HmUGYKzI+NdzXtWfhmd56zKgiSMQLsaxP8zgTsCDup/CuUW93aaHh0z1eYfC?= =?us-ascii?Q?+C3qQ+Qv+5IyQZix797Lu5ZB7EaP7znHFLy0/89Cs2LOv29VCu6qwfHeRYBs?= =?us-ascii?Q?3VawJ1nTVCgXXwWoIkmRqTxCI0QwoIAE/U7ZclyBUoB0gLGDiCRS78Pzo2fb?= =?us-ascii?Q?ZatNSaHoIpN6BvfwKtDGowcHpdHnmzh9CwomG5QtCzLt37dLhD1u98PnmZb9?= =?us-ascii?Q?nFb/SSL8F9ozt5+mw8cdAwU0mpjx7T5PvCGLUU0Rr9BSpGKddm91iOE68lf2?= =?us-ascii?Q?iVdHq3+0Y9jbeBNsNhiBxrEjMqiKO+8gQ5ytclYJtiCBf/x9OffGX6SS9vyZ?= =?us-ascii?Q?S3uofcPoEAqNC36LvXRpNSUCUJhDqU4qNvgDCMqLHnoEvRflaOWKApIdrEsX?= =?us-ascii?Q?zPyCHLcuQNJ2R3eUtMQ16yn4Jqk0bwgjKXKxK3CNPRV4qyffmVhulh1DpuWG?= =?us-ascii?Q?P3ua0V+daEk3O/fIvtAb3yPmfzwoyVUj9kmcJeqUblKEH+/j8XoZchCBvHyH?= =?us-ascii?Q?wVtS8MKPGn2OuAT+V7A3+wJRs3YZbZNcEQfPR/v8p8lPkhlf8lBNkg3ldNBt?= =?us-ascii?Q?+mLhDabsaAo10k1+hNZrxZu7ab1xjmAbLEAvvjiZqF2FaSR5OGNGlg3i8VNn?= =?us-ascii?Q?Pyb7UhDQZ9EwIfGIfMc=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.232; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014)(13003099007)(7053199007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Dec 2025 09:25:08.8707 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 598138fa-06d4-46ef-8d95-08de43977f6b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003448.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5795 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/30/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/shanipr/dpdk-stable This queued commit can be viewed at: https://github.com/shanipr/dpdk-stable/commit/b8ba8b09a5c1582f94de3d0d7fb1d487e4137554 Thanks. Shani --- >From b8ba8b09a5c1582f94de3d0d7fb1d487e4137554 Mon Sep 17 00:00:00 2001 From: Jacob Keller Date: Thu, 13 Nov 2025 13:33:45 -0800 Subject: [PATCH] net/iavf: fix Rx timestamp validity check [ upstream commit dba51a2fbdde67a2237a8d2c9fb73baf29e04dd0 ] When reporting an Rx timestamp from the receive descriptor, the iavf driver does not check the validity bit in the time_stamp_low field. In the event that hardware does not capture a receive timestamp for any reason, this valid bit is unset, and the timestamp value in the descriptor is zeroed out. The iavf driver ignores this and passes the zero value into the iavf_tstamp_convert_32b_64b function regardless, and proceeds to treat the result as a valid timestamp. Instead of reporting a zero timestamp which users can clearly interpret as invalid, the raw 0 value from the descriptor is "extended" to the 64-bit timestamp. This results in values which are not immediately obvious as invalid to users: timestamp 1760629088881475583 timestamp 1760629088881475583 timestamp 1760629088881475583 First, if the value is printed in base 10 it is not immediately obvious that the lower 32 bits are zero. Second, multiple packets in sequence will receive the same "timestamp". This occurs because of the timestamp extension logic. The receive descriptor timestamps are 40 bits, with 32 bits of nanosecond precision, 7 bits of subnanosecond precision, and 1 validity bit. The sub-nanosecond precision bits are discarded. To obtain a 64-bit timestamp, the upper 32 bits are calculated from the lower 32-bits and a snapshot of the PHC timer that is captured recently (within ~2 seconds of the packet timestamp). This enables reporting proper full 64-bit timestamps without needing to store all 64 bits in the receive descriptor. However, when timestamps are not working properly, the raw 'zero' value is extended regardless of whether hardware indicated it was a valid timestamp. As a result, users can see what appear at a glance as valid timestamps. However, they will not match the packet reception time, and will only update when the upper bits would roll over. This occurs every 2^32 seconds, or approximately once every 4 seconds. Instead of reporting bogus extended timestamp values which could confuse user applications, check the validity bit and only report a timestamp of the valid bit is set. This matches the implementation used in the Linux PF driver. Fixes: b5cd735132f6 ("net/iavf: enable Rx timestamp on flex descriptor") Signed-off-by: Jacob Keller Acked-by: Bruce Richardson --- drivers/net/iavf/iavf_rxtx.c | 9 ++++++--- drivers/net/iavf/iavf_rxtx.h | 3 +++ 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 73418f2830..62ca7d1051 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -1622,7 +1622,8 @@ iavf_recv_pkts_flex_rxd(void *rx_queue, rxd_to_pkt_fields_ops[rxq->rxdid](rxq, rxm, &rxd); pkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0); - if (iavf_timestamp_dynflag > 0) { + if (iavf_timestamp_dynflag > 0 && + rxd.wb.time_stamp_low & IAVF_RX_FLX_DESC_TS_VALID) { ts_ns = iavf_tstamp_convert_32b_64b(rxq->phc_time, rte_le_to_cpu_32(rxd.wb.flex_ts.ts_high)); @@ -1791,7 +1792,8 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts, rxd_to_pkt_fields_ops[rxq->rxdid](rxq, first_seg, &rxd); pkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0); - if (iavf_timestamp_dynflag > 0) { + if (iavf_timestamp_dynflag > 0 && + rxd.wb.time_stamp_low & IAVF_RX_FLX_DESC_TS_VALID) { ts_ns = iavf_tstamp_convert_32b_64b(rxq->phc_time, rte_le_to_cpu_32(rxd.wb.flex_ts.ts_high)); @@ -2076,7 +2078,8 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq, stat_err0 = rte_le_to_cpu_16(rxdp[j].wb.status_error0); pkt_flags = iavf_flex_rxd_error_to_pkt_flags(stat_err0); - if (iavf_timestamp_dynflag > 0) { + if (iavf_timestamp_dynflag > 0 && + rxdp[j].wb.time_stamp_low & IAVF_RX_FLX_DESC_TS_VALID) { ts_ns = iavf_tstamp_convert_32b_64b(rxq->phc_time, rte_le_to_cpu_32(rxdp[j].wb.flex_ts.ts_high)); diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index d6731327f6..fccee0811c 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -632,6 +632,9 @@ enum iavf_tx_ctx_desc_tunnel_l4_tunnel_type { /* for iavf_32b_rx_flex_desc.pkt_len member */ #define IAVF_RX_FLX_DESC_PKT_LEN_M (0x3FFF) /* 14-bits */ +/* Valid indicator bit for the time_stamp_low field */ +#define IAVF_RX_FLX_DESC_TS_VALID (0x1UL) + int iavf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, uint16_t nb_desc, -- 2.43.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2025-12-25 11:16:40.316664508 +0200 +++ 0080-net-iavf-fix-Rx-timestamp-validity-check.patch 2025-12-25 11:16:36.151840000 +0200 @@ -1 +1 @@ -From dba51a2fbdde67a2237a8d2c9fb73baf29e04dd0 Mon Sep 17 00:00:00 2001 +From b8ba8b09a5c1582f94de3d0d7fb1d487e4137554 Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit dba51a2fbdde67a2237a8d2c9fb73baf29e04dd0 ] + @@ -52 +53,0 @@ -Cc: stable@dpdk.org @@ -57,2 +58,2 @@ - drivers/net/intel/iavf/iavf_rxtx.c | 9 ++++++--- - drivers/net/intel/iavf/iavf_rxtx.h | 3 +++ + drivers/net/iavf/iavf_rxtx.c | 9 ++++++--- + drivers/net/iavf/iavf_rxtx.h | 3 +++ @@ -61,5 +62,5 @@ -diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c -index ea49059f83..d8662fd815 100644 ---- a/drivers/net/intel/iavf/iavf_rxtx.c -+++ b/drivers/net/intel/iavf/iavf_rxtx.c -@@ -1582,7 +1582,8 @@ iavf_recv_pkts_flex_rxd(void *rx_queue, +diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c +index 73418f2830..62ca7d1051 100644 +--- a/drivers/net/iavf/iavf_rxtx.c ++++ b/drivers/net/iavf/iavf_rxtx.c +@@ -1622,7 +1622,8 @@ iavf_recv_pkts_flex_rxd(void *rx_queue, @@ -75 +76 @@ -@@ -1751,7 +1752,8 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts, +@@ -1791,7 +1792,8 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts, @@ -85 +86 @@ -@@ -2036,7 +2038,8 @@ iavf_rx_scan_hw_ring_flex_rxd(struct ci_rx_queue *rxq, +@@ -2076,7 +2078,8 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq, @@ -95,5 +96,5 @@ -diff --git a/drivers/net/intel/iavf/iavf_rxtx.h b/drivers/net/intel/iavf/iavf_rxtx.h -index 5c9339b99f..8efb3bd04e 100644 ---- a/drivers/net/intel/iavf/iavf_rxtx.h -+++ b/drivers/net/intel/iavf/iavf_rxtx.h -@@ -504,6 +504,9 @@ enum iavf_tx_ctx_desc_tunnel_l4_tunnel_type { +diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h +index d6731327f6..fccee0811c 100644 +--- a/drivers/net/iavf/iavf_rxtx.h ++++ b/drivers/net/iavf/iavf_rxtx.h +@@ -632,6 +632,9 @@ enum iavf_tx_ctx_desc_tunnel_l4_tunnel_type {